[PATCH] drm/msm/dpu: clear pending peripheral flush state

[PATCH] drm/msm/dpu: clear pending peripheral flush state

[Saim Shujah]

dpu_hw_ctl_clear_pending_flush() resets the cached per-block state after a
flush transaction, but misses pending_periph_flush_mask.

The peripheral flush updater accumulates interface bits in this mask. A
later transaction which sets the top-level peripheral flush bit can write
stale interface bits to CTL_PERIPH_FLUSH together with the current state.

Peripheral flush support was added after the helper started clearing every
individual pending flush mask. Clear the peripheral mask together with the
other cached child masks.

Fixes: 64f7b81f0358 ("drm/msm/dpu: add support of new peripheral flush mechanism")
Cc: stable@vger.kernel.org
Signed-off-by: Saim Shujah <saimzst@gmail.com>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 36a497f1d6c1..e8729fe1cfef 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -118,6 +118,7 @@ static inline void dpu_hw_ctl_clear_pending_flush(struct dpu_hw_ctl *ctx)
 	ctx->pending_intf_flush_mask = 0;
 	ctx->pending_wb_flush_mask = 0;
 	ctx->pending_cwb_flush_mask = 0;
+	ctx->pending_periph_flush_mask = 0;
 	ctx->pending_merge_3d_flush_mask = 0;
 	ctx->pending_dsc_flush_mask = 0;
 	ctx->pending_cdm_flush_mask = 0;
-- 
2.55.0

Re: [PATCH] drm/msm/dpu: clear pending peripheral flush state

[Dmitry Baryshkov]

On Fri, Aug 28, 2026 at 11:54:40AM +0500, Saim Shujah wrote:
> dpu_hw_ctl_clear_pending_flush() resets the cached per-block state after a
> flush transaction, but misses pending_periph_flush_mask.
> 
> The peripheral flush updater accumulates interface bits in this mask. A
> later transaction which sets the top-level peripheral flush bit can write
> stale interface bits to CTL_PERIPH_FLUSH together with the current state.
> 
> Peripheral flush support was added after the helper started clearing every
> individual pending flush mask. Clear the peripheral mask together with the
> other cached child masks.
> 
> Fixes: 64f7b81f0358 ("drm/msm/dpu: add support of new peripheral flush mechanism")
> Cc: stable@vger.kernel.org
> Signed-off-by: Saim Shujah <saimzst@gmail.com>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 +
>  1 file changed, 1 insertion(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

> 

-- 
With best wishes
Dmitry