[PATCH 1/7] drm/amd/pm: stage od reset for smu 11.0.7

[Kevin Wang <kevin.wang@amd.com>]

SMU 11.0.7 restores the boot OverDrive table for
PP_OD_RESTORE_DEFAULT_TABLE, then falls through to the upload path.
The reset therefore changes PMFW state before userspace writes c.

Leave the restored table staged in the driver cache.
PP_OD_COMMIT_DPM_TABLE remains responsible for submitting it to PMFW.

Signed-off-by: Kevin Wang <kevin.wang@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index a0f0e858e9de..e26c3e2dff23 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -2387,7 +2387,7 @@ static int sienna_cichlid_od_edit_dpm_table(struct smu_context *smu,
 		memcpy(table_context->overdrive_table,
 				table_context->boot_overdrive_table,
 				sizeof(OverDriveTable_t));
-		fallthrough;
+		break;
 
 	case PP_OD_COMMIT_DPM_TABLE:
 		if (memcmp(od_table, table_context->user_overdrive_table, sizeof(OverDriveTable_t))) {
-- 
2.55.0