From: sashiko-bot@kernel.org
To: "Esben Haabendal" <esben@geanix.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v4 1/4] drm/bridge: nwl-dsi: Cleanup endpoint mux control selection
Date: Mon, 31 Aug 2026 13:34:48 +0000 [thread overview]
Message-ID: <20260831133448.DB07A1F00A3E@smtp.kernel.org> (raw)
In-Reply-To: <20260831-nwl-dsi-fixes-v4-1-6a2a1cb23910@geanix.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Dangling pointer to stack variable left in dsi->xfer after transfer completes or times out.
--
commit dea46a0fff2442d283e886a1f263495c782e6706
Author: Esben Haabendal <esben@geanix.com>
drm/bridge: nwl-dsi: Cleanup endpoint mux control selection
This commit cleans up the endpoint mux control selection by storing the
endpoint value in the nwl_dsi struct instead of using a boolean flag. It uses
the proper endpoint define values for mux_control_try_select().
Cc: stable@vger.kernel.org
> diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
> index 09992529f3d85..80e26a947ae69 100644
> --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> @@ -110,6 +110,8 @@ struct nwl_dsi {
> int error;
>
> struct nwl_dsi_transfer *xfer;
[Severity: High]
This isn't a bug introduced by this patch, but looking at how dsi->xfer is
handled, could it leave a dangling pointer to a stack variable?
In nwl_dsi_host_transfer(), dsi->xfer is assigned a pointer to a local stack
variable:
drivers/gpu/drm/bridge/nwl-dsi.c:nwl_dsi_host_transfer() {
struct nwl_dsi_transfer xfer;
...
dsi->xfer = &xfer;
...
if (!wait_for_completion_timeout(&xfer.completed,
NWL_DSI_MIPI_FIFO_TIMEOUT)) {
DRM_DEV_ERROR(dsi_host->dev, "[%02X] DSI transfer timed out\n",
xfer.cmd);
ret = -ETIMEDOUT;
} else {
ret = xfer.status;
}
clk_disable_unprepare(dsi->rx_esc_clk);
return ret;
}
When this function returns (either on success or timeout), dsi->xfer is not
cleared. If a delayed or spurious hardware interrupt fires afterwards,
nwl_dsi_irq_handler() calls nwl_dsi_finish_transmission():
drivers/gpu/drm/bridge/nwl-dsi.c:nwl_dsi_finish_transmission() {
struct nwl_dsi_transfer *xfer = dsi->xfer;
bool end_packet = false;
if (!xfer)
return;
if (xfer->direction == DSI_PACKET_SEND &&
status & NWL_DSI_TX_PKT_DONE) {
xfer->status = xfer->tx_len;
...
}
Does this cause the interrupt handler to dereference and write to the popped
stack frame of nwl_dsi_host_transfer(), potentially corrupting the memory of
whatever thread is currently executing?
> +
> + unsigned int endpoint;
> };
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260831-nwl-dsi-fixes-v4-0-6a2a1cb23910@geanix.com?part=1
next prev parent reply other threads:[~2026-08-31 13:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 13:27 [PATCH v4 0/4] drm/bridge: nwl-dsi: Various fixes Esben Haabendal
2026-08-31 13:27 ` [PATCH v4 1/4] drm/bridge: nwl-dsi: Cleanup endpoint mux control selection Esben Haabendal
2026-08-31 13:34 ` sashiko-bot [this message]
2026-08-31 15:13 ` Esben Haabendal
2026-08-31 13:27 ` [PATCH v4 2/4] drm/bridge: nwl-dsi: Limit LCDIF specific sync override Esben Haabendal
2026-08-31 13:27 ` [PATCH v4 3/4] drm/bridge: nwl-dsi: Correct auto-insert EOTP behavior Esben Haabendal
2026-08-31 13:27 ` [PATCH v4 4/4] drm/bridge: nwl-dsi: Correct MIPI DSI horizontal sync timing Esben Haabendal
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