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From: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Anton Johansson" <anjo@rev.ng>,
	"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>
Subject: [PATCH 14/14] hw/riscv: remove machines-qom.h
Date: Tue,  1 Sep 2026 20:20:43 +0000	[thread overview]
Message-ID: <20260901202043.26532-15-pierrick.bouvier@oss.qualcomm.com> (raw)
In-Reply-To: <20260901202043.26532-1-pierrick.bouvier@oss.qualcomm.com>

Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
 hw/core/null-machine.c          |  1 -
 hw/riscv/boston-aia.c           |  1 -
 hw/riscv/k230.c                 |  1 -
 hw/riscv/microblaze-v-generic.c |  1 -
 hw/riscv/microchip_pfsoc.c      |  1 -
 hw/riscv/opentitan.c            |  1 -
 hw/riscv/shakti_c.c             |  1 -
 hw/riscv/sifive_e.c             |  1 -
 hw/riscv/sifive_u.c             |  1 -
 hw/riscv/spike.c                |  1 -
 hw/riscv/tt_atlantis.c          |  1 -
 hw/riscv/virt.c                 |  1 -
 hw/riscv/xiangshan_kmh.c        |  1 -
 include/hw/riscv/machines-qom.h | 14 --------------
 target-info-qom.c               |  1 -
 target/riscv/machine.c          |  1 -
 16 files changed, 29 deletions(-)
 delete mode 100644 include/hw/riscv/machines-qom.h

diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index 2f008c4a702..60254913019 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -16,7 +16,6 @@
 #include "hw/core/boards.h"
 #include "system/address-spaces.h"
 #include "hw/core/cpu.h"
-#include "hw/riscv/machines-qom.h"
 
 static void machine_none_init(MachineState *mch)
 {
diff --git a/hw/riscv/boston-aia.c b/hw/riscv/boston-aia.c
index 30eff10bc5f..b90da096ea8 100644
--- a/hw/riscv/boston-aia.c
+++ b/hw/riscv/boston-aia.c
@@ -18,7 +18,6 @@
 #include "hw/ide/ahci-pci.h"
 #include "hw/core/loader.h"
 #include "hw/riscv/cps.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/pci-host/xilinx-pcie.h"
 #include "hw/core/qdev-properties.h"
 #include "qapi/error.h"
diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c
index 72d50d369a9..34905bb1702 100644
--- a/hw/riscv/k230.c
+++ b/hw/riscv/k230.c
@@ -26,7 +26,6 @@
 #include "hw/core/sysbus.h"
 #include "hw/riscv/k230.h"
 #include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/intc/riscv_aclint.h"
 #include "hw/intc/sifive_plic.h"
 #include "hw/char/serial-mm.h"
diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generic.c
index 503e8e08992..b0494b1ac50 100644
--- a/hw/riscv/microblaze-v-generic.c
+++ b/hw/riscv/microblaze-v-generic.c
@@ -25,7 +25,6 @@
 #include "system/address-spaces.h"
 #include "hw/char/xilinx_uartlite.h"
 #include "hw/misc/unimp.h"
-#include "hw/riscv/machines-qom.h"
 
 #define LMB_BRAM_SIZE (128 * KiB)
 #define MEMORY_BASEADDR 0x80000000
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 42d4fc39734..60bb96da016 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -49,7 +49,6 @@
 #include "hw/misc/unimp.h"
 #include "hw/riscv/boot.h"
 #include "hw/riscv/riscv_hart.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/riscv/microchip_pfsoc.h"
 #include "hw/intc/riscv_aclint.h"
 #include "hw/intc/sifive_plic.h"
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index c58d8993303..8cd660dd415 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -26,7 +26,6 @@
 #include "hw/core/boards.h"
 #include "hw/misc/unimp.h"
 #include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
 #include "qemu/units.h"
 #include "system/system.h"
 #include "system/address-spaces.h"
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index 9fd7856dc24..a205a213324 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -19,7 +19,6 @@
 #include "qemu/osdep.h"
 #include "hw/core/boards.h"
 #include "hw/riscv/shakti_c.h"
-#include "hw/riscv/machines-qom.h"
 #include "qapi/error.h"
 #include "qemu/error-report.h"
 #include "hw/intc/sifive_plic.h"
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index ede7cb52f00..1acfea49668 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -40,7 +40,6 @@
 #include "hw/riscv/riscv_hart.h"
 #include "hw/riscv/sifive_e.h"
 #include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/char/sifive_uart.h"
 #include "hw/intc/riscv_aclint.h"
 #include "hw/intc/sifive_plic.h"
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 08687cfc363..997ee91aa0e 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -51,7 +51,6 @@
 #include "hw/riscv/riscv_hart.h"
 #include "hw/riscv/sifive_u.h"
 #include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/riscv/fdt-common.h"
 #include "hw/char/sifive_uart.h"
 #include "hw/intc/riscv_aclint.h"
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 3786de4b0b7..e36fe996b09 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -34,7 +34,6 @@
 #include "hw/riscv/boot.h"
 #include "hw/riscv/fdt-common.h"
 #include "hw/riscv/numa.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/char/riscv_htif.h"
 #include "hw/intc/riscv_aclint.h"
 #include "chardev/char.h"
diff --git a/hw/riscv/tt_atlantis.c b/hw/riscv/tt_atlantis.c
index 5e155726abf..7d02868b222 100644
--- a/hw/riscv/tt_atlantis.c
+++ b/hw/riscv/tt_atlantis.c
@@ -20,7 +20,6 @@
 
 #include "hw/riscv/boot.h"
 #include "hw/riscv/fdt-common.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/riscv/riscv_hart.h"
 
 #include "hw/char/serial-mm.h"
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d2ae321a376..dd396410178 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -36,7 +36,6 @@
 #include "hw/riscv/virt.h"
 #include "hw/riscv/boot.h"
 #include "hw/riscv/fdt-common.h"
-#include "hw/riscv/machines-qom.h"
 #include "hw/riscv/numa.h"
 #include "kvm/kvm_riscv.h"
 #include "hw/firmware/smbios.h"
diff --git a/hw/riscv/xiangshan_kmh.c b/hw/riscv/xiangshan_kmh.c
index e02624b62b4..247a0b5d1f2 100644
--- a/hw/riscv/xiangshan_kmh.c
+++ b/hw/riscv/xiangshan_kmh.c
@@ -41,7 +41,6 @@
 #include "hw/riscv/boot.h"
 #include "hw/riscv/xiangshan_kmh.h"
 #include "hw/riscv/riscv_hart.h"
-#include "hw/riscv/machines-qom.h"
 #include "system/system.h"
 
 static const MemMapEntry xiangshan_kmh_memmap[] = {
diff --git a/include/hw/riscv/machines-qom.h b/include/hw/riscv/machines-qom.h
deleted file mode 100644
index 79d212eeb7d..00000000000
--- a/include/hw/riscv/machines-qom.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * QOM type definitions for riscv32 / riscv64 machines
- *
- *  Copyright (c) rev.ng Labs Srl.
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
- */
-
-#ifndef HW_RISCV_MACHINES_QOM_H
-#define HW_RISCV_MACHINES_QOM_H
-
-#include "hw/core/boards.h"
-
-#endif
diff --git a/target-info-qom.c b/target-info-qom.c
index f98d3d7698e..6965e4d1169 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -12,7 +12,6 @@
 #include "qemu/target-info-impl.h"
 #include "qemu/target-info-init.h"
 #include "qemu/target-info-qom.h"
-#include "hw/riscv/machines-qom.h"
 
 static void target_info_qom_class_init(ObjectClass *oc, const void * data)
 {
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 22a918cec95..c3f5a255099 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -24,7 +24,6 @@
 #include "migration/cpu.h"
 #include "exec/icount.h"
 #include "target/riscv/tcg/debug.h"
-#include "hw/riscv/machines-qom.h"
 #ifdef CONFIG_KVM
 #include "kvm/kvm_riscv.h"
 #endif
-- 
2.43.0



  parent reply	other threads:[~2026-09-01 20:21 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01 20:20 [PATCH 00/14] target-info: remove machine_typename Pierrick Bouvier
2026-09-01 20:20 ` [PATCH 01/14] qom/object: add is_available callback to TypeInfo Pierrick Bouvier
2026-09-02 15:53   ` Philippe Mathieu-Daudé
2026-09-02 17:40     ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 02/14] hw/arm: filter minimal set of machines Pierrick Bouvier
2026-09-02 14:30   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 03/14] system: query machines using TYPE_MACHINE Pierrick Bouvier
2026-09-02  4:39   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 04/14] target-info: remove machine_typename Pierrick Bouvier
2026-09-02  4:36   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 05/14] configs/targets: remove target info definitions Pierrick Bouvier
2026-09-02 15:55   ` Philippe Mathieu-Daudé
2026-09-02 16:24     ` Pierrick Bouvier
2026-09-02 17:41       ` Pierrick Bouvier
2026-09-01 20:20 ` [PATCH 06/14] target-info: rename target-info-stub.c in target-info-def.c Pierrick Bouvier
2026-09-01 20:20 ` [PATCH 07/14] hw/arm: remove TYPE_TARGET_{AARCH64,ARM}_MACHINE Pierrick Bouvier
2026-09-02  4:37   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 08/14] hw/arm: remove {arm, arm_aarch64, aarch64}_machine_interfaces Pierrick Bouvier via qemu development
2026-09-02  4:37   ` Philippe Mathieu-Daudé
2026-09-03  4:06     ` Yonggang Luo
2026-09-01 20:20 ` [PATCH 09/14] hw/arm: remove DEFINE_MACHINE_{AARCH64,ARM} Pierrick Bouvier
2026-09-02  4:38   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 10/14] hw/arm: remove machines-qom.h Pierrick Bouvier
2026-09-02  4:38   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 11/14] hw/riscv: remove TYPE_TARGET_{RISCV32,RISCV64}_MACHINE Pierrick Bouvier
2026-09-02  4:38   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 12/14] hw/riscv: remove {riscv32, riscv32_64, riscv64}_machine_interfaces Pierrick Bouvier via qemu development
2026-09-02  4:39   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 13/14] hw/riscv: remove DEFINE_MACHINE_{RISCV32,RISCV64} Pierrick Bouvier
2026-09-02  4:39   ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` Pierrick Bouvier [this message]
2026-09-02  4:39   ` [PATCH 14/14] hw/riscv: remove machines-qom.h Philippe Mathieu-Daudé
2026-09-02 17:54 ` [PATCH 00/14] target-info: remove machine_typename Philippe Mathieu-Daudé
2026-09-03 10:33   ` Yonggang Luo
2026-09-03 16:28     ` Pierrick Bouvier
2026-09-03 16:42       ` Yonggang Luo
2026-09-03 16:53         ` Pierrick Bouvier

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