From: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Anton Johansson" <anjo@rev.ng>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>
Subject: [PATCH 04/14] target-info: remove machine_typename
Date: Tue, 1 Sep 2026 20:20:33 +0000 [thread overview]
Message-ID: <20260901202043.26532-5-pierrick.bouvier@oss.qualcomm.com> (raw)
In-Reply-To: <20260901202043.26532-1-pierrick.bouvier@oss.qualcomm.com>
This field is now unused, so we can remove it.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
configs/targets/aarch64-softmmu.c | 1 -
configs/targets/arm-softmmu.c | 1 -
configs/targets/riscv32-softmmu.c | 1 -
configs/targets/riscv64-softmmu.c | 1 -
include/qemu/target-info-impl.h | 2 --
include/qemu/target-info.h | 8 --------
target-info-stub.c | 1 -
target-info.c | 5 -----
8 files changed, 20 deletions(-)
diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c
index 75d95b0e743..2200a4f19e9 100644
--- a/configs/targets/aarch64-softmmu.c
+++ b/configs/targets/aarch64-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_aarch64_system = {
.target_arch = SYS_EMU_TARGET_AARCH64,
.long_bits = 64,
.cpu_type = TYPE_ARM_CPU,
- .machine_typename = TYPE_TARGET_AARCH64_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_vary = true,
.page_bits_init = TARGET_PAGE_BITS_LEGACY,
diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c
index 73546fa5737..9d558a0c1a1 100644
--- a/configs/targets/arm-softmmu.c
+++ b/configs/targets/arm-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_arm_system = {
.target_arch = SYS_EMU_TARGET_ARM,
.long_bits = 32,
.cpu_type = TYPE_ARM_CPU,
- .machine_typename = TYPE_TARGET_ARM_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_vary = true,
.page_bits_init = TARGET_PAGE_BITS_LEGACY,
diff --git a/configs/targets/riscv32-softmmu.c b/configs/targets/riscv32-softmmu.c
index 752c813077e..c1d94679c7e 100644
--- a/configs/targets/riscv32-softmmu.c
+++ b/configs/targets/riscv32-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_riscv32_system = {
.target_arch = SYS_EMU_TARGET_RISCV32,
.long_bits = 32,
.cpu_type = TYPE_RISCV_CPU,
- .machine_typename = TYPE_TARGET_RISCV32_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_init = TARGET_PAGE_BITS,
};
diff --git a/configs/targets/riscv64-softmmu.c b/configs/targets/riscv64-softmmu.c
index 5150f0fe9d9..f648a5c8944 100644
--- a/configs/targets/riscv64-softmmu.c
+++ b/configs/targets/riscv64-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_riscv64_system = {
.target_arch = SYS_EMU_TARGET_RISCV64,
.long_bits = 64,
.cpu_type = TYPE_RISCV_CPU,
- .machine_typename = TYPE_TARGET_RISCV64_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_init = TARGET_PAGE_BITS,
};
diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
index c917d546eab..cf42aabbc8b 100644
--- a/include/qemu/target-info-impl.h
+++ b/include/qemu/target-info-impl.h
@@ -21,8 +21,6 @@ typedef struct TargetInfo {
unsigned long_bits;
/* runtime equivalent of CPU_RESOLVING_TYPE definition */
const char *cpu_type;
- /* QOM typename machines for this binary must implement */
- const char *machine_typename;
/* related to TARGET_BIG_ENDIAN definition */
EndianMode endianness;
/*
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index 6c5b714288e..b23e5bc5865 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -23,14 +23,6 @@ const char *target_name(void);
*/
unsigned target_long_bits(void);
-/**
- * target_machine_typename:
- *
- * Returns: Name of the QOM interface implemented by machines
- * usable on this target binary.
- */
-const char *target_machine_typename(void);
-
/**
* target_cpu_type:
*
diff --git a/target-info-stub.c b/target-info-stub.c
index 22b7911201c..d121b8c0170 100644
--- a/target-info-stub.c
+++ b/target-info-stub.c
@@ -29,7 +29,6 @@ static const TargetInfo target_info_stub = {
.target_arch = glue(SYS_EMU_TARGET_, TARGET_ARCH),
.long_bits = TARGET_LONG_BITS,
.cpu_type = CPU_RESOLVING_TYPE,
- .machine_typename = TYPE_MACHINE,
.endianness = TARGET_BIG_ENDIAN ? ENDIAN_MODE_BIG : ENDIAN_MODE_LITTLE,
#ifdef TARGET_PAGE_BITS_VARY
.page_bits_vary = true,
diff --git a/target-info.c b/target-info.c
index 04c69c41f8a..012b384036d 100644
--- a/target-info.c
+++ b/target-info.c
@@ -32,11 +32,6 @@ const char *target_cpu_type(void)
return target_info()->cpu_type;
}
-const char *target_machine_typename(void)
-{
- return target_info()->machine_typename;
-}
-
EndianMode target_endian_mode(void)
{
return target_info()->endianness;
--
2.43.0
next prev parent reply other threads:[~2026-09-01 20:22 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 20:20 [PATCH 00/14] target-info: remove machine_typename Pierrick Bouvier
2026-09-01 20:20 ` [PATCH 01/14] qom/object: add is_available callback to TypeInfo Pierrick Bouvier
2026-09-02 15:53 ` Philippe Mathieu-Daudé
2026-09-02 17:40 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 02/14] hw/arm: filter minimal set of machines Pierrick Bouvier
2026-09-02 14:30 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 03/14] system: query machines using TYPE_MACHINE Pierrick Bouvier
2026-09-02 4:39 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` Pierrick Bouvier [this message]
2026-09-02 4:36 ` [PATCH 04/14] target-info: remove machine_typename Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 05/14] configs/targets: remove target info definitions Pierrick Bouvier
2026-09-02 15:55 ` Philippe Mathieu-Daudé
2026-09-02 16:24 ` Pierrick Bouvier
2026-09-02 17:41 ` Pierrick Bouvier
2026-09-01 20:20 ` [PATCH 06/14] target-info: rename target-info-stub.c in target-info-def.c Pierrick Bouvier
2026-09-01 20:20 ` [PATCH 07/14] hw/arm: remove TYPE_TARGET_{AARCH64,ARM}_MACHINE Pierrick Bouvier
2026-09-02 4:37 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 08/14] hw/arm: remove {arm, arm_aarch64, aarch64}_machine_interfaces Pierrick Bouvier via qemu development
2026-09-02 4:37 ` Philippe Mathieu-Daudé
2026-09-03 4:06 ` Yonggang Luo
2026-09-01 20:20 ` [PATCH 09/14] hw/arm: remove DEFINE_MACHINE_{AARCH64,ARM} Pierrick Bouvier
2026-09-02 4:38 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 10/14] hw/arm: remove machines-qom.h Pierrick Bouvier
2026-09-02 4:38 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 11/14] hw/riscv: remove TYPE_TARGET_{RISCV32,RISCV64}_MACHINE Pierrick Bouvier
2026-09-02 4:38 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 12/14] hw/riscv: remove {riscv32, riscv32_64, riscv64}_machine_interfaces Pierrick Bouvier via qemu development
2026-09-02 4:39 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 13/14] hw/riscv: remove DEFINE_MACHINE_{RISCV32,RISCV64} Pierrick Bouvier
2026-09-02 4:39 ` Philippe Mathieu-Daudé
2026-09-01 20:20 ` [PATCH 14/14] hw/riscv: remove machines-qom.h Pierrick Bouvier
2026-09-02 4:39 ` Philippe Mathieu-Daudé
2026-09-02 17:54 ` [PATCH 00/14] target-info: remove machine_typename Philippe Mathieu-Daudé
2026-09-03 10:33 ` Yonggang Luo
2026-09-03 16:28 ` Pierrick Bouvier
2026-09-03 16:42 ` Yonggang Luo
2026-09-03 16:53 ` Pierrick Bouvier
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