Re: [PATCH v20 7/9] cxl: Add port and dport identifiers to CXL AER trace events

[sashiko-bot@kernel.org]

> From: Dan Williams <djbw@kernel.org>
> 
> Pass struct cxl_port * and struct cxl_dport * to the cxl_aer_* trace events
> instead of a plain struct device * derived at the caller. The trace event
> helpers then derive the right strings for Endpoints, Switch Ports, Root
> Ports, and RCH Downstream Ports consistently across the CPER and native AER
> paths.
> 
> The unified cxl_aer_* events keep "memdev" as the legacy field (Endpoint
> events populate it with the memdev name; non-Endpoint events emit
> memdev="") and add new "port" and "dport" string fields populated for all
> CXL device classes. Updated userspace can key off "port" and "dport"
> without a parallel set of events.
> 
> Remove the separate cxl_port_aer_uncorrectable_error and
> [ ... ]
>    serial=0: status: 'Memory Data ECC Error'
> 
> Co-developed-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Dan Williams <djbw@kernel.org>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902133933.2992457-1-terry.bowman@amd.com?part=7