From: Bruce Richardson <bruce.richardson@intel.com>
To: dev@dpdk.org
Cc: Bruce Richardson <bruce.richardson@intel.com>,
Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Subject: [PATCH 04/13] net/iavf: deduplicate tunnel field fill functions
Date: Thu, 3 Sep 2026 18:01:33 +0100 [thread overview]
Message-ID: <20260903170140.360477-5-bruce.richardson@intel.com> (raw)
In-Reply-To: <20260903170140.360477-1-bruce.richardson@intel.com>
Each of the avx2 and avx512 Tx functions used two separate subfunctions
to insert the tunneling fields into the context descriptor. Except for
some minor differences (a flags guard on one) the two were identical, so
remove the one missing the additional guard.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/iavf/iavf_rxtx_vec_avx2.c | 77 +------------------
drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c | 77 +------------------
2 files changed, 4 insertions(+), 150 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/intel/iavf/iavf_rxtx_vec_avx2.c
index 2aaa713702..10e96a8510 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_avx2.c
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_avx2.c
@@ -1833,79 +1833,6 @@ iavf_fill_ctx_desc_tunneling_avx2(uint64_t *low_ctx_qw, struct rte_mbuf *pkt)
}
}
-static inline void
-iavf_fill_ctx_desc_tunneling_field(volatile uint64_t *qw0,
- const struct rte_mbuf *m)
-{
- uint64_t eip_typ = IAVF_TX_CTX_DESC_EIPT_NONE;
- uint64_t eip_len = 0;
- uint64_t eip_noinc = 0;
- /* Default - IP_ID is increment in each segment of LSO */
-
- switch (m->ol_flags & (RTE_MBUF_F_TX_OUTER_IPV4 |
- RTE_MBUF_F_TX_OUTER_IPV6 |
- RTE_MBUF_F_TX_OUTER_IP_CKSUM)) {
- case RTE_MBUF_F_TX_OUTER_IPV4:
- eip_typ = IAVF_TX_CTX_DESC_EIPT_IPV4_NO_CHECKSUM_OFFLOAD;
- eip_len = m->outer_l3_len >> 2;
- break;
- case RTE_MBUF_F_TX_OUTER_IPV4 | RTE_MBUF_F_TX_OUTER_IP_CKSUM:
- eip_typ = IAVF_TX_CTX_DESC_EIPT_IPV4_CHECKSUM_OFFLOAD;
- eip_len = m->outer_l3_len >> 2;
- break;
- case RTE_MBUF_F_TX_OUTER_IPV6:
- eip_typ = IAVF_TX_CTX_DESC_EIPT_IPV6;
- eip_len = m->outer_l3_len >> 2;
- break;
- }
-
- /* L4TUNT: L4 Tunneling Type */
- switch (m->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
- case RTE_MBUF_F_TX_TUNNEL_IPIP:
- /* for non UDP / GRE tunneling, set to 00b */
- break;
- case RTE_MBUF_F_TX_TUNNEL_VXLAN:
- case RTE_MBUF_F_TX_TUNNEL_VXLAN_GPE:
- case RTE_MBUF_F_TX_TUNNEL_GTP:
- case RTE_MBUF_F_TX_TUNNEL_GENEVE:
- eip_typ |= IAVF_TXD_CTX_UDP_TUNNELING;
- break;
- case RTE_MBUF_F_TX_TUNNEL_GRE:
- eip_typ |= IAVF_TXD_CTX_GRE_TUNNELING;
- break;
- default:
- PMD_TX_LOG(ERR, "Tunnel type not supported");
- return;
- }
-
- /* L4TUNLEN: L4 Tunneling Length, in Words
- *
- * We depend on app to set rte_mbuf.l2_len correctly.
- * For IP in GRE it should be set to the length of the GRE
- * header;
- * For MAC in GRE or MAC in UDP it should be set to the length
- * of the GRE or UDP headers plus the inner MAC up to including
- * its last Ethertype.
- * If MPLS labels exists, it should include them as well.
- */
- eip_typ |= (m->l2_len >> 1) << IAVF_TXD_CTX_QW0_NATLEN_SHIFT;
-
- /**
- * Calculate the tunneling UDP checksum.
- * Shall be set only if L4TUNT = 01b and EIPT is not zero
- */
- if ((eip_typ & (IAVF_TX_CTX_EXT_IP_IPV6 |
- IAVF_TX_CTX_EXT_IP_IPV4 |
- IAVF_TX_CTX_EXT_IP_IPV4_NO_CSUM)) &&
- (eip_typ & IAVF_TXD_CTX_UDP_TUNNELING) &&
- (m->ol_flags & RTE_MBUF_F_TX_OUTER_UDP_CKSUM))
- eip_typ |= IAVF_TXD_CTX_QW0_L4T_CS_MASK;
-
- *qw0 = eip_typ << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIPT_SHIFT |
- eip_len << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIPLEN_SHIFT |
- eip_noinc << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIP_NOINC_SHIFT;
-}
-
static __rte_always_inline void
ctx_vtx1(volatile struct ci_tx_desc *txdp, struct rte_mbuf *pkt,
uint64_t flags, bool offload, enum ci_l2tag_pos single_vlan_pos,
@@ -1969,7 +1896,7 @@ ctx_vtx(volatile struct ci_tx_desc *txdp,
if (offload) {
/* tunnel fill assigns low_ctx_qw1; must run before QinQ/VLAN OR below */
- iavf_fill_ctx_desc_tunneling_field(&low_ctx_qw1, pkt[1]);
+ iavf_fill_ctx_desc_tunneling_avx2(&low_ctx_qw1, pkt[1]);
if (pkt[1]->ol_flags & RTE_MBUF_F_TX_QINQ) {
uint64_t qinq_tag = qinq_outer_pos == CI_TAG_IN_CTX_DESC ?
(uint64_t)pkt[1]->vlan_tci_outer :
@@ -1990,7 +1917,7 @@ ctx_vtx(volatile struct ci_tx_desc *txdp,
if (offload) {
/* tunnel fill assigns low_ctx_qw0; must run before QinQ/VLAN OR below */
- iavf_fill_ctx_desc_tunneling_field(&low_ctx_qw0, pkt[0]);
+ iavf_fill_ctx_desc_tunneling_avx2(&low_ctx_qw0, pkt[0]);
if (pkt[0]->ol_flags & RTE_MBUF_F_TX_QINQ) {
uint64_t qinq_tag = qinq_outer_pos == CI_TAG_IN_CTX_DESC ?
(uint64_t)pkt[0]->vlan_tci_outer :
diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
index 8e44406511..58ed89a72a 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
@@ -1972,79 +1972,6 @@ iavf_fill_ctx_desc_tunneling_avx512(uint64_t *low_ctx_qw, struct rte_mbuf *pkt)
}
}
-static inline void
-iavf_fill_ctx_desc_tunnelling_field(volatile uint64_t *qw0,
- const struct rte_mbuf *m)
-{
- uint64_t eip_typ = IAVF_TX_CTX_DESC_EIPT_NONE;
- uint64_t eip_len = 0;
- uint64_t eip_noinc = 0;
- /* Default - IP_ID is increment in each segment of LSO */
-
- switch (m->ol_flags & (RTE_MBUF_F_TX_OUTER_IPV4 |
- RTE_MBUF_F_TX_OUTER_IPV6 |
- RTE_MBUF_F_TX_OUTER_IP_CKSUM)) {
- case RTE_MBUF_F_TX_OUTER_IPV4:
- eip_typ = IAVF_TX_CTX_DESC_EIPT_IPV4_NO_CHECKSUM_OFFLOAD;
- eip_len = m->outer_l3_len >> 2;
- break;
- case RTE_MBUF_F_TX_OUTER_IPV4 | RTE_MBUF_F_TX_OUTER_IP_CKSUM:
- eip_typ = IAVF_TX_CTX_DESC_EIPT_IPV4_CHECKSUM_OFFLOAD;
- eip_len = m->outer_l3_len >> 2;
- break;
- case RTE_MBUF_F_TX_OUTER_IPV6:
- eip_typ = IAVF_TX_CTX_DESC_EIPT_IPV6;
- eip_len = m->outer_l3_len >> 2;
- break;
- }
-
- /* L4TUNT: L4 Tunneling Type */
- switch (m->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
- case RTE_MBUF_F_TX_TUNNEL_IPIP:
- /* for non UDP / GRE tunneling, set to 00b */
- break;
- case RTE_MBUF_F_TX_TUNNEL_VXLAN:
- case RTE_MBUF_F_TX_TUNNEL_VXLAN_GPE:
- case RTE_MBUF_F_TX_TUNNEL_GTP:
- case RTE_MBUF_F_TX_TUNNEL_GENEVE:
- eip_typ |= IAVF_TXD_CTX_UDP_TUNNELING;
- break;
- case RTE_MBUF_F_TX_TUNNEL_GRE:
- eip_typ |= IAVF_TXD_CTX_GRE_TUNNELING;
- break;
- default:
- PMD_TX_LOG(ERR, "Tunnel type not supported");
- return;
- }
-
- /* L4TUNLEN: L4 Tunneling Length, in Words
- *
- * We depend on app to set rte_mbuf.l2_len correctly.
- * For IP in GRE it should be set to the length of the GRE
- * header;
- * For MAC in GRE or MAC in UDP it should be set to the length
- * of the GRE or UDP headers plus the inner MAC up to including
- * its last Ethertype.
- * If MPLS labels exists, it should include them as well.
- */
- eip_typ |= (m->l2_len >> 1) << IAVF_TXD_CTX_QW0_NATLEN_SHIFT;
-
- /**
- * Calculate the tunneling UDP checksum.
- * Shall be set only if L4TUNT = 01b and EIPT is not zero
- */
- if ((eip_typ & (IAVF_TX_CTX_EXT_IP_IPV6 |
- IAVF_TX_CTX_EXT_IP_IPV4 |
- IAVF_TX_CTX_EXT_IP_IPV4_NO_CSUM)) &&
- (eip_typ & IAVF_TXD_CTX_UDP_TUNNELING) &&
- (m->ol_flags & RTE_MBUF_F_TX_OUTER_UDP_CKSUM))
- eip_typ |= IAVF_TXD_CTX_QW0_L4T_CS_MASK;
-
- *qw0 = eip_typ << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIPT_SHIFT |
- eip_len << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIPLEN_SHIFT |
- eip_noinc << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIP_NOINC_SHIFT;
-}
-
static __rte_always_inline void
ctx_vtx1(volatile struct ci_tx_desc *txdp, struct rte_mbuf *pkt,
uint64_t flags, bool offload, enum ci_l2tag_pos single_vlan_pos,
@@ -2106,7 +2033,7 @@ ctx_vtx(volatile struct ci_tx_desc *txdp,
if (offload) {
/* tunnel fill assigns low_ctx_qw1; must run before QinQ/VLAN OR below */
- iavf_fill_ctx_desc_tunnelling_field(&low_ctx_qw1, pkt[1]);
+ iavf_fill_ctx_desc_tunneling_avx512(&low_ctx_qw1, pkt[1]);
if (pkt[1]->ol_flags & RTE_MBUF_F_TX_QINQ) {
uint64_t qinq_tag = qinq_outer_pos == CI_TAG_IN_CTX_DESC ?
(uint64_t)pkt[1]->vlan_tci_outer :
@@ -2126,7 +2053,7 @@ ctx_vtx(volatile struct ci_tx_desc *txdp,
if (offload) {
/* tunnel fill assigns low_ctx_qw0; must run before QinQ/VLAN OR below */
- iavf_fill_ctx_desc_tunnelling_field(&low_ctx_qw0, pkt[0]);
+ iavf_fill_ctx_desc_tunneling_avx512(&low_ctx_qw0, pkt[0]);
if (pkt[0]->ol_flags & RTE_MBUF_F_TX_QINQ) {
uint64_t qinq_tag = qinq_outer_pos == CI_TAG_IN_CTX_DESC ?
(uint64_t)pkt[0]->vlan_tci_outer :
--
2.53.0
next prev parent reply other threads:[~2026-09-03 17:02 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-03 17:01 [PATCH 00/13] Consolidate ice and iavf vector Tx paths Bruce Richardson
2026-09-03 17:01 ` [PATCH 01/13] net/iavf: remove unnecessary alignment calls Bruce Richardson
2026-09-03 17:01 ` [PATCH 02/13] net/intel: make Tx context flag common Bruce Richardson
2026-09-03 17:01 ` [PATCH 03/13] net/iavf: use separate params for VLAN and QinQ position Bruce Richardson
2026-09-03 17:01 ` Bruce Richardson [this message]
2026-09-04 7:01 ` [PATCH 04/13] net/iavf: deduplicate tunnel field fill functions David Marchand
2026-09-03 17:01 ` [PATCH 05/13] net/intel: define common macros for tunneling bit-shifts Bruce Richardson
2026-09-03 17:01 ` [PATCH 06/13] net/intel: move iavf descriptor writing functions to common Bruce Richardson
2026-09-03 17:01 ` [PATCH 07/13] net/intel: use function callback for lldp Bruce Richardson
2026-09-03 17:01 ` [PATCH 08/13] net/ice: use common descriptor creation functions Bruce Richardson
2026-09-03 17:01 ` [PATCH 09/13] net/intel: move vector Tx paths to common Bruce Richardson
2026-09-03 17:03 ` [PATCH 10/13] net/ice: use common AVX Tx functions Bruce Richardson
2026-09-03 17:04 ` [PATCH 11/13] net/intel: add common vector Tx fns with context handling Bruce Richardson
2026-09-03 17:04 ` [PATCH 12/13] net/intel: improve Tx path selection logic Bruce Richardson
2026-09-03 17:04 ` [PATCH 13/13] net/ice: enable context desc offloads for vector Tx Bruce Richardson
2026-09-04 7:10 ` [PATCH 00/13] Consolidate ice and iavf vector Tx paths David Marchand
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