From: Kuan-Wei Chiu <visitorckw@gmail.com>
To: geert@linux-m68k.org, tglx@kernel.org, miodrag.dinic@mips.com
Cc: radu@rendec.net, zewenchen@google.com, jamiechen@google.com,
edwardwchen@google.com, marscheng@google.com,
eleanor15x@gmail.com, jserv@ccns.ncku.edu.tw,
linux-kernel@vger.kernel.org, linux-m68k@lists.linux-m68k.org,
Kuan-Wei Chiu <visitorckw@gmail.com>
Subject: [PATCH 6/6] m68k: virt: Switch to generic goldfish-pic driver
Date: Tue, 8 Sep 2026 09:40:16 +0000 [thread overview]
Message-ID: <20260908094016.1997918-7-visitorckw@gmail.com> (raw)
In-Reply-To: <20260908094016.1997918-1-visitorckw@gmail.com>
The m68k virt platform implements a custom irq_chip and chained handler
in arch/m68k/virt/ints.c to handle its 6 goldfish PIC instances.
Replace this custom implementation with calls to goldfish_pic_init() to
use the generic goldfish-pic driver, and select CONFIG_GOLDFISH_PIC for
CONFIG_VIRT.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
---
arch/m68k/Kconfig.machine | 1 +
arch/m68k/virt/ints.c | 89 ++++-----------------------------------
2 files changed, 10 insertions(+), 80 deletions(-)
diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine
index cff990c319cb..7b15012ffb28 100644
--- a/arch/m68k/Kconfig.machine
+++ b/arch/m68k/Kconfig.machine
@@ -130,6 +130,7 @@ config VIRT
depends on MMU
select GENERIC_CLOCKEVENTS
select GOLDFISH
+ select GOLDFISH_PIC
select GOLDFISH_TIMER
select GOLDFISH_TTY
select M68040
diff --git a/arch/m68k/virt/ints.c b/arch/m68k/virt/ints.c
index 896aa6eb8bcc..54da6b1f5ce7 100644
--- a/arch/m68k/virt/ints.c
+++ b/arch/m68k/virt/ints.c
@@ -1,25 +1,14 @@
// SPDX-License-Identifier: GPL-2.0
-#include <linux/delay.h>
#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/sched/debug.h>
-#include <linux/types.h>
#include <linux/ioport.h>
+#include <linux/irqchip/irq-goldfish-pic.h>
-#include <asm/hwtest.h>
#include <asm/irq.h>
#include <asm/irq_regs.h>
#include <asm/processor.h>
#include <asm/virt.h>
-#define GFPIC_REG_IRQ_PENDING 0x04
-#define GFPIC_REG_IRQ_DISABLE_ALL 0x08
-#define GFPIC_REG_IRQ_DISABLE 0x0c
-#define GFPIC_REG_IRQ_ENABLE 0x10
-
static struct resource picres[6];
static const char *picname[6] = {
"goldfish_pic.0",
@@ -50,43 +39,6 @@ static const char *picname[6] = {
* CPU IRQ #7 -> NMI
*/
-static u32 gfpic_read(int pic, int reg)
-{
- void __iomem *base = (void __iomem *)(virt_bi_data.pic.mmio +
- pic * 0x1000);
-
- return ioread32be(base + reg);
-}
-
-static void gfpic_write(u32 value, int pic, int reg)
-{
- void __iomem *base = (void __iomem *)(virt_bi_data.pic.mmio +
- pic * 0x1000);
-
- iowrite32be(value, base + reg);
-}
-
-#define GF_PIC(irq) ((irq - IRQ_USER) / 32)
-#define GF_IRQ(irq) ((irq - IRQ_USER) % 32)
-
-static void virt_irq_enable(struct irq_data *data)
-{
- gfpic_write(BIT(GF_IRQ(data->irq)), GF_PIC(data->irq),
- GFPIC_REG_IRQ_ENABLE);
-}
-
-static void virt_irq_disable(struct irq_data *data)
-{
- gfpic_write(BIT(GF_IRQ(data->irq)), GF_PIC(data->irq),
- GFPIC_REG_IRQ_DISABLE);
-}
-
-static unsigned int virt_irq_startup(struct irq_data *data)
-{
- virt_irq_enable(data);
- return 0;
-}
-
static irqreturn_t virt_nmi_handler(int irq, void *dev_id)
{
static int in_nmi;
@@ -102,40 +54,12 @@ static irqreturn_t virt_nmi_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static struct irq_chip virt_irq_chip = {
- .name = "virt",
- .irq_enable = virt_irq_enable,
- .irq_disable = virt_irq_disable,
- .irq_startup = virt_irq_startup,
- .irq_shutdown = virt_irq_disable,
-};
-
-static void goldfish_pic_irq(struct irq_desc *desc)
-{
- u32 irq_pending;
- unsigned int irq_num;
- unsigned int pic = desc->irq_data.irq - 1;
-
- irq_pending = gfpic_read(pic, GFPIC_REG_IRQ_PENDING);
- irq_num = IRQ_USER + pic * 32;
-
- do {
- if (irq_pending & 1)
- generic_handle_irq(irq_num);
- ++irq_num;
- irq_pending >>= 1;
- } while (irq_pending);
-}
-
void __init virt_init_IRQ(void)
{
unsigned int i;
-
- m68k_setup_irq_controller(&virt_irq_chip, handle_simple_irq, IRQ_USER,
- NUM_VIRT_SOURCES - IRQ_USER);
+ int ret;
for (i = 0; i < 6; i++) {
-
picres[i] = (struct resource)
DEFINE_RES_MEM_NAMED(virt_bi_data.pic.mmio + i * 0x1000,
0x1000, picname[i]);
@@ -144,8 +68,13 @@ void __init virt_init_IRQ(void)
return;
}
- irq_set_chained_handler(virt_bi_data.pic.irq + i,
- goldfish_pic_irq);
+ ret = goldfish_pic_init((void __iomem *)(virt_bi_data.pic.mmio + i * 0x1000),
+ virt_bi_data.pic.irq + i,
+ IRQ_USER + i * 32, NULL);
+ if (ret) {
+ pr_err("Failed to initialize %s\n", picname[i]);
+ return;
+ }
}
if (request_irq(IRQ_AUTO_7, virt_nmi_handler, 0, "NMI",
--
2.55.0.979.g7e5102b832-goog
prev parent reply other threads:[~2026-09-08 9:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 9:40 [PATCH 0/6] m68k: virt: Switch to generic goldfish PIC driver Kuan-Wei Chiu
2026-09-08 9:40 ` [PATCH 1/6] irqchip/goldfish-pic: Use gf_ioread32/gf_iowrite32 for MMIO access Kuan-Wei Chiu
2026-09-08 9:40 ` [PATCH 2/6] irqchip/goldfish-pic: Use for_each_set_bit() to iterate pending IRQ Kuan-Wei Chiu
2026-09-08 9:40 ` [PATCH 3/6] irqchip/goldfish-pic: Allow selecting CONFIG_GOLDFISH_PIC on other architectures Kuan-Wei Chiu
2026-09-08 9:40 ` [PATCH 4/6] irqchip/goldfish-pic: Add goldfish_pic_init() for non DT platforms Kuan-Wei Chiu
2026-09-08 9:40 ` [PATCH 5/6] m68k/irq: Add empty irq_eoi callback to auto/user IRQ chips Kuan-Wei Chiu
2026-09-08 9:40 ` Kuan-Wei Chiu [this message]
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