From: sashiko-bot@kernel.org
To: "Matthew Auld" <matthew.auld@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v4 8/8] drm/xe: convert PCI barrier mmap to use xe_mmio_gem
Date: Tue, 08 Sep 2026 14:09:39 +0000 [thread overview]
Message-ID: <20260908140939.CD9811F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260908134955.1344429-18-matthew.auld@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The migration of the PCI barrier mmap to use `xe_mmio_gem` removed the `VM_READ` restriction, allowing userspace to map and read from the doorbell register.
--
commit 545a53278606e03a94bbfc5ae72975b8ad8c6cae
Author: Matthew Auld <matthew.auld@intel.com>
drm/xe: convert PCI barrier mmap to use xe_mmio_gem
This commit converts the PCI barrier mmap over to use xe_mmio_gem, simplifying
the codebase and replacing the hard coded fake offset design. It introduces the
first user of xe_mmio_gem for mapping the PCIe doorbell register.
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
[ ... ]
> -static int xe_pci_barrier_mmap(struct file *filp,
> - struct vm_area_struct *vma)
> -{
[ ... ]
> - if (vma->vm_flags & (VM_READ | VM_EXEC))
> - return -EINVAL;
> -
> - vm_flags_clear(vma, VM_MAYREAD | VM_MAYEXEC);
[Severity: High]
Does removing this VM_READ restriction allow userspace to map the PCIe
doorbell register with read permissions?
The original xe_pci_barrier_mmap implementation explicitly restricted mappings
to write-only by rejecting VM_READ and clearing VM_MAYREAD. By migrating to
the generic xe_mmio_gem_mmap implementation in xe_mmio_gem.c, this read
restriction is dropped, as the generic code only restricts VM_EXEC:
drivers/gpu/drm/xe/xe_mmio_gem.c:xe_mmio_gem_mmap() {
if (vma->vm_flags & VM_EXEC)
return -EINVAL;
vma->vm_page_prot = pgprot_noncached(vma_get_page_prot(vma));
vm_flags_mod(vma, VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP |
VM_NORESERVE, VM_MAYEXEC);
}
Reading from write-only PCIe doorbell registers can trigger an Unsupported
Request or PCIe completion timeout, resulting in a Machine Check Exception
and a full system hang. Because this mapping is accessible to unprivileged
userspace, could this introduce a denial of service vulnerability?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260908134955.1344429-10-matthew.auld@intel.com?part=8
next prev parent reply other threads:[~2026-09-08 14:09 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 13:49 [PATCH v4 0/8] drm/xe/mmio_gem: fix fault handler and destroy path Matthew Auld
2026-09-08 13:49 ` [PATCH v4 1/8] drm/xe/mmio_gem: forbid VMA split Matthew Auld
2026-09-08 13:49 ` [PATCH v4 2/8] drm/xe/mmio_gem: use write-back mapping for dummy page Matthew Auld
2026-09-08 13:49 ` [PATCH v4 3/8] drm/xe/mmio_gem: simplify fault handler loop Matthew Auld
2026-09-08 13:50 ` [PATCH v4 4/8] drm/xe/mmio_gem: Revoke drm_vma_node on xe_mmio_gem destroy Matthew Auld
2026-09-08 13:50 ` [PATCH v4 5/8] drm/xe/mmio_gem: cache the dummy page per object Matthew Auld
2026-09-08 13:50 ` [PATCH v4 6/8] drm/xe/mmio_gem: fix destroy flow Matthew Auld
2026-09-08 13:50 ` [PATCH v4 7/8] drm/xe/mmio_gem: reject VM_EXEC and drop VM_DONTCOPY Matthew Auld
2026-09-08 14:57 ` Thomas Hellström
2026-09-08 13:50 ` [PATCH v4 8/8] drm/xe: convert PCI barrier mmap to use xe_mmio_gem Matthew Auld
2026-09-08 14:09 ` sashiko-bot [this message]
2026-09-08 14:21 ` Matthew Auld
2026-09-08 15:07 ` Thomas Hellström
2026-09-08 14:48 ` ✓ CI.KUnit: success for drm/xe/mmio_gem: fix fault handler and destroy path (rev4) Patchwork
2026-09-08 15:25 ` ✓ Xe.CI.BAT: " Patchwork
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