From: Krzysztof Kozlowski <krzk@kernel.org>
To: Junhui Liu <junhui.liu@pigmoral.tech>
Cc: Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Richard Cochran <richardcochran@gmail.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, netdev@vger.kernel.org,
Jerome Brunet <jbrunet@baylibre.com>,
Enzo Adriano <enzo.adriano.code@gmail.com>
Subject: Re: [PATCH v3 1/8] dt-bindings: clk: sun60i-a733-ccu: Add Allwinner A733 support
Date: Wed, 9 Sep 2026 09:17:14 +0200 [thread overview]
Message-ID: <20260909-illegal-organic-mammoth-5daf5d@quoll> (raw)
In-Reply-To: <20260905-a733-clk-v3-1-50f238f39c78@pigmoral.tech>
On Sat, Sep 05, 2026 at 12:45:30AM +0800, Junhui Liu wrote:
> The CCU and R-CCU (PRCM) modules provide clocks and reset functions for
> the Allwinner A733 SoC. The clock architecture of the A733 is evolved
> from the A523, though the root clocking strategy transitions from a
> static oscillator frequency in the Devicetree to the "hosc" clock, which
> is determined by choosing from three possible frequencies (19.2MHz,
> 24MHz, or 26MHz) by the RTC hardware, and finally feeds the CCU and
> R-CCU.
>
> Additionally, the MCU_CCU module found in previous designs is removed
> from the A733, and the clock tree is expanded with more clock outputs
> to support new functional modules.
>
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> ---
> .../bindings/clock/allwinner,sun60i-a733-ccu.yaml | 107 ++++++++
> .../dt-bindings/clock/allwinner,sun60i-a733-ccu.h | 290 +++++++++++++++++++++
> .../clock/allwinner,sun60i-a733-r-ccu.h | 39 +++
> .../dt-bindings/reset/allwinner,sun60i-a733-ccu.h | 129 +++++++++
> .../reset/allwinner,sun60i-a733-r-ccu.h | 23 ++
> 5 files changed, 588 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Junhui Liu <junhui.liu@pigmoral.tech>
Cc: Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Richard Cochran <richardcochran@gmail.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, netdev@vger.kernel.org,
Jerome Brunet <jbrunet@baylibre.com>,
Enzo Adriano <enzo.adriano.code@gmail.com>
Subject: Re: [PATCH v3 1/8] dt-bindings: clk: sun60i-a733-ccu: Add Allwinner A733 support
Date: Wed, 9 Sep 2026 09:17:14 +0200 [thread overview]
Message-ID: <20260909-illegal-organic-mammoth-5daf5d@quoll> (raw)
In-Reply-To: <20260905-a733-clk-v3-1-50f238f39c78@pigmoral.tech>
On Sat, Sep 05, 2026 at 12:45:30AM +0800, Junhui Liu wrote:
> The CCU and R-CCU (PRCM) modules provide clocks and reset functions for
> the Allwinner A733 SoC. The clock architecture of the A733 is evolved
> from the A523, though the root clocking strategy transitions from a
> static oscillator frequency in the Devicetree to the "hosc" clock, which
> is determined by choosing from three possible frequencies (19.2MHz,
> 24MHz, or 26MHz) by the RTC hardware, and finally feeds the CCU and
> R-CCU.
>
> Additionally, the MCU_CCU module found in previous designs is removed
> from the A733, and the clock tree is expanded with more clock outputs
> to support new functional modules.
>
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> ---
> .../bindings/clock/allwinner,sun60i-a733-ccu.yaml | 107 ++++++++
> .../dt-bindings/clock/allwinner,sun60i-a733-ccu.h | 290 +++++++++++++++++++++
> .../clock/allwinner,sun60i-a733-r-ccu.h | 39 +++
> .../dt-bindings/reset/allwinner,sun60i-a733-ccu.h | 129 +++++++++
> .../reset/allwinner,sun60i-a733-r-ccu.h | 23 ++
> 5 files changed, 588 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
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next prev parent reply other threads:[~2026-09-09 7:17 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-04 16:45 [PATCH v3 0/8] clk: sunxi-ng: Add support for Allwinner A733 CCU and PRCM Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-04 16:45 ` [PATCH v3 1/8] dt-bindings: clk: sun60i-a733-ccu: Add Allwinner A733 support Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-09 7:17 ` Krzysztof Kozlowski [this message]
2026-09-09 7:17 ` Krzysztof Kozlowski
2026-09-04 16:45 ` [PATCH v3 2/8] clk: sunxi-ng: sdm: Add dual patterns support Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-04 16:45 ` [PATCH v3 3/8] clk: sunxi-ng: a733: Add PRCM CCU Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-04 16:45 ` [PATCH v3 4/8] clk: sunxi-ng: a733: Add PLL clocks support Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-04 16:45 ` [PATCH v3 5/8] clk: sunxi-ng: a733: Add bus " Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-05 16:48 ` sashiko-bot
2026-09-04 16:45 ` [PATCH v3 6/8] clk: sunxi-ng: a733: Add mod " Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-05 16:48 ` sashiko-bot
2026-09-04 16:45 ` [PATCH v3 7/8] clk: sunxi-ng: a733: Add bus clock gates Junhui Liu
2026-09-04 16:45 ` Junhui Liu
2026-09-04 16:45 ` [PATCH v3 8/8] clk: sunxi-ng: a733: Add reset lines Junhui Liu
2026-09-04 16:45 ` Junhui Liu
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