[PATCH rtw-next 10/15] wifi: rtw89: mac: change beamformee CSI direct forward to CMAC_TXDMA

[Ping-Ke Shih <pkshih@realtek.com>]

Set R_BE_RESP_MODE register when initializing beamformee to makes CSI
RX state machine enter initial state, and enables received beamformee CSI
to be directly forwarded to CMAC_TXDMA via hardware shortcut path.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
 drivers/net/wireless/realtek/rtw89/mac_be.c |  3 +++
 drivers/net/wireless/realtek/rtw89/reg.h    | 20 ++++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c
index c8f343c8d545..fa35cafd7074 100644
--- a/drivers/net/wireless/realtek/rtw89/mac_be.c
+++ b/drivers/net/wireless/realtek/rtw89/mac_be.c
@@ -2786,6 +2786,9 @@ static int rtw89_mac_init_bfee_be(struct rtw89_dev *rtwdev, u8 mac_idx)
 				       B_BE_CSIPRT_HESU_AID_EN |
 				       B_BE_CSIPRT_EHTSU_AID_EN);
 
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_RESP_MODE, mac_idx);
+	rtw89_write32_set(rtwdev, reg, B_BE_INIT_CLEAR_RX_STATE | B_BE_SHORT_CUT_MODE);
+
 	reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_RRSC, mac_idx);
 	rtw89_write32(rtwdev, reg, CSI_RRSC_BMAP_BE);
 
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 4291e8115f10..e85af8713777 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -8373,6 +8373,26 @@
 #define B_BE_CSI_RESERVED_PAGE_NUM_MASK GENMASK(27, 16)
 #define B_BE_CSI_RESERVED_START_PAGE_MASK GENMASK(11, 0)
 
+#define R_BE_RESP_MODE 0x11814
+#define R_BE_RESP_MODE_C1 0x15814
+#define B_BE_LMR_MASK_PRE_ENQ BIT(27)
+#define B_BE_LMR_INIT_CLEAR_RX_STATE BIT(26)
+#define B_BE_LMR_SHORT_CUT_MODE BIT(25)
+#define B_BE_LMR_IMMED_ENQ_MODE BIT(24)
+#define B_BE_CLEAR_SMR_SEG_TBL BIT(19)
+#define B_BE_CLEAR_FTM_SEG_TBL BIT(18)
+#define B_BE_CLEAR_CSI_SEG_TBL BIT(17)
+#define B_BE_CLEAR_CSI_RESP_TBL BIT(16)
+#define B_BE_SMR_MASK_PRE_ENQ BIT(12)
+#define B_BE_SMR_DELAY_IMMED_ENQ_MODE BIT(11)
+#define B_BE_SMR_INIT_CLEAR_RX_STATE BIT(10)
+#define B_BE_SMR_SHORT_CUT_MODE BIT(9)
+#define B_BE_SMR_IMMED_ENQ_MODE BIT(8)
+#define B_BE_CSI_MASK_PRE_ENQ BIT(3)
+#define B_BE_INIT_CLEAR_RX_STATE BIT(2)
+#define B_BE_SHORT_CUT_MODE BIT(1)
+#define B_BE_IMMED_ENQ_MODE BIT(0)
+
 #define R_BE_RESP_IMR1 0x11878
 #define R_BE_RESP_IMR1_C1 0x15878
 #define B_BE_RESP_IMR_1_MASK GENMASK(31, 9)
-- 
2.25.1