* [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms
@ 2026-09-09 7:25 tilak.tirumalesh.tangudu
2026-09-09 7:25 ` [PATCH 1/2] drm/xe: harden adjust_idledly() against divide-by-zero and overflow tilak.tirumalesh.tangudu
` (4 more replies)
0 siblings, 5 replies; 17+ messages in thread
From: tilak.tirumalesh.tangudu @ 2026-09-09 7:25 UTC (permalink / raw)
To: tilak.tirumalesh.tangudu, vinay.belgaumkar, tejas.upadhyay,
gustavo.sousa, intel-xe
From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
This series adds Wa_14025941587 (minimum IDLEDLY floor) for Xe2, Xe3 and
Xe3p and hardens the shared adjust_idledly() helper it builds on.
Patch 1 fixes three pre-existing corner cases in adjust_idledly() that
can panic or misprogram RING_IDLEDLY.
(timestamp_base == 0 divide-by-zero, IDLE_WAIT_TIME == 0 underflow, and
u32 overflow in the tick<->ns conversions).
Patch 2 applies Wa_14025941587 on top of the hardened helper.
Tangudu Tilak Tirumalesh (2):
drm/xe: harden adjust_idledly() against divide-by-zero and overflow
drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms
drivers/gpu/drm/xe/xe_guc_ads.c | 2 +-
drivers/gpu/drm/xe/xe_hw_engine.c | 65 +++++++++++++++++++++++++-----
drivers/gpu/drm/xe/xe_wa_oob.rules | 2 +
3 files changed, 57 insertions(+), 12 deletions(-)
--
2.46.0
^ permalink raw reply [flat|nested] 17+ messages in thread* [PATCH 1/2] drm/xe: harden adjust_idledly() against divide-by-zero and overflow 2026-09-09 7:25 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu @ 2026-09-09 7:25 ` tilak.tirumalesh.tangudu 2026-09-09 7:38 ` sashiko-bot 2026-09-09 7:25 ` [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu ` (3 subsequent siblings) 4 siblings, 1 reply; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-09 7:25 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, tejas.upadhyay, gustavo.sousa, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> adjust_idledly() has three corner-case issues flagged during review: 1. If xe_gt_clock_init() failed to recognise the crystal clock, gt->info.timestamp_base is 0, which makes idledly_units_ps also 0. The subsequent DIV_ROUND_CLOSEST(..., idledly_units_ps) is then a divide-by-zero and panics the kernel. 2. If IDLE_WAIT_TIME reads back as 0, maxcnt evaluates to 0. idledly >= maxcnt is then trivially true, so maxcnt - 1 wraps to 0xFFFFFFFF in u32 and that stale value is used to program RING_IDLEDLY. 3. The tick-to-ns conversions are done in u32: idledly * idledly_units_ps, (maxcnt - 1) * 1000 Both overflow u32 before DIV_ROUND_CLOSEST() sees them. Warn and return early if timestamp_base is 0 (the unknown-crystal path). Return early if IDLE_WAIT_TIME is 0. Do the tick-to-ns conversions in u64 via DIV_ROUND_CLOSEST_ULL() so the intermediate product cannot wrap. Fixes: d2de4410a88f ("drm/xe: Apply Wa_16023105232") Cc: stable@vger.kernel.org Assisted-by: GitHub_Copilot:claude-opus-4.8 Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> --- drivers/gpu/drm/xe/xe_hw_engine.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 010499766fce..6ffb0ece0561 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -594,18 +594,29 @@ static void adjust_idledly(struct xe_hw_engine *hwe) bool inhibit_switch = 0; if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) { + /* xe_gt_clock_init() zeroes timestamp_base on unknown crystal clock. */ + if (!idledly_units_ps) { + xe_gt_warn(gt, "idledly WA skipped: timestamp_base is 0\n"); + return; + } + idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; idledly = REG_FIELD_GET(IDLE_DELAY, idledly); - idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000); + idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); + + /* Return early rather than underflow maxcnt - 1 on a zero IDLE_WAIT_TIME. */ + if (!maxcnt) + return; + maxcnt *= maxcnt_units_ns; if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { - idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000), - idledly_units_ps); + idledly = DIV_ROUND_CLOSEST_ULL((u64)(maxcnt - 1) * 1000, + idledly_units_ps); xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly); } } -- 2.46.0 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 1/2] drm/xe: harden adjust_idledly() against divide-by-zero and overflow 2026-09-09 7:25 ` [PATCH 1/2] drm/xe: harden adjust_idledly() against divide-by-zero and overflow tilak.tirumalesh.tangudu @ 2026-09-09 7:38 ` sashiko-bot 0 siblings, 0 replies; 17+ messages in thread From: sashiko-bot @ 2026-09-09 7:38 UTC (permalink / raw) To: tilak.tirumalesh.tangudu; +Cc: intel-xe Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: New issues: - [High] Returning early when `maxcnt == 0` bypasses the workaround logic and fails to clear the `INHIBIT_SWITCH_UNTIL_PREEMPTED` bit if it was set in hardware. Pre-existing issues: - [High] Using `DIV_ROUND_CLOSEST_ULL` can round up, resulting in an `idledly` value that is greater than or equal to `maxcnt`, violating the workaround's core requirement and causing continuous kernel warnings. -- commit 33df9c0262d14ae39bdd6d5eab48d83f8de9e00b Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> drm/xe: harden adjust_idledly() against divide-by-zero and overflow This commit addresses corner-case issues in adjust_idledly() that could cause kernel panics, wrap-arounds, or integer overflows. It adds early returns for zero timestamp_base or IDLE_WAIT_TIME and upgrades tick-to-ns math to 64-bit using DIV_ROUND_CLOSEST_ULL(). > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c > index 010499766fce2..6ffb0ece05612 100644 > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c > @@ -594,18 +594,29 @@ static void adjust_idledly(struct xe_hw_engine *hwe) > bool inhibit_switch = 0; > > if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) { > + /* xe_gt_clock_init() zeroes timestamp_base on unknown crystal clock. */ > + if (!idledly_units_ps) { > + xe_gt_warn(gt, "idledly WA skipped: timestamp_base is 0\n"); > + return; > + } > + > idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); > maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); > > inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; > idledly = REG_FIELD_GET(IDLE_DELAY, idledly); > - idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000); > + idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); > maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); > + > + /* Return early rather than underflow maxcnt - 1 on a zero IDLE_WAIT_TIME. */ > + if (!maxcnt) > + return; [Severity: High] Does returning early here bypass the workaround logic and fail to clear the INHIBIT_SWITCH_UNTIL_PREEMPTED bit? The commit message explicitly states that IDLE_WAIT_TIME can read back as 0. If maxcnt evaluates to 0 and the inhibit_switch bit was set in hardware, this early return skips the subsequent register write entirely, leaving the context switch inhibit bit permanently active. The workaround should gracefully clear the inhibit bit even if it cannot set a valid delay. > + > maxcnt *= maxcnt_units_ns; > > if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { > - idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000), > - idledly_units_ps); > + idledly = DIV_ROUND_CLOSEST_ULL((u64)(maxcnt - 1) * 1000, > + idledly_units_ps); [Severity: High] This is a pre-existing issue, but does using DIV_ROUND_CLOSEST_ULL here cause the resulting idledly to round up and violate the maxcnt constraint? Because DIV_ROUND_CLOSEST_ULL rounds to the nearest integer, the resulting tick count can exceed maxcnt. For example, on a 12MHz crystal platform with timestamp_base = 83333, idledly_units_ps is 666664 ps. If maxcnt is 1, maxcnt in ns is 640. The calculation gives 639000 / 666664, which rounds to 1 tick. When read back on the next invocation, 1 tick converts to 667 ns, and 667 >= 640 evaluates to true, triggering constant xe_gt_WARN_ON spam. Should floor division be used instead to ensure idledly remains strictly less than maxcnt? > xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly); > } > } -- Sashiko AI review · https://sashiko.dev/#/patchset/20260909072540.99303-1-tilak.tirumalesh.tangudu@intel.com?part=1 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-09 7:25 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu 2026-09-09 7:25 ` [PATCH 1/2] drm/xe: harden adjust_idledly() against divide-by-zero and overflow tilak.tirumalesh.tangudu @ 2026-09-09 7:25 ` tilak.tirumalesh.tangudu 2026-09-09 7:39 ` sashiko-bot 2026-09-09 8:23 ` ✓ CI.KUnit: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) Patchwork ` (2 subsequent siblings) 4 siblings, 1 reply; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-09 7:25 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, tejas.upadhyay, gustavo.sousa, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Avoid programming the IDLEDLY timer to less than 5 microseconds. Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media Versions 13.01 to 35.03 v2: Use xe_rtp_match_not_sriov_vf, move to local variable Remove warn and other knits - Matt R v3: Add verbose comment - Tejas v4: Restore IDLE_DLY register on engine reset. Add it to GUC save-restore list. -Vivek v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay v6: Avoid clearing inhibit switch - Bala Refactor code accordingly by adding idle_reg_val. v7: Rebased with the divide-by-zero/overflow guards living in a separate hardening patch. Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> --- drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 52 ++++++++++++++++++++++++------ drivers/gpu/drm/xe/xe_wa_oob.rules | 2 ++ 3 files changed, 45 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c index ff8eee3831aa..58a3f6293ce4 100644 --- a/drivers/gpu/drm/xe/xe_guc_ads.c +++ b/drivers/gpu/drm/xe/xe_guc_ads.c @@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads, } } - if (XE_GT_WA(hwe->gt, 16023105232)) + if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587)) guc_mmio_regset_write_one(ads, regset_map, RING_IDLEDLY(hwe->mmio_base), count++); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 6ffb0ece0561..033740c34aa6 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -588,23 +588,27 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, static void adjust_idledly(struct xe_hw_engine *hwe) { struct xe_gt *gt = hwe->gt; - u32 idledly, maxcnt; + u32 idledly, idledly_reg_val, maxcnt; u32 idledly_units_ps = 8 * gt->info.timestamp_base; u32 maxcnt_units_ns = 640; - bool inhibit_switch = 0; + bool inhibit_switch = false; + bool wa_applied = false; + + if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) || + XE_GT_WA(gt, 14025941587)) { + u32 mincnt_idledly_ns = 5000; - if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) { /* xe_gt_clock_init() zeroes timestamp_base on unknown crystal clock. */ if (!idledly_units_ps) { xe_gt_warn(gt, "idledly WA skipped: timestamp_base is 0\n"); return; } - idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); + idledly_reg_val = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); - inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; - idledly = REG_FIELD_GET(IDLE_DELAY, idledly); + inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED; + idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val); idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); @@ -614,10 +618,38 @@ static void adjust_idledly(struct xe_hw_engine *hwe) maxcnt *= maxcnt_units_ns; - if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { - idledly = DIV_ROUND_CLOSEST_ULL((u64)(maxcnt - 1) * 1000, - idledly_units_ps); - xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly); + /* Wa_14025941587: applied prior to Wa_16023105232, + * as the latter has higher priority, although conflict + * is not expected. + */ + if (XE_GT_WA(gt, 14025941587) && + idledly < mincnt_idledly_ns) { + idledly = mincnt_idledly_ns; + wa_applied = true; + } + + if (XE_GT_WA(gt, 16023105232) && + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { + idledly = (maxcnt - 1); + wa_applied = true; + /* inhibit_switch override to keep + * semantics of Wa_16023105232 + */ + if (inhibit_switch) + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; + } + + if (wa_applied) { + idledly_reg_val &= ~IDLE_DELAY; + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, + DIV_ROUND_CLOSEST_ULL((u64)idledly * 1000, + idledly_units_ps)); + xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n", + hwe->name, idledly, maxcnt, + !!inhibit_switch, gt->info.timestamp_base); + xe_mmio_write32(>->mmio, + RING_IDLEDLY(hwe->mmio_base), + idledly_reg_val); } } } diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules index dd69ad07f7a9..3001155f8d09 100644 --- a/drivers/gpu/drm/xe/xe_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules @@ -72,3 +72,5 @@ 16029897822 MEDIA_VERSION(3500) GRAPHICS_VERSION(3510) 14027054324 GRAPHICS_VERSION(3511) +14025941587 GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf) + MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf) -- 2.46.0 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-09 7:25 ` [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu @ 2026-09-09 7:39 ` sashiko-bot 0 siblings, 0 replies; 17+ messages in thread From: sashiko-bot @ 2026-09-09 7:39 UTC (permalink / raw) To: tilak.tirumalesh.tangudu; +Cc: intel-xe Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: - [Medium] Early return when maxcnt is 0 silently bypasses Wa_14025941587 - [Medium] Mutated idledly variable causes spurious WARN_ON and violates WA 14025941587 constraint -- commit ca2474376ef20b3f47a408b5ebe9a4945d93d22c Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms Avoid programming the IDLEDLY timer to less than 5 microseconds. Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media Versions 13.01 to 35.03 > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c > index 6ffb0ece05612..033740c34aa66 100644 > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c [ ... ] > @@ -614,10 +618,38 @@ static void adjust_idledly(struct xe_hw_engine *hwe) > > maxcnt *= maxcnt_units_ns; > > - if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { > - idledly = DIV_ROUND_CLOSEST_ULL((u64)(maxcnt - 1) * 1000, > - idledly_units_ps); > - xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly); [Severity: Medium] In adjust_idledly(), there is an existing check just before this hunk: maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); if (!maxcnt) return; If maxcnt evaluates to 0, the function executes an early return. Does this unintentionally bypass the new Wa_14025941587 workaround added below, skipping the 5 microsecond limit enforcement if the initial maxcnt from the hardware happens to be 0? > + /* Wa_14025941587: applied prior to Wa_16023105232, > + * as the latter has higher priority, although conflict > + * is not expected. > + */ > + if (XE_GT_WA(gt, 14025941587) && > + idledly < mincnt_idledly_ns) { > + idledly = mincnt_idledly_ns; > + wa_applied = true; > + } > + > + if (XE_GT_WA(gt, 16023105232) && > + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { > + idledly = (maxcnt - 1); [Severity: Medium] Can this sequence trigger a spurious WARN_ON and violate the 5000ns minimum? If the original idledly is less than 5000ns, WA 14025941587 mutates idledly to 5000. Immediately after, if maxcnt happens to be 5000 or less (e.g. 4480), the WARN_ON will trigger because it evaluates the mutated idledly (5000 >= 4480), even if the original hardware value was safe (e.g. 2000 < 4480). Following the WARN_ON, idledly is then set to maxcnt - 1 (e.g. 4479), which silently breaks the 5000ns minimum required by Wa_14025941587. Should the second workaround evaluate the original hardware state rather than the software-mutated value? > + wa_applied = true; > + /* inhibit_switch override to keep > + * semantics of Wa_16023105232 > + */ > + if (inhibit_switch) > + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; > + } -- Sashiko AI review · https://sashiko.dev/#/patchset/20260909072540.99303-1-tilak.tirumalesh.tangudu@intel.com?part=2 ^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) 2026-09-09 7:25 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu 2026-09-09 7:25 ` [PATCH 1/2] drm/xe: harden adjust_idledly() against divide-by-zero and overflow tilak.tirumalesh.tangudu 2026-09-09 7:25 ` [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu @ 2026-09-09 8:23 ` Patchwork 2026-09-09 9:33 ` ✓ Xe.CI.BAT: " Patchwork 2026-09-09 14:15 ` ✗ Xe.CI.FULL: failure " Patchwork 4 siblings, 0 replies; 17+ messages in thread From: Patchwork @ 2026-09-09 8:23 UTC (permalink / raw) To: tilak.tirumalesh.tangudu; +Cc: intel-xe == Series Details == Series: drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) URL : https://patchwork.freedesktop.org/series/167706/ State : success == Summary == + trap cleanup EXIT + kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig') + for kcfg in "${kunitconfigs[@]}" + [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]] + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig [08:21:47] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [08:21:51] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [08:22:12] Starting KUnit Kernel (1/1)... [08:22:12] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [08:22:12] ============= refcount_interrupt (4 subtests) ============== [08:22:12] [PASSED] test_single_irq_change [08:22:12] [PASSED] test_nested_irq_change [08:22:12] [PASSED] test_multiple_irq_change [08:22:12] [PASSED] test_irq_save [08:22:12] =============== [PASSED] refcount_interrupt ================ [08:22:12] ================= gpu_buddy (14 subtests) ================== [08:22:12] [PASSED] gpu_test_buddy_alloc_limit [08:22:12] [PASSED] gpu_test_buddy_alloc_optimistic [08:22:12] [PASSED] gpu_test_buddy_alloc_pessimistic [08:22:12] [PASSED] gpu_test_buddy_alloc_pathological [08:22:12] [PASSED] gpu_test_buddy_alloc_contiguous [08:22:12] [PASSED] gpu_test_buddy_alloc_clear [08:22:12] [PASSED] gpu_test_buddy_alloc_range [08:22:12] [PASSED] gpu_test_buddy_alloc_range_bias [08:22:13] [PASSED] gpu_test_buddy_fragmentation_performance [08:22:14] [PASSED] gpu_test_buddy_dirty_tracker_performance [08:22:14] [PASSED] gpu_test_buddy_alloc_exceeds_max_order [08:22:14] [PASSED] gpu_test_buddy_offset_aligned_allocation [08:22:14] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress [08:22:14] [PASSED] gpu_test_buddy_addr_to_block [08:22:14] ==================== [PASSED] gpu_buddy ==================== [08:22:14] ============================================================ [08:22:14] Testing complete. Ran 18 tests: passed: 18 [08:22:14] Elapsed time: 26.605s total, 4.344s configuring, 20.343s building, 1.875s running + for kcfg in "${kunitconfigs[@]}" + [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]] + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [08:22:14] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [08:22:16] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [08:22:49] Starting KUnit Kernel (1/1)... [08:22:49] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [08:22:49] ============= refcount_interrupt (4 subtests) ============== [08:22:49] [PASSED] test_single_irq_change [08:22:49] [PASSED] test_nested_irq_change [08:22:49] [PASSED] test_multiple_irq_change [08:22:49] [PASSED] test_irq_save [08:22:49] =============== [PASSED] refcount_interrupt ================ [08:22:49] ================== guc_buf (11 subtests) =================== [08:22:49] [PASSED] test_smallest [08:22:49] [PASSED] test_largest [08:22:49] [PASSED] test_granular [08:22:49] [PASSED] test_unique [08:22:49] [PASSED] test_overlap [08:22:49] [PASSED] test_reusable [08:22:49] [PASSED] test_too_big [08:22:49] [PASSED] test_flush [08:22:49] [PASSED] test_lookup [08:22:49] [PASSED] test_data [08:22:49] [PASSED] test_class [08:22:49] ===================== [PASSED] guc_buf ===================== [08:22:49] =================== guc_dbm (7 subtests) =================== [08:22:49] [PASSED] test_empty [08:22:49] [PASSED] test_default [08:22:49] ======================== test_size ======================== [08:22:49] [PASSED] 4 [08:22:49] [PASSED] 8 [08:22:49] [PASSED] 32 [08:22:49] [PASSED] 256 [08:22:49] ==================== [PASSED] test_size ==================== [08:22:49] ======================= test_reuse ======================== [08:22:49] [PASSED] 4 [08:22:49] [PASSED] 8 [08:22:49] [PASSED] 32 [08:22:49] [PASSED] 256 [08:22:49] =================== [PASSED] test_reuse ==================== [08:22:49] =================== test_range_overlap ==================== [08:22:49] [PASSED] 4 [08:22:49] [PASSED] 8 [08:22:49] [PASSED] 32 [08:22:49] [PASSED] 256 [08:22:49] =============== [PASSED] test_range_overlap ================ [08:22:49] =================== test_range_compact ==================== [08:22:49] [PASSED] 4 [08:22:49] [PASSED] 8 [08:22:49] [PASSED] 32 [08:22:49] [PASSED] 256 [08:22:49] =============== [PASSED] test_range_compact ================ [08:22:49] ==================== test_range_spare ===================== [08:22:49] [PASSED] 4 [08:22:49] [PASSED] 8 [08:22:49] [PASSED] 32 [08:22:49] [PASSED] 256 [08:22:49] ================ [PASSED] test_range_spare ================= [08:22:49] ===================== [PASSED] guc_dbm ===================== [08:22:49] =================== guc_idm (6 subtests) =================== [08:22:49] [PASSED] bad_init [08:22:49] [PASSED] no_init [08:22:49] [PASSED] init_fini [08:22:49] [PASSED] check_used [08:22:49] [PASSED] check_quota [08:22:49] [PASSED] check_all [08:22:49] ===================== [PASSED] guc_idm ===================== [08:22:49] =============== guc_klv_helpers (9 subtests) =============== [08:22:49] [PASSED] test_count [08:22:49] [PASSED] test_encode_u32 [08:22:49] [PASSED] test_encode_u64 [08:22:49] [PASSED] test_encode_string [08:22:49] [PASSED] test_encode_object_raw [08:22:49] [PASSED] test_encode_object_klv [08:22:49] [PASSED] test_encode_object_nested [08:22:49] [PASSED] test_encode_object_basic [08:22:49] [PASSED] test_print [08:22:49] ================= [PASSED] guc_klv_helpers ================= [08:22:49] =================== xe_log (4 subtests) ==================== [08:22:49] [PASSED] demo_cper [08:22:49] [PASSED] demo_dmesg [08:22:49] ======================= test_dmesg ======================== [08:22:49] [PASSED] test_fatal [08:22:49] [PASSED] test_fatal_tile [08:22:49] [PASSED] test_fatal_gt [08:22:49] [PASSED] test_fatal_comp [08:22:49] [PASSED] test_fatal_comp_tile [08:22:49] [PASSED] test_fatal_comp_gt [08:22:49] [PASSED] test_fatal_all [08:22:49] [PASSED] test_recoverable [08:22:49] [PASSED] test_recoverable_tile [08:22:49] [PASSED] test_recoverable_gt [08:22:49] [PASSED] test_recoverable_comp [08:22:49] [PASSED] test_recoverable_comp_tile [08:22:49] [PASSED] test_recoverable_comp_gt [08:22:49] [PASSED] test_recoverable_all [08:22:49] [PASSED] test_info [08:22:49] [PASSED] test_info_tile [08:22:49] [PASSED] test_info_gt [08:22:49] [PASSED] test_info_err [08:22:49] [PASSED] test_info_comp [08:22:49] [PASSED] test_info_comp_tile [08:22:49] [PASSED] test_info_comp_gt [08:22:49] [PASSED] test_info_all [08:22:49] [PASSED] test_hw_fatal [08:22:49] [PASSED] test_hw_recoverable [08:22:49] [PASSED] test_hw_corrected [08:22:49] [PASSED] test_hw_informational [08:22:49] =================== [PASSED] test_dmesg ==================== [08:22:49] ====================== test_invalid ======================= [08:22:49] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG) [08:22:49] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG) [08:22:49] ================== [SKIPPED] test_invalid ================== [08:22:49] ===================== [PASSED] xe_log ====================== [08:22:49] ================== no_relay (3 subtests) =================== [08:22:49] [PASSED] xe_drops_guc2pf_if_not_ready [08:22:49] [PASSED] xe_drops_guc2vf_if_not_ready [08:22:49] [PASSED] xe_rejects_send_if_not_ready [08:22:49] ==================== [PASSED] no_relay ===================== [08:22:49] ================== pf_relay (14 subtests) ================== [08:22:49] [PASSED] pf_rejects_guc2pf_too_short [08:22:49] [PASSED] pf_rejects_guc2pf_too_long [08:22:49] [PASSED] pf_rejects_guc2pf_no_payload [08:22:49] [PASSED] pf_fails_no_payload [08:22:49] [PASSED] pf_fails_bad_origin [08:22:49] [PASSED] pf_fails_bad_type [08:22:49] [PASSED] pf_txn_reports_error [08:22:49] [PASSED] pf_txn_sends_pf2guc [08:22:49] [PASSED] pf_sends_pf2guc [08:22:49] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV) [08:22:49] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV) [08:22:49] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV) [08:22:49] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV) [08:22:49] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV) [08:22:49] ==================== [PASSED] pf_relay ===================== [08:22:49] ================== vf_relay (3 subtests) =================== [08:22:49] [PASSED] vf_rejects_guc2vf_too_short [08:22:49] [PASSED] vf_rejects_guc2vf_too_long [08:22:49] [PASSED] vf_rejects_guc2vf_no_payload [08:22:49] ==================== [PASSED] vf_relay ===================== [08:22:49] ================ pf_gt_config (9 subtests) ================= [08:22:49] [PASSED] fair_contexts_1vf [08:22:49] [PASSED] fair_doorbells_1vf [08:22:49] [PASSED] fair_ggtt_1vf [08:22:49] ====================== fair_vram_1vf ====================== [08:22:49] [PASSED] 3.50 GiB [08:22:49] [PASSED] 11.5 GiB [08:22:49] [PASSED] 15.5 GiB [08:22:49] [PASSED] 31.5 GiB [08:22:49] [PASSED] 63.5 GiB [08:22:49] [PASSED] 1.91 GiB [08:22:49] ================== [PASSED] fair_vram_1vf ================== [08:22:49] ================ fair_vram_1vf_admin_only ================= [08:22:49] [PASSED] 3.50 GiB [08:22:49] [PASSED] 11.5 GiB [08:22:49] [PASSED] 15.5 GiB [08:22:49] [PASSED] 31.5 GiB [08:22:49] [PASSED] 63.5 GiB [08:22:49] [PASSED] 1.91 GiB [08:22:49] ============ [PASSED] fair_vram_1vf_admin_only ============= [08:22:49] ====================== fair_contexts ====================== [08:22:49] [PASSED] 1 VF [08:22:49] [PASSED] 2 VFs [08:22:49] [PASSED] 3 VFs [08:22:49] [PASSED] 4 VFs [08:22:49] [PASSED] 5 VFs [08:22:49] [PASSED] 6 VFs [08:22:49] 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[PASSED] 44 VFs [08:22:49] [PASSED] 45 VFs [08:22:49] [PASSED] 46 VFs [08:22:49] [PASSED] 47 VFs [08:22:49] [PASSED] 48 VFs [08:22:49] [PASSED] 49 VFs [08:22:49] [PASSED] 50 VFs [08:22:49] [PASSED] 51 VFs [08:22:49] [PASSED] 52 VFs [08:22:49] [PASSED] 53 VFs [08:22:49] [PASSED] 54 VFs [08:22:49] [PASSED] 55 VFs [08:22:49] [PASSED] 56 VFs [08:22:49] [PASSED] 57 VFs [08:22:49] [PASSED] 58 VFs [08:22:49] [PASSED] 59 VFs [08:22:49] [PASSED] 60 VFs [08:22:49] [PASSED] 61 VFs [08:22:49] [PASSED] 62 VFs [08:22:49] [PASSED] 63 VFs [08:22:49] ================== [PASSED] fair_contexts ================== [08:22:49] ===================== fair_doorbells ====================== [08:22:49] [PASSED] 1 VF [08:22:49] [PASSED] 2 VFs [08:22:49] [PASSED] 3 VFs [08:22:49] [PASSED] 4 VFs [08:22:49] [PASSED] 5 VFs [08:22:49] [PASSED] 6 VFs [08:22:49] [PASSED] 7 VFs [08:22:49] [PASSED] 8 VFs [08:22:50] [PASSED] 9 VFs [08:22:50] [PASSED] 10 VFs [08:22:50] [PASSED] 11 VFs [08:22:50] [PASSED] 12 VFs [08:22:50] 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[PASSED] 50 VFs [08:22:50] [PASSED] 51 VFs [08:22:50] [PASSED] 52 VFs [08:22:50] [PASSED] 53 VFs [08:22:50] [PASSED] 54 VFs [08:22:50] [PASSED] 55 VFs [08:22:50] [PASSED] 56 VFs [08:22:50] [PASSED] 57 VFs [08:22:50] [PASSED] 58 VFs [08:22:50] [PASSED] 59 VFs [08:22:50] [PASSED] 60 VFs [08:22:50] [PASSED] 61 VFs [08:22:50] [PASSED] 62 VFs [08:22:50] [PASSED] 63 VFs [08:22:50] ================= [PASSED] fair_doorbells ================== [08:22:50] ======================== fair_ggtt ======================== [08:22:50] [PASSED] 1 VF [08:22:50] [PASSED] 2 VFs [08:22:50] [PASSED] 3 VFs [08:22:50] [PASSED] 4 VFs [08:22:50] [PASSED] 5 VFs [08:22:50] [PASSED] 6 VFs [08:22:50] [PASSED] 7 VFs [08:22:50] [PASSED] 8 VFs [08:22:50] [PASSED] 9 VFs [08:22:50] [PASSED] 10 VFs [08:22:50] [PASSED] 11 VFs [08:22:50] [PASSED] 12 VFs [08:22:50] [PASSED] 13 VFs [08:22:50] [PASSED] 14 VFs [08:22:50] [PASSED] 15 VFs [08:22:50] [PASSED] 16 VFs [08:22:50] [PASSED] 17 VFs [08:22:50] [PASSED] 18 VFs [08:22:50] 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[PASSED] 25 VFs [08:22:50] [PASSED] 26 VFs [08:22:50] [PASSED] 27 VFs [08:22:50] [PASSED] 28 VFs [08:22:50] [PASSED] 29 VFs [08:22:50] [PASSED] 30 VFs [08:22:50] [PASSED] 31 VFs [08:22:50] [PASSED] 32 VFs [08:22:50] [PASSED] 33 VFs [08:22:50] [PASSED] 34 VFs [08:22:50] [PASSED] 35 VFs [08:22:50] [PASSED] 36 VFs [08:22:50] [PASSED] 37 VFs [08:22:50] [PASSED] 38 VFs [08:22:50] [PASSED] 39 VFs [08:22:50] [PASSED] 40 VFs [08:22:50] [PASSED] 41 VFs [08:22:50] [PASSED] 42 VFs [08:22:50] [PASSED] 43 VFs [08:22:50] [PASSED] 44 VFs [08:22:50] [PASSED] 45 VFs [08:22:50] [PASSED] 46 VFs [08:22:50] [PASSED] 47 VFs [08:22:50] [PASSED] 48 VFs [08:22:50] [PASSED] 49 VFs [08:22:50] [PASSED] 50 VFs [08:22:50] [PASSED] 51 VFs [08:22:50] [PASSED] 52 VFs [08:22:50] [PASSED] 53 VFs [08:22:50] [PASSED] 54 VFs [08:22:50] [PASSED] 55 VFs [08:22:50] [PASSED] 56 VFs [08:22:50] [PASSED] 57 VFs [08:22:50] [PASSED] 58 VFs [08:22:50] [PASSED] 59 VFs [08:22:50] [PASSED] 60 VFs [08:22:50] [PASSED] 61 VFs [08:22:50] [PASSED] 62 VFs [08:22:50] [PASSED] 63 VFs [08:22:50] ==================== [PASSED] fair_vram ==================== [08:22:50] ================== [PASSED] pf_gt_config =================== [08:22:50] ===================== lmtt (1 subtest) ===================== [08:22:50] ======================== test_ops ========================= [08:22:50] [PASSED] 2-level [08:22:50] [PASSED] multi-level [08:22:50] ==================== [PASSED] test_ops ===================== [08:22:50] ====================== [PASSED] lmtt ======================= [08:22:50] ================= sriov_packet (1 subtest) ================= [08:22:50] [PASSED] test_descriptor_init [08:22:50] ================== [PASSED] sriov_packet =================== [08:22:50] ================= pf_service (11 subtests) ================= [08:22:50] [PASSED] pf_negotiate_any [08:22:50] [PASSED] pf_negotiate_base_match [08:22:50] [PASSED] pf_negotiate_base_newer [08:22:50] [PASSED] pf_negotiate_base_next [08:22:50] [SKIPPED] pf_negotiate_base_older (no older minor) [08:22:50] [PASSED] pf_negotiate_base_prev [08:22:50] [PASSED] pf_negotiate_latest_match [08:22:50] [PASSED] pf_negotiate_latest_newer [08:22:50] [PASSED] pf_negotiate_latest_next [08:22:50] [SKIPPED] pf_negotiate_latest_older (no older minor) [08:22:50] [SKIPPED] pf_negotiate_latest_prev (no prev major) [08:22:50] =================== [PASSED] pf_service ==================== [08:22:50] ================= xe_guc_g2g (2 subtests) ================== [08:22:50] ============== xe_live_guc_g2g_kunit_default ============== [08:22:50] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [08:22:50] ============== xe_live_guc_g2g_kunit_allmem =============== [08:22:50] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [08:22:50] =================== [SKIPPED] xe_guc_g2g =================== [08:22:50] =================== xe_mocs (2 subtests) =================== [08:22:50] ================ xe_live_mocs_kernel_kunit ================ [08:22:50] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [08:22:50] ================ xe_live_mocs_reset_kunit ================= [08:22:50] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [08:22:50] ==================== [SKIPPED] xe_mocs ===================== [08:22:50] ================= xe_migrate (2 subtests) ================== [08:22:50] ================= xe_migrate_sanity_kunit ================= [08:22:50] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [08:22:50] ================== xe_validate_ccs_kunit ================== [08:22:50] ============= [SKIPPED] xe_validate_ccs_kunit ============== [08:22:50] =================== [SKIPPED] xe_migrate =================== [08:22:50] ================== xe_dma_buf (1 subtest) ================== [08:22:50] ==================== xe_dma_buf_kunit ===================== [08:22:50] ================ [SKIPPED] xe_dma_buf_kunit ================ [08:22:50] =================== [SKIPPED] xe_dma_buf =================== [08:22:50] ================= xe_bo_shrink (1 subtest) ================= [08:22:50] =================== xe_bo_shrink_kunit ==================== [08:22:50] =============== [SKIPPED] xe_bo_shrink_kunit =============== [08:22:50] ================== [SKIPPED] xe_bo_shrink ================== [08:22:50] ==================== xe_bo (2 subtests) ==================== [08:22:50] ================== xe_ccs_migrate_kunit =================== [08:22:50] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [08:22:50] ==================== xe_bo_evict_kunit ==================== [08:22:50] =============== [SKIPPED] xe_bo_evict_kunit ================ [08:22:50] ===================== [SKIPPED] xe_bo ====================== [08:22:50] =================== xe_any (9 subtests) ==================== [08:22:50] [PASSED] test_to_xe [08:22:50] [PASSED] test_to_dev [08:22:50] [PASSED] test_to_pdev [08:22:50] [PASSED] test_to_drm [08:22:50] [PASSED] test_if_pdev [08:22:50] [PASSED] test_if_xe [08:22:50] [PASSED] test_if_tile [08:22:50] [PASSED] test_if_gt [08:22:50] [PASSED] test_to_id [08:22:50] ===================== [PASSED] xe_any ====================== [08:22:50] ==================== args (13 subtests) ==================== [08:22:50] [PASSED] count_args_test [08:22:50] [PASSED] call_args_example [08:22:50] [PASSED] call_args_test [08:22:50] [PASSED] drop_first_arg_example [08:22:50] [PASSED] drop_first_arg_test [08:22:50] [PASSED] first_arg_example [08:22:50] [PASSED] first_arg_test [08:22:50] [PASSED] last_arg_example [08:22:50] [PASSED] last_arg_test [08:22:50] [PASSED] pick_arg_example [08:22:50] [PASSED] if_args_example [08:22:50] [PASSED] if_args_test [08:22:50] [PASSED] sep_comma_example [08:22:50] ====================== [PASSED] args ======================= [08:22:50] =================== xe_pci (3 subtests) ==================== [08:22:50] ==================== check_graphics_ip ==================== [08:22:50] [PASSED] 12.00 Xe_LP [08:22:50] [PASSED] 12.10 Xe_LP+ [08:22:50] [PASSED] 12.55 Xe_HPG [08:22:50] [PASSED] 12.60 Xe_HPC [08:22:50] [PASSED] 12.70 Xe_LPG [08:22:50] [PASSED] 12.71 Xe_LPG [08:22:50] [PASSED] 12.74 Xe_LPG+ [08:22:50] [PASSED] 20.01 Xe2_HPG [08:22:50] [PASSED] 20.02 Xe2_HPG [08:22:50] [PASSED] 20.04 Xe2_LPG [08:22:50] [PASSED] 30.00 Xe3_LPG [08:22:50] [PASSED] 30.01 Xe3_LPG [08:22:50] [PASSED] 30.03 Xe3_LPG [08:22:50] [PASSED] 30.04 Xe3_LPG [08:22:50] [PASSED] 30.05 Xe3_LPG [08:22:50] [PASSED] 35.10 Xe3p_LPG [08:22:50] [PASSED] 35.11 Xe3p_XPC [08:22:50] ================ [PASSED] check_graphics_ip ================ [08:22:50] ===================== check_media_ip ====================== [08:22:50] [PASSED] 12.00 Xe_M [08:22:50] [PASSED] 12.55 Xe_HPM [08:22:50] [PASSED] 13.00 Xe_LPM+ [08:22:50] [PASSED] 13.01 Xe2_HPM [08:22:50] [PASSED] 20.00 Xe2_LPM [08:22:50] [PASSED] 30.00 Xe3_LPM [08:22:50] [PASSED] 30.02 Xe3_LPM [08:22:50] [PASSED] 35.00 Xe3p_LPM [08:22:50] [PASSED] 35.03 Xe3p_HPM [08:22:50] ================= [PASSED] check_media_ip ================== [08:22:50] =================== check_platform_desc =================== [08:22:50] [PASSED] 0x9A60 (TIGERLAKE) [08:22:50] [PASSED] 0x9A68 (TIGERLAKE) [08:22:50] [PASSED] 0x9A70 (TIGERLAKE) [08:22:50] [PASSED] 0x9A40 (TIGERLAKE) [08:22:50] [PASSED] 0x9A49 (TIGERLAKE) [08:22:50] [PASSED] 0x9A59 (TIGERLAKE) [08:22:50] [PASSED] 0x9A78 (TIGERLAKE) [08:22:50] [PASSED] 0x9AC0 (TIGERLAKE) [08:22:50] [PASSED] 0x9AC9 (TIGERLAKE) [08:22:50] [PASSED] 0x9AD9 (TIGERLAKE) [08:22:50] [PASSED] 0x9AF8 (TIGERLAKE) [08:22:50] [PASSED] 0x4C80 (ROCKETLAKE) [08:22:50] [PASSED] 0x4C8A (ROCKETLAKE) [08:22:50] [PASSED] 0x4C8B (ROCKETLAKE) [08:22:50] [PASSED] 0x4C8C (ROCKETLAKE) [08:22:50] [PASSED] 0x4C90 (ROCKETLAKE) [08:22:50] [PASSED] 0x4C9A (ROCKETLAKE) [08:22:50] [PASSED] 0x4680 (ALDERLAKE_S) [08:22:50] [PASSED] 0x4682 (ALDERLAKE_S) [08:22:50] [PASSED] 0x4688 (ALDERLAKE_S) [08:22:50] [PASSED] 0x468A (ALDERLAKE_S) [08:22:50] [PASSED] 0x468B (ALDERLAKE_S) [08:22:50] [PASSED] 0x4690 (ALDERLAKE_S) [08:22:50] [PASSED] 0x4692 (ALDERLAKE_S) [08:22:50] [PASSED] 0x4693 (ALDERLAKE_S) [08:22:50] [PASSED] 0x46A0 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46A1 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46A2 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46A3 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46A6 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46A8 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46AA (ALDERLAKE_P) [08:22:50] [PASSED] 0x462A (ALDERLAKE_P) [08:22:50] [PASSED] 0x4626 (ALDERLAKE_P) [08:22:50] [PASSED] 0x4628 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46B0 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46B1 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46B2 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46B3 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46C0 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46C1 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46C2 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46C3 (ALDERLAKE_P) [08:22:50] [PASSED] 0x46D0 (ALDERLAKE_N) [08:22:50] [PASSED] 0x46D1 (ALDERLAKE_N) [08:22:50] [PASSED] 0x46D2 (ALDERLAKE_N) [08:22:50] [PASSED] 0x46D3 (ALDERLAKE_N) [08:22:50] [PASSED] 0x46D4 (ALDERLAKE_N) [08:22:50] [PASSED] 0xA721 (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7A1 (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7A9 (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7AC (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7AD (ALDERLAKE_P) [08:22:50] [PASSED] 0xA720 (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7A0 (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7A8 (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7AA (ALDERLAKE_P) [08:22:50] [PASSED] 0xA7AB (ALDERLAKE_P) [08:22:50] [PASSED] 0xA780 (ALDERLAKE_S) [08:22:50] [PASSED] 0xA781 (ALDERLAKE_S) [08:22:50] [PASSED] 0xA782 (ALDERLAKE_S) [08:22:50] [PASSED] 0xA783 (ALDERLAKE_S) [08:22:50] [PASSED] 0xA788 (ALDERLAKE_S) [08:22:50] [PASSED] 0xA789 (ALDERLAKE_S) [08:22:50] [PASSED] 0xA78A (ALDERLAKE_S) [08:22:50] [PASSED] 0xA78B (ALDERLAKE_S) [08:22:50] [PASSED] 0x4905 (DG1) [08:22:50] [PASSED] 0x4906 (DG1) [08:22:50] [PASSED] 0x4907 (DG1) [08:22:50] [PASSED] 0x4908 (DG1) [08:22:50] [PASSED] 0x4909 (DG1) [08:22:50] [PASSED] 0x56C0 (DG2) [08:22:50] [PASSED] 0x56C2 (DG2) [08:22:50] [PASSED] 0x56C1 (DG2) [08:22:50] [PASSED] 0x7D51 (METEORLAKE) [08:22:50] [PASSED] 0x7DD1 (METEORLAKE) [08:22:50] [PASSED] 0x7D41 (METEORLAKE) [08:22:50] [PASSED] 0x7D67 (METEORLAKE) [08:22:50] [PASSED] 0xB640 (METEORLAKE) [08:22:50] [PASSED] 0x56A0 (DG2) [08:22:50] [PASSED] 0x56A1 (DG2) [08:22:50] [PASSED] 0x56A2 (DG2) [08:22:50] [PASSED] 0x56BE (DG2) [08:22:50] [PASSED] 0x56BF (DG2) [08:22:50] [PASSED] 0x5690 (DG2) [08:22:50] [PASSED] 0x5691 (DG2) [08:22:50] [PASSED] 0x5692 (DG2) [08:22:50] [PASSED] 0x56A5 (DG2) [08:22:50] [PASSED] 0x56A6 (DG2) [08:22:50] [PASSED] 0x56B0 (DG2) [08:22:50] [PASSED] 0x56B1 (DG2) [08:22:50] [PASSED] 0x56BA (DG2) [08:22:50] [PASSED] 0x56BB (DG2) [08:22:50] [PASSED] 0x56BC (DG2) [08:22:50] [PASSED] 0x56BD (DG2) [08:22:50] [PASSED] 0x5693 (DG2) [08:22:50] [PASSED] 0x5694 (DG2) [08:22:50] [PASSED] 0x5695 (DG2) [08:22:50] [PASSED] 0x56A3 (DG2) [08:22:50] [PASSED] 0x56A4 (DG2) [08:22:50] [PASSED] 0x56B2 (DG2) [08:22:50] [PASSED] 0x56B3 (DG2) [08:22:50] [PASSED] 0x5696 (DG2) [08:22:50] [PASSED] 0x5697 (DG2) [08:22:50] [PASSED] 0xB69 (PVC) [08:22:50] [PASSED] 0xB6E (PVC) [08:22:50] [PASSED] 0xBD4 (PVC) [08:22:50] [PASSED] 0xBD5 (PVC) [08:22:50] [PASSED] 0xBD6 (PVC) [08:22:50] [PASSED] 0xBD7 (PVC) [08:22:50] [PASSED] 0xBD8 (PVC) [08:22:50] [PASSED] 0xBD9 (PVC) [08:22:50] [PASSED] 0xBDA (PVC) [08:22:50] [PASSED] 0xBDB (PVC) [08:22:50] [PASSED] 0xBE0 (PVC) [08:22:50] [PASSED] 0xBE1 (PVC) [08:22:50] [PASSED] 0xBE5 (PVC) [08:22:50] [PASSED] 0x7D40 (METEORLAKE) [08:22:50] [PASSED] 0x7D45 (METEORLAKE) [08:22:50] [PASSED] 0x7D55 (METEORLAKE) [08:22:50] [PASSED] 0x7D60 (METEORLAKE) [08:22:50] [PASSED] 0x7DD5 (METEORLAKE) [08:22:50] [PASSED] 0x6420 (LUNARLAKE) [08:22:50] [PASSED] 0x64A0 (LUNARLAKE) [08:22:50] [PASSED] 0x64B0 (LUNARLAKE) [08:22:50] [PASSED] 0xE202 (BATTLEMAGE) [08:22:50] [PASSED] 0xE209 (BATTLEMAGE) [08:22:50] [PASSED] 0xE20B (BATTLEMAGE) [08:22:50] [PASSED] 0xE20C (BATTLEMAGE) [08:22:50] [PASSED] 0xE20D (BATTLEMAGE) [08:22:50] [PASSED] 0xE210 (BATTLEMAGE) [08:22:50] [PASSED] 0xE211 (BATTLEMAGE) [08:22:50] [PASSED] 0xE212 (BATTLEMAGE) [08:22:50] [PASSED] 0xE216 (BATTLEMAGE) [08:22:50] [PASSED] 0xE220 (BATTLEMAGE) [08:22:50] [PASSED] 0xE221 (BATTLEMAGE) [08:22:50] [PASSED] 0xE222 (BATTLEMAGE) [08:22:50] [PASSED] 0xE223 (BATTLEMAGE) [08:22:50] [PASSED] 0xB080 (PANTHERLAKE) [08:22:50] [PASSED] 0xB081 (PANTHERLAKE) [08:22:50] [PASSED] 0xB082 (PANTHERLAKE) [08:22:50] [PASSED] 0xB083 (PANTHERLAKE) [08:22:50] [PASSED] 0xB084 (PANTHERLAKE) [08:22:50] [PASSED] 0xB085 (PANTHERLAKE) [08:22:50] [PASSED] 0xB086 (PANTHERLAKE) [08:22:50] [PASSED] 0xB087 (PANTHERLAKE) [08:22:50] [PASSED] 0xB08F (PANTHERLAKE) [08:22:50] [PASSED] 0xB090 (PANTHERLAKE) [08:22:50] [PASSED] 0xB0A0 (PANTHERLAKE) [08:22:50] [PASSED] 0xB0B0 (PANTHERLAKE) [08:22:50] [PASSED] 0xFD80 (PANTHERLAKE) [08:22:50] [PASSED] 0xFD81 (PANTHERLAKE) [08:22:50] [PASSED] 0xD740 (NOVALAKE_S) [08:22:50] [PASSED] 0xD741 (NOVALAKE_S) [08:22:50] [PASSED] 0xD742 (NOVALAKE_S) [08:22:50] [PASSED] 0xD743 (NOVALAKE_S) [08:22:50] [PASSED] 0xD745 (NOVALAKE_S) [08:22:50] [PASSED] 0xD74A (NOVALAKE_S) [08:22:50] [PASSED] 0xD74B (NOVALAKE_S) [08:22:50] [PASSED] 0x674C (CRESCENTISLAND) [08:22:50] [PASSED] 0x674D (CRESCENTISLAND) [08:22:50] [PASSED] 0x674E (CRESCENTISLAND) [08:22:50] [PASSED] 0x674F (CRESCENTISLAND) [08:22:50] [PASSED] 0x6750 (CRESCENTISLAND) [08:22:50] [PASSED] 0xD750 (NOVALAKE_P) [08:22:50] [PASSED] 0xD751 (NOVALAKE_P) [08:22:50] [PASSED] 0xD752 (NOVALAKE_P) [08:22:50] [PASSED] 0xD753 (NOVALAKE_P) [08:22:50] [PASSED] 0xD754 (NOVALAKE_P) [08:22:50] [PASSED] 0xD755 (NOVALAKE_P) [08:22:50] [PASSED] 0xD756 (NOVALAKE_P) [08:22:50] [PASSED] 0xD757 (NOVALAKE_P) [08:22:50] [PASSED] 0xD75F (NOVALAKE_P) [08:22:50] =============== [PASSED] check_platform_desc =============== [08:22:50] ===================== [PASSED] xe_pci ====================== [08:22:50] ============= xe_rtp_tables_test (5 subtests) ============== [08:22:50] ================== xe_rtp_table_gt_test =================== [08:22:50] [PASSED] gt_was/14011060649 [08:22:50] [PASSED] gt_was/14011059788 [08:22:50] [PASSED] gt_was/14015795083 [08:22:50] [PASSED] gt_was/16021867713 [08:22:50] [PASSED] gt_was/14019449301 [08:22:50] [PASSED] gt_was/16028005424 [08:22:50] [PASSED] gt_was/14026578760 [08:22:50] [PASSED] gt_was/1409420604 [08:22:50] [PASSED] gt_was/1408615072 [08:22:50] [PASSED] gt_was/22010523718 [08:22:50] [PASSED] gt_was/14011006942 [08:22:50] [PASSED] gt_was/14014830051 [08:22:50] [PASSED] gt_was/18018781329 [08:22:50] [PASSED] gt_was/1509235366 [08:22:50] [PASSED] gt_was/18018781329 [08:22:50] [PASSED] gt_was/16016694945 [08:22:50] [PASSED] gt_was/14018575942 [08:22:50] [PASSED] gt_was/22016670082 [08:22:50] [PASSED] gt_was/22016670082 [08:22:50] [PASSED] gt_was/14017421178 [08:22:50] [PASSED] gt_was/16025250150 [08:22:50] [PASSED] gt_was/14021871409 [08:22:50] [PASSED] gt_was/16021865536 [08:22:50] [PASSED] gt_was/14021486841 [08:22:50] [PASSED] gt_was/14025160223 [08:22:50] [PASSED] gt_was/14026144927, 16029437861, 14026127056 [08:22:50] [PASSED] gt_was/14025635424 [08:22:50] [PASSED] gt_was/16028005424 [08:22:50] ============== [PASSED] xe_rtp_table_gt_test =============== [08:22:50] ================== xe_rtp_table_gt_test =================== [08:22:50] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable [08:22:50] [PASSED] gt_tunings/Tuning: 32B Access Enable [08:22:50] [PASSED] gt_tunings/Tuning: L3 cache [08:22:50] [PASSED] gt_tunings/Tuning: L3 cache - media [08:22:50] [PASSED] gt_tunings/Tuning: Compression Overfetch [08:22:50] [PASSED] gt_tunings/Tuning: Compression Overfetch - media [08:22:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 [08:22:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media [08:22:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only [08:22:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media [08:22:50] [PASSED] gt_tunings/Tuning: Stateless compression control [08:22:50] [PASSED] gt_tunings/Tuning: Stateless compression control - media [08:22:50] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache [08:22:50] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media [08:22:50] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB [08:22:50] ============== [PASSED] xe_rtp_table_gt_test =============== [08:22:50] ================== xe_rtp_table_oob_test ================== [08:22:50] [PASSED] oob_was/1607983814 [08:22:50] [PASSED] oob_was/16010904313 [08:22:50] [PASSED] oob_was/18022495364 [08:22:50] [PASSED] oob_was/22012773006 [08:22:50] [PASSED] oob_was/14014475959 [08:22:50] [PASSED] oob_was/22011391025 [08:22:50] [PASSED] oob_was/22012727170 [08:22:50] [PASSED] oob_was/22012727685 [08:22:50] [PASSED] oob_was/22016596838 [08:22:50] [PASSED] oob_was/18020744125 [08:22:50] [PASSED] oob_was/1409600907 [08:22:50] [PASSED] oob_was/22014953428 [08:22:50] [PASSED] oob_was/16017236439 [08:22:50] [PASSED] oob_was/14019821291 [08:22:50] [PASSED] oob_was/14015076503 [08:22:50] [PASSED] oob_was/14018913170 [08:22:50] [PASSED] oob_was/14018094691 [08:22:50] [PASSED] oob_was/18024947630 [08:22:50] [PASSED] oob_was/16022287689 [08:22:50] [PASSED] oob_was/13011645652 [08:22:50] [PASSED] oob_was/14022293748 [08:22:50] [PASSED] oob_was/22019794406 [08:22:50] [PASSED] oob_was/22019338487 [08:22:50] [PASSED] oob_was/16023588340 [08:22:50] [PASSED] oob_was/14019789679 [08:22:50] [PASSED] oob_was/14022866841 [08:22:50] [PASSED] oob_was/16021333562 [08:22:50] [PASSED] oob_was/14016712196 [08:22:50] [PASSED] oob_was/14015568240 [08:22:50] [PASSED] oob_was/18013179988 [08:22:50] [PASSED] oob_was/1508761755 [08:22:50] [PASSED] oob_was/16023105232 [08:22:50] [PASSED] oob_was/16026508708 [08:22:50] [PASSED] oob_was/14020001231 [08:22:50] [PASSED] oob_was/16023683509 [08:22:50] [PASSED] oob_was/14025515070 [08:22:50] [PASSED] oob_was/15015404425_disable [08:22:50] [PASSED] oob_was/16026007364 [08:22:50] [PASSED] oob_was/14020316580 [08:22:50] [PASSED] oob_was/14025883347 [08:22:50] [PASSED] oob_was/16029380221 [08:22:50] [PASSED] oob_was/22022079272 [08:22:50] [PASSED] oob_was/16029897822 [08:22:50] [PASSED] oob_was/14027054324 [08:22:50] [PASSED] oob_was/14025941587 [08:22:50] ============== [PASSED] xe_rtp_table_oob_test ============== [08:22:50] ================ xe_rtp_table_dev_oob_test ================ [08:22:50] [PASSED] device_oob_was/22010954014 [08:22:50] [PASSED] device_oob_was/15015404425 [08:22:50] [PASSED] device_oob_was/22019338487_display [08:22:50] [PASSED] device_oob_was/14022085890 [08:22:50] [PASSED] device_oob_was/14026539277 [08:22:50] [PASSED] device_oob_was/14026633728 [08:22:50] [PASSED] device_oob_was/14026746987 [08:22:50] [PASSED] device_oob_was/14026779378 [08:22:50] ============ [PASSED] xe_rtp_table_dev_oob_test ============ [08:22:50] ========== xe_rtp_table_missing_upper_bound_test ========== [08:22:50] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865 [08:22:50] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037 [08:22:50] [PASSED] register_whitelist/1806527549 [08:22:50] [PASSED] register_whitelist/allow_read_ctx_timestamp [08:22:50] [PASSED] register_whitelist/allow_read_queue_timestamp [08:22:50] [PASSED] register_whitelist/16014440446 [08:22:50] [PASSED] register_whitelist/16017236439 [08:22:50] [PASSED] register_whitelist/16020183090 [08:22:50] [PASSED] register_whitelist/14024997852 [08:22:50] [PASSED] register_whitelist/14024997852 [08:22:50] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ====== [08:22:50] =============== [PASSED] xe_rtp_tables_test ================ [08:22:50] =================== xe_rtp (3 subtests) ==================== [08:22:50] =================== xe_rtp_rules_tests ==================== [08:22:50] [PASSED] no [08:22:50] [PASSED] yes [08:22:50] [PASSED] no-and-no [08:22:50] [PASSED] no-and-yes [08:22:50] [PASSED] yes-and-no [08:22:50] [PASSED] yes-and-yes [08:22:50] [PASSED] no-or-no [08:22:50] [PASSED] no-or-yes [08:22:50] [PASSED] yes-or-no [08:22:50] [PASSED] yes-or-yes [08:22:50] [PASSED] no-yes-or-yes-no [08:22:50] [PASSED] no-yes-or-yes-yes [08:22:50] [PASSED] yes-yes-or-no-yes [08:22:50] [PASSED] yes-yes-or-yes-yes [08:22:50] [PASSED] no-no-or-yes-or-no [08:22:50] [PASSED] or [08:22:50] [PASSED] or-yes [08:22:50] [PASSED] or-no [08:22:50] [PASSED] yes-or [08:22:50] [PASSED] no-or [08:22:50] [PASSED] no-or-or-yes [08:22:50] [PASSED] yes-or-or-no [08:22:50] [PASSED] no-or-or-no [08:22:50] [PASSED] missing-context-engine-class [08:22:50] [PASSED] missing-context-engine-class-or-yes [08:22:50] [PASSED] missing-context-engine-class-or-or-yes [08:22:50] =============== [PASSED] xe_rtp_rules_tests ================ [08:22:50] =============== xe_rtp_process_to_sr_tests ================ [08:22:50] [PASSED] coalesce-same-reg [08:22:50] [PASSED] coalesce-same-reg-literal-and-func [08:22:50] [PASSED] no-match-no-add [08:22:50] [PASSED] two-regs-two-entries [08:22:50] [PASSED] clr-one-set-other [08:22:50] [PASSED] set-field [08:22:50] [PASSED] conflict-duplicate [08:22:50] [PASSED] conflict-not-disjoint [08:22:50] [PASSED] conflict-not-disjoint-literal-and-func [08:22:50] [PASSED] conflict-reg-type [08:22:50] [PASSED] bad-mcr-reg-forced-to-regular [08:22:50] [PASSED] bad-regular-reg-forced-to-mcr [08:22:50] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [08:22:50] ================== xe_rtp_process_tests =================== [08:22:50] [PASSED] active1 [08:22:50] [PASSED] active2 [08:22:50] [PASSED] active-inactive [08:22:50] [PASSED] inactive-active [08:22:50] [PASSED] inactive-active-inactive [08:22:50] [PASSED] inactive-inactive-inactive [08:22:50] ============== [PASSED] xe_rtp_process_tests =============== [08:22:50] ===================== [PASSED] xe_rtp ====================== [08:22:50] ==================== xe_wa (1 subtest) ===================== [08:22:50] ======================== xe_wa_gt ========================= [08:22:50] [PASSED] TIGERLAKE B0 [08:22:50] [PASSED] DG1 A0 [08:22:50] [PASSED] DG1 B0 [08:22:50] [PASSED] ALDERLAKE_S A0 [08:22:50] [PASSED] ALDERLAKE_S B0 [08:22:50] [PASSED] ALDERLAKE_S C0 [08:22:50] [PASSED] ALDERLAKE_S D0 [08:22:50] [PASSED] ALDERLAKE_P A0 [08:22:50] [PASSED] ALDERLAKE_P B0 [08:22:50] [PASSED] ALDERLAKE_P C0 [08:22:50] [PASSED] ALDERLAKE_S RPLS D0 [08:22:50] [PASSED] ALDERLAKE_P RPLU E0 [08:22:50] [PASSED] DG2 G10 C0 [08:22:50] [PASSED] DG2 G11 B1 [08:22:50] [PASSED] DG2 G12 A1 [08:22:50] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [08:22:50] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [08:22:50] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [08:22:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [08:22:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [08:22:50] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [08:22:50] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [08:22:50] ==================== [PASSED] xe_wa_gt ===================== [08:22:50] ====================== [PASSED] xe_wa ====================== [08:22:50] ============================================================ [08:22:50] Testing complete. Ran 794 tests: passed: 766, skipped: 28 [08:22:50] Elapsed time: 36.126s total, 1.803s configuring, 33.557s building, 0.711s running + for kcfg in "${kunitconfigs[@]}" + [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]] + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [08:22:50] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [08:22:52] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [08:23:17] Starting KUnit Kernel (1/1)... [08:23:17] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [08:23:17] ============= refcount_interrupt (4 subtests) ============== [08:23:17] [PASSED] test_single_irq_change [08:23:17] [PASSED] test_nested_irq_change [08:23:17] [PASSED] test_multiple_irq_change [08:23:17] [PASSED] test_irq_save [08:23:17] =============== [PASSED] refcount_interrupt ================ [08:23:17] ============ drm_test_pick_cmdline (2 subtests) ============ [08:23:17] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [08:23:17] =============== drm_test_pick_cmdline_named =============== [08:23:17] [PASSED] NTSC [08:23:17] [PASSED] NTSC-J [08:23:17] [PASSED] PAL [08:23:17] [PASSED] PAL-M [08:23:17] =========== [PASSED] drm_test_pick_cmdline_named =========== [08:23:17] ============== [PASSED] drm_test_pick_cmdline ============== [08:23:17] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [08:23:17] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [08:23:17] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [08:23:17] =========== drm_validate_clone_mode (2 subtests) =========== [08:23:17] ============== drm_test_check_in_clone_mode =============== [08:23:17] [PASSED] in_clone_mode [08:23:17] [PASSED] not_in_clone_mode [08:23:17] ========== [PASSED] drm_test_check_in_clone_mode =========== [08:23:17] =============== drm_test_check_valid_clones =============== [08:23:17] [PASSED] not_in_clone_mode [08:23:17] [PASSED] valid_clone [08:23:17] [PASSED] invalid_clone [08:23:17] =========== [PASSED] drm_test_check_valid_clones =========== [08:23:17] ============= [PASSED] drm_validate_clone_mode ============= [08:23:17] ============= drm_validate_modeset (1 subtest) ============= [08:23:17] [PASSED] drm_test_check_connector_changed_modeset [08:23:17] ============== [PASSED] drm_validate_modeset =============== [08:23:17] ====== drm_test_bridge_get_current_state (1 subtest) ======= [08:23:17] [PASSED] drm_test_drm_bridge_get_current_state_atomic [08:23:17] ======== [PASSED] drm_test_bridge_get_current_state ======== [08:23:17] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [08:23:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [08:23:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [08:23:17] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts [08:23:17] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [08:23:17] ============== drm_bridge_alloc (2 subtests) =============== [08:23:17] [PASSED] drm_test_drm_bridge_alloc_basic [08:23:17] [PASSED] drm_test_drm_bridge_alloc_get_put [08:23:17] ================ [PASSED] drm_bridge_alloc ================= [08:23:17] ============= drm_bridge_bus_fmt (5 subtests) ============== [08:23:17] [PASSED] drm_test_bridge_rgb_yuv_rgb [08:23:17] [PASSED] drm_test_bridge_must_convert_to_yuv444 [08:23:17] [PASSED] drm_test_bridge_hdmi_auto_rgb [08:23:17] [PASSED] drm_test_bridge_auto_first [08:23:17] [PASSED] drm_test_bridge_rgb_yuv_no_path [08:23:17] =============== [PASSED] drm_bridge_bus_fmt ================ [08:23:17] ============= drm_cmdline_parser (40 subtests) ============= [08:23:17] [PASSED] drm_test_cmdline_force_d_only [08:23:17] [PASSED] drm_test_cmdline_force_D_only_dvi [08:23:17] [PASSED] drm_test_cmdline_force_D_only_hdmi [08:23:17] [PASSED] drm_test_cmdline_force_D_only_not_digital [08:23:17] [PASSED] drm_test_cmdline_force_e_only [08:23:17] [PASSED] drm_test_cmdline_res [08:23:17] [PASSED] drm_test_cmdline_res_vesa [08:23:17] [PASSED] drm_test_cmdline_res_vesa_rblank [08:23:17] [PASSED] drm_test_cmdline_res_rblank [08:23:17] [PASSED] drm_test_cmdline_res_bpp [08:23:17] [PASSED] drm_test_cmdline_res_refresh [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [08:23:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [08:23:17] [PASSED] drm_test_cmdline_res_margins_force_on [08:23:17] [PASSED] drm_test_cmdline_res_vesa_margins [08:23:17] [PASSED] drm_test_cmdline_name [08:23:17] [PASSED] drm_test_cmdline_name_bpp [08:23:17] [PASSED] drm_test_cmdline_name_option [08:23:17] [PASSED] drm_test_cmdline_name_bpp_option [08:23:17] [PASSED] drm_test_cmdline_rotate_0 [08:23:17] [PASSED] drm_test_cmdline_rotate_90 [08:23:17] [PASSED] drm_test_cmdline_rotate_180 [08:23:17] [PASSED] drm_test_cmdline_rotate_270 [08:23:17] [PASSED] drm_test_cmdline_hmirror [08:23:17] [PASSED] drm_test_cmdline_vmirror [08:23:17] [PASSED] drm_test_cmdline_margin_options [08:23:17] [PASSED] drm_test_cmdline_multiple_options [08:23:17] [PASSED] drm_test_cmdline_bpp_extra_and_option [08:23:17] [PASSED] drm_test_cmdline_extra_and_option [08:23:17] [PASSED] drm_test_cmdline_freestanding_options [08:23:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [08:23:17] [PASSED] drm_test_cmdline_panel_orientation [08:23:17] ================ drm_test_cmdline_invalid ================= [08:23:17] [PASSED] margin_only [08:23:17] [PASSED] interlace_only [08:23:17] [PASSED] res_missing_x [08:23:17] [PASSED] res_missing_y [08:23:17] [PASSED] res_bad_y [08:23:17] [PASSED] res_missing_y_bpp [08:23:17] [PASSED] res_bad_bpp [08:23:17] [PASSED] res_bad_refresh [08:23:17] [PASSED] res_bpp_refresh_force_on_off [08:23:17] [PASSED] res_invalid_mode [08:23:17] [PASSED] res_bpp_wrong_place_mode [08:23:17] [PASSED] name_bpp_refresh [08:23:17] [PASSED] name_refresh [08:23:17] [PASSED] name_refresh_wrong_mode [08:23:17] [PASSED] name_refresh_invalid_mode [08:23:17] [PASSED] rotate_multiple [08:23:17] [PASSED] rotate_invalid_val [08:23:17] [PASSED] rotate_truncated [08:23:17] [PASSED] invalid_option [08:23:17] [PASSED] invalid_tv_option [08:23:17] [PASSED] truncated_tv_option [08:23:17] ============ [PASSED] drm_test_cmdline_invalid ============= [08:23:17] =============== drm_test_cmdline_tv_options =============== [08:23:17] [PASSED] NTSC [08:23:17] [PASSED] NTSC_443 [08:23:17] [PASSED] NTSC_J [08:23:17] [PASSED] PAL [08:23:17] [PASSED] PAL_M [08:23:17] [PASSED] PAL_N [08:23:17] [PASSED] SECAM [08:23:17] [PASSED] MONO_525 [08:23:17] [PASSED] MONO_625 [08:23:17] =========== [PASSED] drm_test_cmdline_tv_options =========== [08:23:17] =============== [PASSED] drm_cmdline_parser ================ [08:23:17] ========== drmm_connector_hdmi_init (20 subtests) ========== [08:23:17] [PASSED] drm_test_connector_hdmi_init_valid [08:23:17] [PASSED] drm_test_connector_hdmi_init_bpc_8 [08:23:17] [PASSED] drm_test_connector_hdmi_init_bpc_10 [08:23:17] [PASSED] drm_test_connector_hdmi_init_bpc_12 [08:23:17] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [08:23:17] [PASSED] drm_test_connector_hdmi_init_bpc_null [08:23:17] [PASSED] drm_test_connector_hdmi_init_formats_empty [08:23:17] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [08:23:17] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [08:23:17] [PASSED] supported_formats=0x9 yuv420_allowed=1 [08:23:17] [PASSED] supported_formats=0x9 yuv420_allowed=0 [08:23:17] [PASSED] supported_formats=0x5 yuv420_allowed=1 [08:23:17] [PASSED] supported_formats=0x5 yuv420_allowed=0 [08:23:17] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [08:23:17] [PASSED] drm_test_connector_hdmi_init_null_ddc [08:23:17] [PASSED] drm_test_connector_hdmi_init_null_product [08:23:17] [PASSED] drm_test_connector_hdmi_init_null_vendor [08:23:17] [PASSED] drm_test_connector_hdmi_init_product_length_exact [08:23:17] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [08:23:17] [PASSED] drm_test_connector_hdmi_init_product_valid [08:23:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [08:23:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [08:23:17] [PASSED] drm_test_connector_hdmi_init_vendor_valid [08:23:17] ========= drm_test_connector_hdmi_init_type_valid ========= [08:23:17] [PASSED] HDMI-A [08:23:17] [PASSED] HDMI-B [08:23:17] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [08:23:17] ======== drm_test_connector_hdmi_init_type_invalid ======== [08:23:17] [PASSED] Unknown [08:23:17] [PASSED] VGA [08:23:17] [PASSED] DVI-I [08:23:17] [PASSED] DVI-D [08:23:17] [PASSED] DVI-A [08:23:17] [PASSED] Composite [08:23:17] [PASSED] SVIDEO [08:23:17] [PASSED] LVDS [08:23:17] [PASSED] Component [08:23:17] [PASSED] DIN [08:23:17] [PASSED] DP [08:23:17] [PASSED] TV [08:23:17] [PASSED] eDP [08:23:17] [PASSED] Virtual [08:23:17] [PASSED] DSI [08:23:17] [PASSED] DPI [08:23:17] [PASSED] Writeback [08:23:17] [PASSED] SPI [08:23:17] [PASSED] USB [08:23:17] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [08:23:17] ============ [PASSED] drmm_connector_hdmi_init ============= [08:23:17] ============= drmm_connector_init (3 subtests) ============= [08:23:17] [PASSED] drm_test_drmm_connector_init [08:23:17] [PASSED] drm_test_drmm_connector_init_null_ddc [08:23:17] ========= drm_test_drmm_connector_init_type_valid ========= [08:23:17] [PASSED] Unknown [08:23:17] [PASSED] VGA [08:23:17] [PASSED] DVI-I [08:23:17] [PASSED] DVI-D [08:23:17] [PASSED] DVI-A [08:23:17] [PASSED] Composite [08:23:17] [PASSED] SVIDEO [08:23:17] [PASSED] LVDS [08:23:17] [PASSED] Component [08:23:17] [PASSED] DIN [08:23:17] [PASSED] DP [08:23:17] [PASSED] HDMI-A [08:23:17] [PASSED] HDMI-B [08:23:17] [PASSED] TV [08:23:17] [PASSED] eDP [08:23:17] [PASSED] Virtual [08:23:17] [PASSED] DSI [08:23:17] [PASSED] DPI [08:23:17] [PASSED] Writeback [08:23:17] [PASSED] SPI [08:23:17] [PASSED] USB [08:23:17] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [08:23:17] =============== [PASSED] drmm_connector_init =============== [08:23:17] ========= drm_connector_dynamic_init (6 subtests) ========== [08:23:17] [PASSED] drm_test_drm_connector_dynamic_init [08:23:17] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [08:23:17] [PASSED] drm_test_drm_connector_dynamic_init_not_added [08:23:17] [PASSED] drm_test_drm_connector_dynamic_init_properties [08:23:17] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [08:23:17] [PASSED] Unknown [08:23:17] [PASSED] VGA [08:23:17] [PASSED] DVI-I [08:23:17] [PASSED] DVI-D [08:23:17] [PASSED] DVI-A [08:23:17] [PASSED] Composite [08:23:17] [PASSED] SVIDEO [08:23:17] [PASSED] LVDS [08:23:17] [PASSED] Component [08:23:17] [PASSED] DIN [08:23:17] [PASSED] DP [08:23:17] [PASSED] HDMI-A [08:23:17] [PASSED] HDMI-B [08:23:17] [PASSED] TV [08:23:17] [PASSED] eDP [08:23:17] [PASSED] Virtual [08:23:17] [PASSED] DSI [08:23:17] [PASSED] DPI [08:23:17] [PASSED] Writeback [08:23:17] [PASSED] SPI [08:23:17] [PASSED] USB [08:23:17] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [08:23:17] ======== drm_test_drm_connector_dynamic_init_name ========= [08:23:17] [PASSED] Unknown [08:23:17] [PASSED] VGA [08:23:17] [PASSED] DVI-I [08:23:17] [PASSED] DVI-D [08:23:17] [PASSED] DVI-A [08:23:17] [PASSED] Composite [08:23:17] [PASSED] SVIDEO [08:23:17] [PASSED] LVDS [08:23:17] [PASSED] Component [08:23:17] [PASSED] DIN [08:23:17] [PASSED] DP [08:23:17] [PASSED] HDMI-A [08:23:17] [PASSED] HDMI-B [08:23:17] [PASSED] TV [08:23:17] [PASSED] eDP [08:23:17] [PASSED] Virtual [08:23:17] [PASSED] DSI [08:23:17] [PASSED] DPI [08:23:17] [PASSED] Writeback [08:23:17] [PASSED] SPI [08:23:17] [PASSED] USB [08:23:17] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [08:23:17] =========== [PASSED] drm_connector_dynamic_init ============ [08:23:17] ==== drm_connector_dynamic_register_early (4 subtests) ===== [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [08:23:17] ====== [PASSED] drm_connector_dynamic_register_early ======= [08:23:17] ======= drm_connector_dynamic_register (7 subtests) ======== [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_on_list [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_no_init [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [08:23:17] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [08:23:17] ========= [PASSED] drm_connector_dynamic_register ========== [08:23:17] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [08:23:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [08:23:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [08:23:17] === [PASSED] drm_connector_attach_broadcast_rgb_property === [08:23:17] ========== drm_get_tv_mode_from_name (2 subtests) ========== [08:23:17] ========== drm_test_get_tv_mode_from_name_valid =========== [08:23:17] [PASSED] NTSC [08:23:17] [PASSED] NTSC-443 [08:23:17] [PASSED] NTSC-J [08:23:17] [PASSED] PAL [08:23:17] [PASSED] PAL-M [08:23:17] [PASSED] PAL-N [08:23:17] [PASSED] SECAM [08:23:17] [PASSED] Mono [08:23:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [08:23:17] [PASSED] drm_test_get_tv_mode_from_name_truncated [08:23:17] ============ [PASSED] drm_get_tv_mode_from_name ============ [08:23:17] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [08:23:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [08:23:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [08:23:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [08:23:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [08:23:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [08:23:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [08:23:17] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [08:23:17] [PASSED] VIC 96 [08:23:17] [PASSED] VIC 97 [08:23:17] [PASSED] VIC 101 [08:23:17] [PASSED] VIC 102 [08:23:17] [PASSED] VIC 106 [08:23:17] [PASSED] VIC 107 [08:23:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [08:23:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [08:23:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [08:23:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [08:23:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [08:23:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [08:23:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [08:23:17] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [08:23:17] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [08:23:17] [PASSED] Automatic [08:23:17] [PASSED] Full [08:23:17] [PASSED] Limited 16:235 [08:23:17] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [08:23:17] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [08:23:17] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [08:23:17] == drm_hdmi_connector_get_output_format_name (2 subtests) == [08:23:17] === drm_test_drm_hdmi_connector_get_output_format_name ==== [08:23:17] [PASSED] RGB [08:23:17] [PASSED] YUV 4:2:0 [08:23:17] [PASSED] YUV 4:2:2 [08:23:17] [PASSED] YUV 4:4:4 [08:23:17] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [08:23:17] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [08:23:17] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [08:23:17] ============= drm_damage_helper (21 subtests) ============== [08:23:17] [PASSED] drm_test_damage_iter_no_damage [08:23:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src [08:23:17] [PASSED] drm_test_damage_iter_no_damage_src_moved [08:23:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [08:23:17] [PASSED] drm_test_damage_iter_no_damage_not_visible [08:23:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc [08:23:17] [PASSED] drm_test_damage_iter_no_damage_no_fb [08:23:17] [PASSED] drm_test_damage_iter_simple_damage [08:23:17] [PASSED] drm_test_damage_iter_single_damage [08:23:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src [08:23:17] [PASSED] drm_test_damage_iter_single_damage_outside_src [08:23:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src [08:23:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [08:23:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [08:23:17] [PASSED] drm_test_damage_iter_single_damage_src_moved [08:23:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [08:23:17] [PASSED] drm_test_damage_iter_damage [08:23:17] [PASSED] drm_test_damage_iter_damage_one_intersect [08:23:17] [PASSED] drm_test_damage_iter_damage_one_outside [08:23:17] [PASSED] drm_test_damage_iter_damage_src_moved [08:23:17] [PASSED] drm_test_damage_iter_damage_not_visible [08:23:17] ================ [PASSED] drm_damage_helper ================ [08:23:17] ============== drm_dp_mst_helper (3 subtests) ============== [08:23:17] ============== drm_test_dp_mst_calc_pbn_mode ============== [08:23:17] [PASSED] Clock 154000 BPP 30 DSC disabled [08:23:17] [PASSED] Clock 234000 BPP 30 DSC disabled [08:23:17] [PASSED] Clock 297000 BPP 24 DSC disabled [08:23:17] [PASSED] Clock 332880 BPP 24 DSC enabled [08:23:17] [PASSED] Clock 324540 BPP 24 DSC enabled [08:23:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [08:23:17] ============== drm_test_dp_mst_calc_pbn_div =============== [08:23:17] [PASSED] Link rate 2000000 lane count 4 [08:23:17] [PASSED] Link rate 2000000 lane count 2 [08:23:17] [PASSED] Link rate 2000000 lane count 1 [08:23:17] [PASSED] Link rate 1350000 lane count 4 [08:23:17] [PASSED] Link rate 1350000 lane count 2 [08:23:17] [PASSED] Link rate 1350000 lane count 1 [08:23:17] [PASSED] Link rate 1000000 lane count 4 [08:23:17] [PASSED] Link rate 1000000 lane count 2 [08:23:17] [PASSED] Link rate 1000000 lane count 1 [08:23:17] [PASSED] Link rate 810000 lane count 4 [08:23:17] [PASSED] Link rate 810000 lane count 2 [08:23:17] [PASSED] Link rate 810000 lane count 1 [08:23:17] [PASSED] Link rate 540000 lane count 4 [08:23:17] [PASSED] Link rate 540000 lane count 2 [08:23:17] [PASSED] Link rate 540000 lane count 1 [08:23:17] [PASSED] Link rate 270000 lane count 4 [08:23:17] [PASSED] Link rate 270000 lane count 2 [08:23:17] [PASSED] Link rate 270000 lane count 1 [08:23:17] [PASSED] Link rate 162000 lane count 4 [08:23:17] [PASSED] Link rate 162000 lane count 2 [08:23:17] [PASSED] Link rate 162000 lane count 1 [08:23:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [08:23:17] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [08:23:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number [08:23:17] [PASSED] DP_POWER_UP_PHY with port number [08:23:17] [PASSED] DP_POWER_DOWN_PHY with port number [08:23:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [08:23:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number [08:23:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [08:23:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [08:23:17] [PASSED] DP_QUERY_PAYLOAD with port number [08:23:17] [PASSED] DP_QUERY_PAYLOAD with VCPI [08:23:17] [PASSED] DP_REMOTE_DPCD_READ with port number [08:23:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [08:23:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [08:23:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number [08:23:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [08:23:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array [08:23:17] [PASSED] DP_REMOTE_I2C_READ with port number [08:23:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [08:23:17] [PASSED] DP_REMOTE_I2C_READ with transactions array [08:23:17] [PASSED] DP_REMOTE_I2C_WRITE with port number [08:23:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [08:23:17] [PASSED] DP_REMOTE_I2C_WRITE with data array [08:23:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [08:23:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [08:23:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [08:23:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [08:23:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [08:23:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [08:23:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [08:23:17] ================ [PASSED] drm_dp_mst_helper ================ [08:23:17] ================== drm_exec (7 subtests) =================== [08:23:17] [PASSED] sanitycheck [08:23:17] [PASSED] test_lock [08:23:17] [PASSED] test_lock_unlock [08:23:17] [PASSED] test_duplicates [08:23:17] [PASSED] test_prepare [08:23:17] [PASSED] test_prepare_array [08:23:17] [PASSED] test_multiple_loops [08:23:17] ==================== [PASSED] drm_exec ===================== [08:23:17] =========== drm_format_helper_test (17 subtests) =========== [08:23:17] ============== drm_test_fb_xrgb8888_to_gray8 ============== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [08:23:17] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [08:23:17] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [08:23:17] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [08:23:17] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [08:23:17] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [08:23:17] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [08:23:17] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [08:23:17] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [08:23:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [08:23:17] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [08:23:17] ============== drm_test_fb_xrgb8888_to_mono =============== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [08:23:17] ==================== drm_test_fb_swab ===================== [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ================ [PASSED] drm_test_fb_swab ================= [08:23:17] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [08:23:17] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [08:23:17] [PASSED] single_pixel_source_buffer [08:23:17] [PASSED] single_pixel_clip_rectangle [08:23:17] [PASSED] well_known_colors [08:23:17] [PASSED] destination_pitch [08:23:17] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [08:23:17] ================= drm_test_fb_clip_offset ================= [08:23:17] [PASSED] pass through [08:23:17] [PASSED] horizontal offset [08:23:17] [PASSED] vertical offset [08:23:17] [PASSED] horizontal and vertical offset [08:23:17] [PASSED] horizontal offset (custom pitch) [08:23:17] [PASSED] vertical offset (custom pitch) [08:23:17] [PASSED] horizontal and vertical offset (custom pitch) [08:23:17] ============= [PASSED] drm_test_fb_clip_offset ============= [08:23:17] =================== drm_test_fb_memcpy ==================== [08:23:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [08:23:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [08:23:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [08:23:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [08:23:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [08:23:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [08:23:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [08:23:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [08:23:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [08:23:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [08:23:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [08:23:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [08:23:17] =============== [PASSED] drm_test_fb_memcpy ================ [08:23:17] ============= [PASSED] drm_format_helper_test ============== [08:23:17] ================= drm_format (18 subtests) ================= [08:23:17] [PASSED] drm_test_format_block_width_invalid [08:23:17] [PASSED] drm_test_format_block_width_one_plane [08:23:17] [PASSED] drm_test_format_block_width_two_plane [08:23:17] [PASSED] drm_test_format_block_width_three_plane [08:23:17] [PASSED] drm_test_format_block_width_tiled [08:23:17] [PASSED] drm_test_format_block_height_invalid [08:23:17] [PASSED] drm_test_format_block_height_one_plane [08:23:17] [PASSED] drm_test_format_block_height_two_plane [08:23:17] [PASSED] drm_test_format_block_height_three_plane [08:23:17] [PASSED] drm_test_format_block_height_tiled [08:23:17] [PASSED] drm_test_format_min_pitch_invalid [08:23:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [08:23:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [08:23:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [08:23:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [08:23:17] [PASSED] drm_test_format_min_pitch_two_plane [08:23:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [08:23:17] [PASSED] drm_test_format_min_pitch_tiled [08:23:17] =================== [PASSED] drm_format ==================== [08:23:17] ============== drm_framebuffer (10 subtests) =============== [08:23:17] ========== drm_test_framebuffer_check_src_coords ========== [08:23:17] [PASSED] Success: source fits into fb [08:23:17] [PASSED] Fail: overflowing fb with x-axis coordinate [08:23:17] [PASSED] Fail: overflowing fb with y-axis coordinate [08:23:17] [PASSED] Fail: overflowing fb with source width [08:23:17] [PASSED] Fail: overflowing fb with source height [08:23:17] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [08:23:17] [PASSED] drm_test_framebuffer_cleanup [08:23:17] =============== drm_test_framebuffer_create =============== [08:23:17] [PASSED] ABGR8888 normal sizes [08:23:17] [PASSED] ABGR8888 max sizes [08:23:17] [PASSED] ABGR8888 pitch greater than min required [08:23:17] [PASSED] ABGR8888 pitch less than min required [08:23:17] [PASSED] ABGR8888 Invalid width [08:23:17] [PASSED] ABGR8888 Invalid buffer handle [08:23:17] [PASSED] No pixel format [08:23:17] [PASSED] ABGR8888 Width 0 [08:23:17] [PASSED] ABGR8888 Height 0 [08:23:17] [PASSED] ABGR8888 Out of bound height * pitch combination [08:23:17] [PASSED] ABGR8888 Large buffer offset [08:23:17] [PASSED] ABGR8888 Buffer offset for inexistent plane [08:23:17] [PASSED] ABGR8888 Invalid flag [08:23:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [08:23:17] [PASSED] ABGR8888 Valid buffer modifier [08:23:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [08:23:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [08:23:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [08:23:17] [PASSED] NV12 Normal sizes [08:23:17] [PASSED] NV12 Max sizes [08:23:17] [PASSED] NV12 Invalid pitch [08:23:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [08:23:17] [PASSED] NV12 different modifier per-plane [08:23:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [08:23:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [08:23:17] [PASSED] NV12 Modifier for inexistent plane [08:23:17] [PASSED] NV12 Handle for inexistent plane [08:23:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [08:23:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [08:23:17] [PASSED] YVU420 Normal sizes [08:23:17] [PASSED] YVU420 Max sizes [08:23:17] [PASSED] YVU420 Invalid pitch [08:23:17] [PASSED] YVU420 Different pitches [08:23:17] [PASSED] YVU420 Different buffer offsets/pitches [08:23:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [08:23:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [08:23:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [08:23:17] [PASSED] YVU420 Valid modifier [08:23:17] [PASSED] YVU420 Different modifiers per plane [08:23:17] [PASSED] YVU420 Modifier for inexistent plane [08:23:17] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [08:23:17] [PASSED] X0L2 Normal sizes [08:23:17] [PASSED] X0L2 Max sizes [08:23:17] [PASSED] X0L2 Invalid pitch [08:23:17] [PASSED] X0L2 Pitch greater than minimum required [08:23:17] [PASSED] X0L2 Handle for inexistent plane [08:23:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [08:23:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [08:23:17] [PASSED] X0L2 Valid modifier [08:23:17] [PASSED] X0L2 Modifier for inexistent plane [08:23:17] =========== [PASSED] drm_test_framebuffer_create =========== [08:23:17] [PASSED] drm_test_framebuffer_free [08:23:17] [PASSED] drm_test_framebuffer_init [08:23:17] [PASSED] drm_test_framebuffer_init_bad_format [08:23:17] [PASSED] drm_test_framebuffer_init_dev_mismatch [08:23:17] [PASSED] drm_test_framebuffer_lookup [08:23:17] [PASSED] drm_test_framebuffer_lookup_inexistent [08:23:17] [PASSED] drm_test_framebuffer_modifiers_not_supported [08:23:17] ================= [PASSED] drm_framebuffer ================= [08:23:17] ================ drm_gem_shmem (8 subtests) ================ [08:23:17] [PASSED] drm_gem_shmem_test_obj_create [08:23:17] [PASSED] drm_gem_shmem_test_obj_create_private [08:23:17] [PASSED] drm_gem_shmem_test_pin_pages [08:23:17] [PASSED] drm_gem_shmem_test_vmap [08:23:17] [PASSED] drm_gem_shmem_test_get_sg_table [08:23:17] [PASSED] drm_gem_shmem_test_get_pages_sgt [08:23:17] [PASSED] drm_gem_shmem_test_madvise [08:23:17] [PASSED] drm_gem_shmem_test_purge [08:23:17] ================== [PASSED] drm_gem_shmem ================== [08:23:17] === drm_atomic_helper_connector_hdmi_check (29 subtests) === [08:23:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [08:23:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [08:23:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [08:23:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [08:23:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [08:23:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [08:23:17] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [08:23:17] [PASSED] Automatic [08:23:17] [PASSED] Full [08:23:17] [PASSED] Limited 16:235 [08:23:17] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [08:23:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [08:23:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [08:23:17] [PASSED] drm_test_check_disable_connector [08:23:17] [PASSED] drm_test_check_hdmi_funcs_reject_rate [08:23:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [08:23:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [08:23:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [08:23:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [08:23:17] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [08:23:17] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [08:23:17] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [08:23:17] [PASSED] drm_test_check_output_bpc_dvi [08:23:17] [PASSED] drm_test_check_output_bpc_format_vic_1 [08:23:17] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [08:23:17] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [08:23:17] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [08:23:17] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [08:23:17] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [08:23:17] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [08:23:17] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [08:23:17] ============ drm_test_check_hdmi_color_format ============= [08:23:17] [PASSED] AUTO -> RGB [08:23:17] [PASSED] YCBCR422 -> YUV422 [08:23:17] [PASSED] YCBCR420 -> YUV420 [08:23:17] [PASSED] YCBCR444 -> YUV444 [08:23:17] [PASSED] RGB -> RGB [08:23:17] ======== [PASSED] drm_test_check_hdmi_color_format ========= [08:23:17] ======== drm_test_check_hdmi_color_format_420_only ======== [08:23:17] [PASSED] RGB should fail [08:23:17] [PASSED] YUV444 should fail [08:23:17] [PASSED] YUV422 should fail [08:23:17] [PASSED] YUV420 should work [08:23:17] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ==== [08:23:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [08:23:17] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [08:23:17] [PASSED] drm_test_check_broadcast_rgb_value [08:23:17] [PASSED] drm_test_check_bpc_8_value [08:23:17] [PASSED] drm_test_check_bpc_10_value [08:23:17] [PASSED] drm_test_check_bpc_12_value [08:23:17] [PASSED] drm_test_check_format_value [08:23:17] [PASSED] drm_test_check_tmds_char_value [08:23:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [08:23:17] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) = [08:23:17] [PASSED] drm_test_check_mode_valid [08:23:17] [PASSED] drm_test_check_mode_valid_reject [08:23:17] [PASSED] drm_test_check_mode_valid_reject_rate [08:23:17] [PASSED] drm_test_check_mode_valid_reject_max_clock [08:23:17] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock [08:23:17] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector [08:23:17] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb [08:23:17] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [08:23:17] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [08:23:17] [PASSED] drm_test_check_infoframes [08:23:17] [PASSED] drm_test_check_reject_avi_infoframe [08:23:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [08:23:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [08:23:17] [PASSED] drm_test_check_reject_audio_infoframe [08:23:17] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [08:23:17] ================= drm_managed (2 subtests) ================= [08:23:17] [PASSED] drm_test_managed_release_action [08:23:17] [PASSED] drm_test_managed_run_action [08:23:17] =================== [PASSED] drm_managed =================== [08:23:17] =================== drm_mm (6 subtests) ==================== [08:23:17] [PASSED] drm_test_mm_init [08:23:17] [PASSED] drm_test_mm_debug [08:23:17] [PASSED] drm_test_mm_align32 [08:23:17] [PASSED] drm_test_mm_align64 [08:23:17] [PASSED] drm_test_mm_lowest [08:23:17] [PASSED] drm_test_mm_highest [08:23:17] ===================== [PASSED] drm_mm ====================== [08:23:17] ============= drm_modes_analog_tv (5 subtests) ============= [08:23:17] [PASSED] drm_test_modes_analog_tv_mono_576i [08:23:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i [08:23:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [08:23:17] [PASSED] drm_test_modes_analog_tv_pal_576i [08:23:17] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [08:23:17] =============== [PASSED] drm_modes_analog_tv =============== [08:23:17] ============== drm_plane_helper (2 subtests) =============== [08:23:17] =============== drm_test_check_plane_state ================ [08:23:17] [PASSED] clipping_simple [08:23:17] [PASSED] clipping_rotate_reflect [08:23:17] [PASSED] positioning_simple [08:23:17] [PASSED] upscaling [08:23:17] [PASSED] downscaling [08:23:17] [PASSED] rounding1 [08:23:17] [PASSED] rounding2 [08:23:17] [PASSED] rounding3 [08:23:17] [PASSED] rounding4 [08:23:17] =========== [PASSED] drm_test_check_plane_state ============ [08:23:17] =========== drm_test_check_invalid_plane_state ============ [08:23:17] [PASSED] positioning_invalid [08:23:17] [PASSED] upscaling_invalid [08:23:17] [PASSED] downscaling_invalid [08:23:17] ======= [PASSED] drm_test_check_invalid_plane_state ======== [08:23:17] ================ [PASSED] drm_plane_helper ================= [08:23:17] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [08:23:17] ====== drm_test_connector_helper_tv_get_modes_check ======= [08:23:17] [PASSED] None [08:23:17] [PASSED] PAL [08:23:17] [PASSED] NTSC [08:23:17] [PASSED] Both, NTSC Default [08:23:17] [PASSED] Both, PAL Default [08:23:17] [PASSED] Both, NTSC Default, with PAL on command-line [08:23:17] [PASSED] Both, PAL Default, with NTSC on command-line [08:23:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [08:23:17] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [08:23:17] ================== drm_rect (9 subtests) =================== [08:23:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero [08:23:17] [PASSED] drm_test_rect_clip_scaled_not_clipped [08:23:17] [PASSED] drm_test_rect_clip_scaled_clipped [08:23:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [08:23:17] ================= drm_test_rect_intersect ================= [08:23:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [08:23:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [08:23:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [08:23:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [08:23:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [08:23:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [08:23:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [08:23:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [08:23:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [08:23:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [08:23:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [08:23:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [08:23:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [08:23:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [08:23:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [08:23:17] ============= [PASSED] drm_test_rect_intersect ============= [08:23:17] ================ drm_test_rect_calc_hscale ================ [08:23:17] [PASSED] normal use [08:23:17] [PASSED] out of max range [08:23:17] [PASSED] out of min range [08:23:17] [PASSED] zero dst [08:23:17] [PASSED] negative src [08:23:17] [PASSED] negative dst [08:23:17] ============ [PASSED] drm_test_rect_calc_hscale ============ [08:23:17] ================ drm_test_rect_calc_vscale ================ [08:23:17] [PASSED] normal use [08:23:17] [PASSED] out of max range [08:23:17] [PASSED] out of min range [08:23:17] [PASSED] zero dst [08:23:17] [PASSED] negative src [08:23:17] [PASSED] negative dst [08:23:17] ============ [PASSED] drm_test_rect_calc_vscale ============ [08:23:17] ================== drm_test_rect_rotate =================== [08:23:17] [PASSED] reflect-x [08:23:17] [PASSED] reflect-y [08:23:17] [PASSED] rotate-0 [08:23:17] [PASSED] rotate-90 [08:23:17] [PASSED] rotate-180 [08:23:17] [PASSED] rotate-270 [08:23:17] ============== [PASSED] drm_test_rect_rotate =============== [08:23:17] ================ drm_test_rect_rotate_inv ================= [08:23:17] [PASSED] reflect-x [08:23:17] [PASSED] reflect-y [08:23:17] [PASSED] rotate-0 [08:23:17] [PASSED] rotate-90 [08:23:17] [PASSED] rotate-180 [08:23:17] [PASSED] rotate-270 [08:23:17] ============ [PASSED] drm_test_rect_rotate_inv ============= [08:23:17] ==================== [PASSED] drm_rect ===================== [08:23:17] ============ drm_sysfb_modeset_test (1 subtest) ============ [08:23:17] ============ drm_test_sysfb_build_fourcc_list ============= [08:23:17] [PASSED] no native formats [08:23:17] [PASSED] XRGB8888 as native format [08:23:17] [PASSED] remove duplicates [08:23:17] [PASSED] convert alpha formats [08:23:17] [PASSED] random formats [08:23:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [08:23:17] ============= [PASSED] drm_sysfb_modeset_test ============== [08:23:17] ================== drm_fixp (2 subtests) =================== [08:23:17] [PASSED] drm_test_int2fixp [08:23:17] [PASSED] drm_test_sm2fixp [08:23:17] ==================== [PASSED] drm_fixp ===================== [08:23:17] ============================================================ [08:23:17] Testing complete. Ran 641 tests: passed: 641 [08:23:17] Elapsed time: 26.848s total, 1.835s configuring, 24.795s building, 0.195s running + for kcfg in "${kunitconfigs[@]}" + [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]] + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [08:23:17] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [08:23:19] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [08:23:29] Starting KUnit Kernel (1/1)... [08:23:29] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [08:23:29] ============= refcount_interrupt (4 subtests) ============== [08:23:29] [PASSED] test_single_irq_change [08:23:29] [PASSED] test_nested_irq_change [08:23:29] [PASSED] test_multiple_irq_change [08:23:29] [PASSED] test_irq_save [08:23:29] =============== [PASSED] refcount_interrupt ================ [08:23:29] ================= ttm_device (5 subtests) ================== [08:23:29] [PASSED] ttm_device_init_basic [08:23:29] [PASSED] ttm_device_init_multiple [08:23:29] [PASSED] ttm_device_fini_basic [08:23:29] [PASSED] ttm_device_init_no_vma_man [08:23:29] ================== ttm_device_init_pools ================== [08:23:29] [PASSED] No DMA allocations, no DMA32 required [08:23:29] [PASSED] DMA allocations, DMA32 required [08:23:29] [PASSED] No DMA allocations, DMA32 required [08:23:29] [PASSED] DMA allocations, no DMA32 required [08:23:29] ============== [PASSED] ttm_device_init_pools ============== [08:23:29] =================== [PASSED] ttm_device ==================== [08:23:29] ================== ttm_pool (8 subtests) =================== [08:23:29] ================== ttm_pool_alloc_basic =================== [08:23:29] [PASSED] One page [08:23:29] [PASSED] More than one page [08:23:29] [PASSED] Above the allocation limit [08:23:29] [PASSED] One page, with coherent DMA mappings enabled [08:23:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [08:23:29] ============== [PASSED] ttm_pool_alloc_basic =============== [08:23:29] ============== ttm_pool_alloc_basic_dma_addr ============== [08:23:29] [PASSED] One page [08:23:29] [PASSED] More than one page [08:23:29] [PASSED] Above the allocation limit [08:23:29] [PASSED] One page, with coherent DMA mappings enabled [08:23:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [08:23:29] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [08:23:29] [PASSED] ttm_pool_alloc_order_caching_match [08:23:29] [PASSED] ttm_pool_alloc_caching_mismatch [08:23:29] [PASSED] ttm_pool_alloc_order_mismatch [08:23:29] [PASSED] ttm_pool_free_dma_alloc [08:23:29] [PASSED] ttm_pool_free_no_dma_alloc [08:23:29] [PASSED] ttm_pool_fini_basic [08:23:29] ==================== [PASSED] ttm_pool ===================== [08:23:29] ================ ttm_resource (8 subtests) ================= [08:23:29] ================= ttm_resource_init_basic ================= [08:23:29] [PASSED] Init resource in TTM_PL_SYSTEM [08:23:29] [PASSED] Init resource in TTM_PL_VRAM [08:23:29] [PASSED] Init resource in a private placement [08:23:29] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [08:23:29] ============= [PASSED] ttm_resource_init_basic ============= [08:23:29] [PASSED] ttm_resource_init_pinned [08:23:29] [PASSED] ttm_resource_fini_basic [08:23:29] [PASSED] ttm_resource_manager_init_basic [08:23:29] [PASSED] ttm_resource_manager_usage_basic [08:23:29] [PASSED] ttm_resource_manager_set_used_basic [08:23:29] [PASSED] ttm_sys_man_alloc_basic [08:23:29] [PASSED] ttm_sys_man_free_basic [08:23:29] ================== [PASSED] ttm_resource =================== [08:23:29] =================== ttm_tt (15 subtests) =================== [08:23:29] ==================== ttm_tt_init_basic ==================== [08:23:29] [PASSED] Page-aligned size [08:23:29] [PASSED] Extra pages requested [08:23:29] ================ [PASSED] ttm_tt_init_basic ================ [08:23:29] [PASSED] ttm_tt_init_misaligned [08:23:29] [PASSED] ttm_tt_fini_basic [08:23:29] [PASSED] ttm_tt_fini_sg [08:23:29] [PASSED] ttm_tt_fini_shmem [08:23:29] [PASSED] ttm_tt_create_basic [08:23:29] [PASSED] ttm_tt_create_invalid_bo_type [08:23:29] [PASSED] ttm_tt_create_ttm_exists [08:23:29] [PASSED] ttm_tt_create_failed [08:23:29] [PASSED] ttm_tt_destroy_basic [08:23:29] [PASSED] ttm_tt_populate_null_ttm [08:23:29] [PASSED] ttm_tt_populate_populated_ttm [08:23:29] [PASSED] ttm_tt_unpopulate_basic [08:23:29] [PASSED] ttm_tt_unpopulate_empty_ttm [08:23:29] [PASSED] ttm_tt_swapin_basic [08:23:29] ===================== [PASSED] ttm_tt ====================== [08:23:29] =================== ttm_bo (14 subtests) =================== [08:23:29] =========== ttm_bo_reserve_optimistic_no_ticket =========== [08:23:29] [PASSED] Cannot be interrupted and sleeps [08:23:29] [PASSED] Cannot be interrupted, locks straight away [08:23:29] [PASSED] Can be interrupted, sleeps [08:23:29] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [08:23:29] [PASSED] ttm_bo_reserve_locked_no_sleep [08:23:29] [PASSED] ttm_bo_reserve_no_wait_ticket [08:23:29] [PASSED] ttm_bo_reserve_double_resv [08:23:29] [PASSED] ttm_bo_reserve_interrupted [08:23:29] [PASSED] ttm_bo_reserve_deadlock [08:23:29] [PASSED] ttm_bo_unreserve_basic [08:23:29] [PASSED] ttm_bo_unreserve_pinned [08:23:29] [PASSED] ttm_bo_unreserve_bulk [08:23:29] [PASSED] ttm_bo_fini_basic [08:23:29] [PASSED] ttm_bo_fini_shared_resv [08:23:29] [PASSED] ttm_bo_pin_basic [08:23:29] [PASSED] ttm_bo_pin_unpin_resource [08:23:29] [PASSED] ttm_bo_multiple_pin_one_unpin [08:23:29] ===================== [PASSED] ttm_bo ====================== [08:23:29] ============== ttm_bo_validate (22 subtests) =============== [08:23:29] ============== ttm_bo_init_reserved_sys_man =============== [08:23:29] [PASSED] Buffer object for userspace [08:23:29] [PASSED] Kernel buffer object [08:23:29] [PASSED] Shared buffer object [08:23:29] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [08:23:29] ============== ttm_bo_init_reserved_mock_man ============== [08:23:29] [PASSED] Buffer object for userspace [08:23:29] [PASSED] Kernel buffer object [08:23:29] [PASSED] Shared buffer object [08:23:29] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [08:23:29] [PASSED] ttm_bo_init_reserved_resv [08:23:29] ================== ttm_bo_validate_basic ================== [08:23:29] [PASSED] Buffer object for userspace [08:23:29] [PASSED] Kernel buffer object [08:23:29] [PASSED] Shared buffer object [08:23:29] ============== [PASSED] ttm_bo_validate_basic ============== [08:23:29] [PASSED] ttm_bo_validate_invalid_placement [08:23:29] ============= ttm_bo_validate_same_placement ============== [08:23:29] [PASSED] System manager [08:23:29] [PASSED] VRAM manager [08:23:29] ========= [PASSED] ttm_bo_validate_same_placement ========== [08:23:29] [PASSED] ttm_bo_validate_failed_alloc [08:23:29] [PASSED] ttm_bo_validate_pinned [08:23:29] [PASSED] ttm_bo_validate_busy_placement [08:23:29] ================ ttm_bo_validate_multihop ================= [08:23:29] [PASSED] Buffer object for userspace [08:23:29] [PASSED] Kernel buffer object [08:23:29] [PASSED] Shared buffer object [08:23:29] ============ [PASSED] ttm_bo_validate_multihop ============= [08:23:29] ========== ttm_bo_validate_no_placement_signaled ========== [08:23:29] [PASSED] Buffer object in system domain, no page vector [08:23:29] [PASSED] Buffer object in system domain with an existing page vector [08:23:29] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [08:23:29] ======== ttm_bo_validate_no_placement_not_signaled ======== [08:23:29] [PASSED] Buffer object for userspace [08:23:29] [PASSED] Kernel buffer object [08:23:29] [PASSED] Shared buffer object [08:23:29] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [08:23:29] [PASSED] ttm_bo_validate_move_fence_signaled [08:23:29] ========= ttm_bo_validate_move_fence_not_signaled ========= [08:23:29] [PASSED] Waits for GPU [08:23:29] [PASSED] Tries to lock straight away [08:23:29] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [08:23:29] [PASSED] ttm_bo_validate_swapout [08:23:29] [PASSED] ttm_bo_validate_happy_evict [08:23:29] [PASSED] ttm_bo_validate_all_pinned_evict [08:23:29] [PASSED] ttm_bo_validate_allowed_only_evict [08:23:29] [PASSED] ttm_bo_validate_deleted_evict [08:23:29] [PASSED] ttm_bo_validate_busy_domain_evict [08:23:29] [PASSED] ttm_bo_validate_evict_gutting [08:23:29] [PASSED] ttm_bo_validate_recrusive_evict [08:23:29] ================= [PASSED] ttm_bo_validate ================= [08:23:29] ============================================================ [08:23:29] Testing complete. Ran 106 tests: passed: 106 [08:23:29] Elapsed time: 12.006s total, 1.803s configuring, 9.937s building, 0.227s running + for kcfg in "${kunitconfigs[@]}" + [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]] + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig [08:23:29] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [08:23:31] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [08:23:40] Starting KUnit Kernel (1/1)... [08:23:40] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [08:23:40] ============= refcount_interrupt (4 subtests) ============== [08:23:40] [PASSED] test_single_irq_change [08:23:40] [PASSED] test_nested_irq_change [08:23:40] [PASSED] test_multiple_irq_change [08:23:40] [PASSED] test_irq_save [08:23:40] =============== [PASSED] refcount_interrupt ================ [08:23:40] =============== dma-buf-fence (12 subtests) ================ [08:23:40] [PASSED] test_sanitycheck [08:23:40] [PASSED] test_signaling [08:23:40] [PASSED] test_add_callback [08:23:40] [PASSED] test_late_add_callback [08:23:40] [PASSED] test_rm_callback [08:23:40] [PASSED] test_late_rm_callback [08:23:40] [PASSED] test_status [08:23:40] [PASSED] test_error [08:23:40] [PASSED] test_wait [08:23:40] [PASSED] test_wait_timeout [08:23:40] [PASSED] test_stub [08:23:40] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs) [08:23:40] ================== [PASSED] dma-buf-fence ================== [08:23:40] ============ dma-buf-fence-chain (11 subtests) ============= [08:23:40] [PASSED] test_sanitycheck [08:23:40] [PASSED] test_find_seqno [08:23:40] [PASSED] test_find_signaled [08:23:40] [PASSED] test_find_out_of_order [08:23:45] [PASSED] test_find_gap [08:23:45] [PASSED] test_find_race [08:23:45] [PASSED] test_signal_forward [08:23:45] [PASSED] test_signal_backward [08:23:45] [PASSED] test_wait_forward [08:23:45] [PASSED] test_wait_backward [08:23:45] [PASSED] test_wait_random [08:23:45] =============== [PASSED] dma-buf-fence-chain =============== [08:23:45] ============ dma-buf-fence-unwrap (10 subtests) ============ [08:23:45] [PASSED] test_sanitycheck [08:23:45] [PASSED] test_unwrap_array [08:23:45] [PASSED] test_unwrap_chain [08:23:45] [PASSED] test_unwrap_chain_array [08:23:45] [PASSED] test_unwrap_merge [08:23:45] [PASSED] test_unwrap_merge_duplicate [08:23:45] [PASSED] test_unwrap_merge_seqno [08:23:45] [PASSED] test_unwrap_merge_order [08:23:45] [PASSED] test_unwrap_merge_complex [08:23:45] [PASSED] test_unwrap_merge_complex_seqno [08:23:45] ============== [PASSED] dma-buf-fence-unwrap =============== [08:23:45] ================ dma-buf-resv (5 subtests) ================= [08:23:45] [PASSED] test_sanitycheck [08:23:45] ===================== test_signaling ====================== [08:23:45] [PASSED] kernel [08:23:45] [PASSED] write [08:23:45] [PASSED] read [08:23:45] [PASSED] bookkeep [08:23:45] ================= [PASSED] test_signaling ================== [08:23:45] ====================== test_for_each ====================== [08:23:45] [PASSED] kernel [08:23:45] [PASSED] write [08:23:45] [PASSED] read [08:23:45] [PASSED] bookkeep [08:23:45] ================== [PASSED] test_for_each ================== [08:23:45] ================= test_for_each_unlocked ================== [08:23:45] [PASSED] kernel [08:23:45] [PASSED] write [08:23:45] [PASSED] read [08:23:45] [PASSED] bookkeep [08:23:45] ============= [PASSED] test_for_each_unlocked ============== [08:23:45] ===================== test_get_fences ===================== [08:23:45] [PASSED] kernel [08:23:45] [PASSED] write [08:23:45] [PASSED] read [08:23:45] [PASSED] bookkeep [08:23:45] ================= [PASSED] test_get_fences ================= [08:23:45] ================== [PASSED] dma-buf-resv =================== [08:23:45] ============================================================ [08:23:45] Testing complete. Ran 54 tests: passed: 53, skipped: 1 [08:23:45] Elapsed time: 15.850s total, 1.796s configuring, 8.682s building, 5.356s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) 2026-09-09 7:25 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu ` (2 preceding siblings ...) 2026-09-09 8:23 ` ✓ CI.KUnit: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) Patchwork @ 2026-09-09 9:33 ` Patchwork 2026-09-09 14:15 ` ✗ Xe.CI.FULL: failure " Patchwork 4 siblings, 0 replies; 17+ messages in thread From: Patchwork @ 2026-09-09 9:33 UTC (permalink / raw) To: tilak.tirumalesh.tangudu; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 3838 bytes --] == Series Details == Series: drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) URL : https://patchwork.freedesktop.org/series/167706/ State : success == Summary == CI Bug Log - changes from xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada_BAT -> xe-pw-167706v8_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (14 -> 14) ------------------------------ Additional (1): bat-ptl-vm Missing (1): bat-nvls-2 Known issues ------------ Here are the changes found in xe-pw-167706v8_BAT that come from known issues: ### IGT changes ### #### Issues hit #### * igt@xe_evict@evict-beng-small-cm: - bat-ptl-vm: NOTRUN -> [SKIP][1] ([Intel XE#5764]) +11 other tests skip [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_evict@evict-beng-small-cm.html * igt@xe_exec_balancer@no-exec-cm-virtual-basic: - bat-ptl-vm: NOTRUN -> [SKIP][2] ([Intel XE#7482]) +17 other tests skip [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_exec_balancer@no-exec-cm-virtual-basic.html * igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd: - bat-ptl-vm: NOTRUN -> [SKIP][3] ([Intel XE#8364]) +13 other tests skip [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd.html * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit: - bat-ptl-vm: NOTRUN -> [SKIP][4] ([Intel XE#5775]) +2 other tests skip [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html * igt@xe_mmap@vram: - bat-ptl-vm: NOTRUN -> [SKIP][5] ([Intel XE#5776]) [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_mmap@vram.html * igt@xe_pat@pat-index-xehpc: - bat-ptl-vm: NOTRUN -> [SKIP][6] ([Intel XE#5777] / [Intel XE#7590]) [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_pat@pat-index-xehpc.html * igt@xe_pat@pat-index-xelp: - bat-ptl-vm: NOTRUN -> [SKIP][7] ([Intel XE#5771] / [Intel XE#7590]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_pat@pat-index-xelp.html * igt@xe_pat@pat-index-xelpg: - bat-ptl-vm: NOTRUN -> [SKIP][8] ([Intel XE#5780] / [Intel XE#7590]) [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/bat-ptl-vm/igt@xe_pat@pat-index-xelpg.html [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764 [Intel XE#5771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5771 [Intel XE#5775]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5775 [Intel XE#5776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5776 [Intel XE#5777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5777 [Intel XE#5780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5780 [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482 [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590 [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364 Build changes ------------- * IGT: IGT_9086 -> IGT_9088 * Linux: xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada -> xe-pw-167706v8 IGT_9086: a89061ecccede222b8da2f310f3bf71ed908c365 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_9088: 55a88d20e327d5c440cd3f3d661684fb83f29027 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada: dd822035c9dcd89e47cbfa75da6f3119617fbada xe-pw-167706v8: 167706v8 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/index.html [-- Attachment #2: Type: text/html, Size: 4730 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) 2026-09-09 7:25 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu ` (3 preceding siblings ...) 2026-09-09 9:33 ` ✓ Xe.CI.BAT: " Patchwork @ 2026-09-09 14:15 ` Patchwork 4 siblings, 0 replies; 17+ messages in thread From: Patchwork @ 2026-09-09 14:15 UTC (permalink / raw) To: tilak.tirumalesh.tangudu; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 109701 bytes --] == Series Details == Series: drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) URL : https://patchwork.freedesktop.org/series/167706/ State : failure == Summary == CI Bug Log - changes from xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada_FULL -> xe-pw-167706v8_FULL ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-167706v8_FULL absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-167706v8_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (2 -> 2) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-167706v8_FULL: ### IGT changes ### #### Possible regressions #### * igt@xe_mempage_offline@inject-single-page: - shard-lnl: NOTRUN -> [SKIP][1] +1 other test skip [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@xe_mempage_offline@inject-single-page.html - shard-bmg: NOTRUN -> [SKIP][2] +1 other test skip [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@xe_mempage_offline@inject-single-page.html * igt@xe_pm_residency@cpg-basic: - shard-bmg: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-7/igt@xe_pm_residency@cpg-basic.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@xe_pm_residency@cpg-basic.html #### Warnings #### * igt@kms_cdclk@mode-transition@pipe-b-edp-1: - shard-lnl: [SKIP][5] ([Intel XE#4417] / [Intel XE#5447]) -> [SKIP][6] +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html Known issues ------------ Here are the changes found in xe-pw-167706v8_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@fbdev@read: - shard-lnl: [PASS][7] -> [SKIP][8] ([Intel XE#2134]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@fbdev@read.html [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@fbdev@read.html * igt@intel_hwmon@hwmon-write: - shard-bmg: [PASS][9] -> [FAIL][10] ([Intel XE#8583]) [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-6/igt@intel_hwmon@hwmon-write.html [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-2/igt@intel_hwmon@hwmon-write.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#1466]) [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2233]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html * igt@kms_async_flips@async-flip-suspend-resume@pipe-a-hdmi-a-3: - shard-bmg: NOTRUN -> [INCOMPLETE][13] ([Intel XE#8587]) +1 other test incomplete [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_async_flips@async-flip-suspend-resume@pipe-a-hdmi-a-3.html * igt@kms_big_fb@4-tiled-64bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2327]) +2 other tests skip [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html * igt@kms_big_fb@4-tiled-8bpp-rotate-90: - shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#1407]) [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#1124]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#1124]) +6 other tests skip [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p: - shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#7679]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p.html * igt@kms_bw@linear-tiling-3-displays-target-3840x2160p: - shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#367]) [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_bw@linear-tiling-3-displays-target-3840x2160p.html * igt@kms_ccs@bad-pixel-format-yf-tiled-ccs: - shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#2887]) +5 other tests skip [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1: - shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#2669] / [Intel XE#7389]) +2 other tests skip [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs: - shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#9125]) +10 other tests skip [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs: - shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#3432]) [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3: - shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2652]) +26 other tests skip [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs: - shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2887]) +10 other tests skip [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html * igt@kms_chamelium_color@degamma: - shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#306] / [Intel XE#7358]) +1 other test skip [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_chamelium_color@degamma.html * igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#7358]) [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-3/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats: - shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#373]) +1 other test skip [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2252]) +5 other tests skip [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-3/igt@kms_chamelium_hpd@common-hpd-after-suspend.html * igt@kms_color@ctm-negative: - shard-lnl: [PASS][30] -> [SKIP][31] ([Intel XE#3297]) +2 other tests skip [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_color@ctm-negative.html [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_color@ctm-negative.html * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4: - shard-lnl: [PASS][32] -> [SKIP][33] ([Intel XE#7006]) [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4.html [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4.html * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-0: - shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#6969]) +10 other tests skip [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-0.html * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2: - shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#6969] / [Intel XE#7006]) +1 other test skip [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html * igt@kms_content_protection@atomic-dpms-hdcp14: - shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#7642]) +1 other test skip [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_content_protection@atomic-dpms-hdcp14.html * igt@kms_content_protection@content-type-change: - shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#7642]) +1 other test skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_content_protection@content-type-change.html * igt@kms_content_protection@dp-mst-lic-type-0-hdcp14: - shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#6974]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html * igt@kms_content_protection@uevent-hdcp14: - shard-bmg: NOTRUN -> [FAIL][39] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-8/igt@kms_content_protection@uevent-hdcp14.html * igt@kms_cursor_crc@cursor-offscreen-64x21: - shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#1424]) +1 other test skip [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_cursor_crc@cursor-offscreen-64x21.html * igt@kms_cursor_crc@cursor-random-32x32: - shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2320]) +3 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_cursor_crc@cursor-random-32x32.html * igt@kms_dirtyfb@fbc-dirtyfb-ioctl: - shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#4210] / [Intel XE#7467]) [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html * igt@kms_dp_link_training@uhbr-mst: - shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#4354] / [Intel XE#7386]) [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_dp_link_training@uhbr-mst.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#9009]) [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_dp_linktrain_fallback@dsc-fallback: - shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#4331] / [Intel XE#7227]) [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@kms_dp_linktrain_fallback@dsc-fallback.html * igt@kms_dsc@dsc-fractional-bpp-with-bpc-bigjoiner: - shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#8265]) +2 other tests skip [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_dsc@dsc-fractional-bpp-with-bpc-bigjoiner.html * igt@kms_dsc@dsc-with-formats: - shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#8265]) [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_dsc@dsc-with-formats.html * igt@kms_fbcon_fbt@psr: - shard-lnl: [PASS][48] -> [SKIP][49] ([Intel XE#8680]) [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_fbcon_fbt@psr.html [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_fbcon_fbt@psr.html * igt@kms_feature_discovery@psr1: - shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2374] / [Intel XE#6127]) [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@kms_feature_discovery@psr1.html * igt@kms_flip@2x-plain-flip-interruptible: - shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#1421]) +2 other tests skip [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_flip@2x-plain-flip-interruptible.html * igt@kms_flip@basic-flip-vs-modeset: - shard-lnl: [PASS][52] -> [SKIP][53] ([Intel XE#2482]) +5 other tests skip [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_flip@basic-flip-vs-modeset.html [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_flip@basic-flip-vs-modeset.html * igt@kms_flip@flip-vs-blocking-wf-vblank: - shard-lnl: NOTRUN -> [SKIP][54] ([Intel XE#2482]) [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_flip@flip-vs-blocking-wf-vblank.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-lnl: NOTRUN -> [FAIL][55] ([Intel XE#301] / [Intel XE#3149]) +2 other tests fail [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-lnl: NOTRUN -> [FAIL][56] ([Intel XE#301]) +1 other test fail [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-bmg: [PASS][57] -> [INCOMPLETE][58] ([Intel XE#2049] / [Intel XE#2597] / [Intel XE#8155]) +1 other test incomplete [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-2/igt@kms_flip@flip-vs-suspend-interruptible.html [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling: - shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#1745] / [Intel XE#9144]) [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling: - shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#1397] / [Intel XE#7385] / [Intel XE#9144]) +1 other test skip [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling: - shard-lnl: [PASS][62] -> [SKIP][63] ([Intel XE#1745] / [Intel XE#9144]) [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling: - shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#7178] / [Intel XE#7351]) +2 other tests skip [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html * igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x: - shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#7179]) [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-3/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt: - shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#6312] / [Intel XE#651]) +2 other tests skip [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-render: - shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#7061] / [Intel XE#7356]) [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-render.html * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2311]) +43 other tests skip [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-onoff: - shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#7779]) +7 other tests skip [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-render: - shard-lnl: NOTRUN -> [SKIP][70] ([Intel XE#7061]) +1 other test skip [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-render.html * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt: - shard-lnl: [PASS][71] -> [SKIP][72] ([Intel XE#7779]) +1 other test skip [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt: - shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#4141]) +13 other tests skip [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt: - shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#2548] / [Intel XE#7779]) +7 other tests skip [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt: - shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#656] / [Intel XE#7905]) +15 other tests skip [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt: - shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#7061] / [Intel XE#7356]) [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y: - shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#1469] / [Intel XE#7399]) +1 other test skip [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-offscreen-pri-shrfb-draw-blt: - shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#6312]) +4 other tests skip [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-offscreen-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt: - shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#7061]) +7 other tests skip [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt.html * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-onoff: - shard-lnl: NOTRUN -> [SKIP][80] ([Intel XE#7865]) +9 other tests skip [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-indfb-pgflip-blt: - shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#2313]) +48 other tests skip [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@psr-modesetfrombusy: - shard-lnl: [PASS][82] -> [SKIP][83] ([Intel XE#2548] / [Intel XE#7779]) +18 other tests skip [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move: - shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#7905]) +18 other tests skip [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move.html * igt@kms_hdr@bpc-switch: - shard-lnl: [PASS][85] -> [SKIP][86] ([Intel XE#9125]) +52 other tests skip [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-8/igt@kms_hdr@bpc-switch.html [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_hdr@bpc-switch.html * igt@kms_invalid_mode@uint-max-clock: - shard-lnl: [PASS][87] -> [SKIP][88] ([Intel XE#2568]) +1 other test skip [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_invalid_mode@uint-max-clock.html [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_invalid_mode@uint-max-clock.html * igt@kms_joiner@basic-max-non-joiner: - shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#4298] / [Intel XE#5873]) [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-7/igt@kms_joiner@basic-max-non-joiner.html * igt@kms_joiner@invalid-modeset-force-ultra-joiner: - shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#6911] / [Intel XE#7466]) [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html - shard-lnl: NOTRUN -> [SKIP][91] ([Intel XE#6900] / [Intel XE#7362]) [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html * igt@kms_mst@mst-suspend-read-crc: - shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#8348]) [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_mst@mst-suspend-read-crc.html * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping: - shard-lnl: [PASS][93] -> [SKIP][94] ([Intel XE#7250] / [Intel XE#9128]) [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier: - shard-lnl: NOTRUN -> [SKIP][95] ([Intel XE#7283]) +2 other tests skip [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping: - shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#7283]) +3 other tests skip [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5: - shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#8303]) +1 other test skip [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html * igt@kms_plane@plane-panning-bottom-right: - shard-lnl: [PASS][98] -> [SKIP][99] ([Intel XE#9128]) [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_plane@plane-panning-bottom-right.html [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_plane@plane-panning-bottom-right.html * igt@kms_plane_lowres@tiling-x@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][100] ([Intel XE#599] / [Intel XE#7382]) +2 other tests skip [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html * igt@kms_plane_multiple@tiling-y: - shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#5020] / [Intel XE#7348]) [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_plane_multiple@tiling-y.html - shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#5020] / [Intel XE#7348]) [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@kms_plane_multiple@tiling-y.html * igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format@pipe-a: - shard-lnl: [PASS][103] -> [SKIP][104] ([Intel XE#2763] / [Intel XE#6886]) +7 other tests skip [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format@pipe-a.html [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format@pipe-a.html * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25: - shard-lnl: NOTRUN -> [SKIP][105] ([Intel XE#2763] / [Intel XE#6886]) +7 other tests skip [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25.html * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling: - shard-lnl: [PASS][106] -> [SKIP][107] ([Intel XE#2763] / [Intel XE#6886] / [Intel XE#7687] / [Intel XE#9125]) +7 other tests skip [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-4/igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling.html [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling.html * igt@kms_pm_backlight@basic-brightness: - shard-lnl: [PASS][108] -> [SKIP][109] ([Intel XE#870]) [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_pm_backlight@basic-brightness.html [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_pm_backlight@basic-brightness.html * igt@kms_pm_dc@dc5-psr-suspend-resume: - shard-lnl: [PASS][110] -> [SKIP][111] ([Intel XE#8854]) [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-7/igt@kms_pm_dc@dc5-psr-suspend-resume.html [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_pm_dc@dc5-psr-suspend-resume.html * igt@kms_pm_dc@dc5-retention-flops: - shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#3309] / [Intel XE#7368]) [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_pm_dc@dc5-retention-flops.html * igt@kms_pm_dc@dc6-dpms: - shard-lnl: [PASS][113] -> [FAIL][114] ([Intel XE#8399]) [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-8/igt@kms_pm_dc@dc6-dpms.html [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_rpm@package-g7: - shard-lnl: NOTRUN -> [SKIP][115] ([Intel XE#6813]) [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_pm_rpm@package-g7.html - shard-bmg: NOTRUN -> [SKIP][116] ([Intel XE#6814] / [Intel XE#7428]) [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_pm_rpm@package-g7.html * igt@kms_pm_rpm@system-suspend-modeset: - shard-lnl: [PASS][117] -> [SKIP][118] ([Intel XE#7106]) [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-8/igt@kms_pm_rpm@system-suspend-modeset.html [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_pm_rpm@system-suspend-modeset.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][119] ([Intel XE#4608] / [Intel XE#7304]) +3 other tests skip [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf: - shard-lnl: NOTRUN -> [SKIP][120] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1: - shard-lnl: NOTRUN -> [SKIP][121] ([Intel XE#4608]) +3 other tests skip [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1.html * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf: - shard-lnl: NOTRUN -> [SKIP][122] ([Intel XE#2893] / [Intel XE#7304]) [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area: - shard-lnl: NOTRUN -> [SKIP][123] ([Intel XE#1489]) [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html * igt@kms_psr2_sf@psr2-cursor-plane-update-sf: - shard-lnl: [PASS][124] -> [SKIP][125] ([Intel XE#1489]) [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf: - shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#1489]) +5 other tests skip [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_su@frontbuffer-xrgb8888: - shard-lnl: NOTRUN -> [SKIP][127] ([Intel XE#1128] / [Intel XE#7413]) [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html - shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#2387] / [Intel XE#7429]) [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html * igt@kms_psr@fbc-psr2-no-drrs: - shard-lnl: NOTRUN -> [SKIP][129] ([Intel XE#2850] / [Intel XE#929]) [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr@fbc-psr2-no-drrs.html * igt@kms_psr@fbc-psr2-sprite-blt@edp-1: - shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345]) +1 other test skip [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_psr@fbc-psr2-sprite-blt@edp-1.html * igt@kms_psr@pr-cursor-plane-move: - shard-lnl: NOTRUN -> [SKIP][131] ([Intel XE#1406]) +2 other tests skip [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_psr@pr-cursor-plane-move.html * igt@kms_psr@psr-sprite-plane-move: - shard-lnl: [PASS][132] -> [SKIP][133] ([Intel XE#2850] / [Intel XE#929]) +5 other tests skip [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_psr@psr-sprite-plane-move.html [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr@psr-sprite-plane-move.html * igt@kms_psr@psr2-sprite-blt: - shard-bmg: NOTRUN -> [SKIP][134] ([Intel XE#2234] / [Intel XE#2850]) +7 other tests skip [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@kms_psr@psr2-sprite-blt.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-lnl: [PASS][135] -> [SKIP][136] ([Intel XE#7795]) [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_rotation_crc@primary-rotation-270: - shard-lnl: NOTRUN -> [SKIP][137] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_rotation_crc@primary-rotation-270.html * igt@kms_rotation_crc@sprite-rotation-90: - shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#3904] / [Intel XE#7342]) [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@kms_rotation_crc@sprite-rotation-90.html * igt@kms_sharpness_filter@invalid-filter-with-scaling-mode: - shard-bmg: NOTRUN -> [SKIP][139] ([Intel XE#6503]) +1 other test skip [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html * igt@kms_tiled_display@basic-test-pattern: - shard-bmg: NOTRUN -> [FAIL][140] ([Intel XE#1729] / [Intel XE#7424]) [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_tv_load_detect@load-detect: - shard-lnl: NOTRUN -> [SKIP][141] ([Intel XE#330] / [Intel XE#5857]) [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_tv_load_detect@load-detect.html * igt@kms_vrr@flip-suspend: - shard-bmg: NOTRUN -> [SKIP][142] ([Intel XE#1499]) +3 other tests skip [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-8/igt@kms_vrr@flip-suspend.html * igt@kms_vrr@seamless-rr-switch-vrr: - shard-lnl: NOTRUN -> [SKIP][143] ([Intel XE#1499]) [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_vrr@seamless-rr-switch-vrr.html * igt@xe_compute@eu-busy-10s: - shard-bmg: NOTRUN -> [SKIP][144] ([Intel XE#6599]) [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@xe_compute@eu-busy-10s.html * igt@xe_evict@evict-beng-small-multi-vm: - shard-lnl: NOTRUN -> [SKIP][145] ([Intel XE#6540] / [Intel XE#688]) +4 other tests skip [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@xe_evict@evict-beng-small-multi-vm.html * igt@xe_evict@evict-small-multi-queue-cm: - shard-bmg: NOTRUN -> [SKIP][146] ([Intel XE#8370]) [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-8/igt@xe_evict@evict-small-multi-queue-cm.html * igt@xe_exec_balancer@no-exec-cm-parallel-rebind: - shard-lnl: NOTRUN -> [SKIP][147] ([Intel XE#7482]) +7 other tests skip [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@xe_exec_balancer@no-exec-cm-parallel-rebind.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr: - shard-bmg: NOTRUN -> [SKIP][148] ([Intel XE#2322] / [Intel XE#7372]) +5 other tests skip [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race: - shard-lnl: NOTRUN -> [SKIP][149] ([Intel XE#1392]) +2 other tests skip [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html * igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind-prefetch: - shard-bmg: NOTRUN -> [SKIP][150] ([Intel XE#8374]) +11 other tests skip [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-8/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind-prefetch.html * igt@xe_exec_fault_mode@twice-multi-queue-prefetch: - shard-lnl: NOTRUN -> [SKIP][151] ([Intel XE#8374]) +5 other tests skip [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@xe_exec_fault_mode@twice-multi-queue-prefetch.html * igt@xe_exec_multi_queue@max-queues-preempt-mode-fault-dyn-priority: - shard-lnl: NOTRUN -> [SKIP][152] ([Intel XE#8364]) +13 other tests skip [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@xe_exec_multi_queue@max-queues-preempt-mode-fault-dyn-priority.html * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem: - shard-bmg: NOTRUN -> [SKIP][153] ([Intel XE#8364]) +25 other tests skip [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-4/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem.html * igt@xe_exec_reset@multi-queue-close-execqueues: - shard-lnl: NOTRUN -> [SKIP][154] ([Intel XE#8369]) +1 other test skip [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@xe_exec_reset@multi-queue-close-execqueues.html * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma: - shard-lnl: NOTRUN -> [SKIP][155] ([Intel XE#6196]) [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma.html * igt@xe_exec_threads@threads-multi-queue-fd-basic: - shard-lnl: NOTRUN -> [SKIP][156] ([Intel XE#8378]) +3 other tests skip [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@xe_exec_threads@threads-multi-queue-fd-basic.html * igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind: - shard-bmg: NOTRUN -> [SKIP][157] ([Intel XE#8378]) +9 other tests skip [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind.html * igt@xe_mmap@pci-membarrier: - shard-lnl: NOTRUN -> [SKIP][158] ([Intel XE#5100] / [Intel XE#7322] / [Intel XE#7408]) [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@xe_mmap@pci-membarrier.html * igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch: - shard-bmg: NOTRUN -> [SKIP][159] ([Intel XE#6964]) +4 other tests skip [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch.html * igt@xe_multigpu_svm@mgpu-migration-prefetch: - shard-lnl: NOTRUN -> [SKIP][160] ([Intel XE#6964]) +1 other test skip [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@xe_multigpu_svm@mgpu-migration-prefetch.html * igt@xe_page_reclaim@binds-full-pd: - shard-lnl: NOTRUN -> [SKIP][161] ([Intel XE#7793]) [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@xe_page_reclaim@binds-full-pd.html * igt@xe_page_reclaim@random: - shard-bmg: NOTRUN -> [SKIP][162] ([Intel XE#7793]) [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-4/igt@xe_page_reclaim@random.html * igt@xe_pat@pat-index-xelpg: - shard-bmg: NOTRUN -> [SKIP][163] ([Intel XE#2236] / [Intel XE#7590]) [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-2/igt@xe_pat@pat-index-xelpg.html * igt@xe_peer2peer@read: - shard-lnl: NOTRUN -> [SKIP][164] ([Intel XE#1061] / [Intel XE#7326] / [Intel XE#7353]) [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@xe_peer2peer@read.html - shard-bmg: NOTRUN -> [SKIP][165] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353]) [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@xe_peer2peer@read.html * igt@xe_pm@d3cold-mmap-system: - shard-lnl: NOTRUN -> [SKIP][166] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370]) [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@xe_pm@d3cold-mmap-system.html * igt@xe_pm@d3cold-multiple-execs: - shard-bmg: NOTRUN -> [SKIP][167] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-6/igt@xe_pm@d3cold-multiple-execs.html * igt@xe_pm@s3-vm-bind-prefetch: - shard-lnl: NOTRUN -> [SKIP][168] ([Intel XE#584] / [Intel XE#7369]) [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@xe_pm@s3-vm-bind-prefetch.html * igt@xe_pxp@pxp-stale-bo-bind-post-rpm: - shard-bmg: NOTRUN -> [SKIP][169] ([Intel XE#4733] / [Intel XE#7417]) [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-7/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html * igt@xe_query@multigpu-query-invalid-extension: - shard-bmg: NOTRUN -> [SKIP][170] ([Intel XE#944]) +1 other test skip [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-7/igt@xe_query@multigpu-query-invalid-extension.html * igt@xe_query@multigpu-query-oa-units: - shard-lnl: NOTRUN -> [SKIP][171] ([Intel XE#944]) +1 other test skip [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@xe_query@multigpu-query-oa-units.html * igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling: - shard-lnl: NOTRUN -> [SKIP][172] ([Intel XE#4130] / [Intel XE#7366]) [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html * igt@xe_sriov_flr@flr-each-isolation: - shard-lnl: NOTRUN -> [SKIP][173] ([Intel XE#3342]) [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@xe_sriov_flr@flr-each-isolation.html - shard-bmg: NOTRUN -> [FAIL][174] ([Intel XE#6569]) [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-1/igt@xe_sriov_flr@flr-each-isolation.html * igt@xe_wedged@wedged-at-any-timeout: - shard-bmg: NOTRUN -> [DMESG-WARN][175] ([Intel XE#8963]) [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-9/igt@xe_wedged@wedged-at-any-timeout.html #### Possible fixes #### * igt@fbdev@nullptr: - shard-lnl: [SKIP][176] ([Intel XE#2134]) -> [PASS][177] [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@fbdev@nullptr.html [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@fbdev@nullptr.html * igt@kms_color@ctm-max: - shard-lnl: [SKIP][178] ([Intel XE#3297]) -> [PASS][179] +1 other test pass [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_color@ctm-max.html [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_color@ctm-max.html * igt@kms_color@deep-color: - shard-lnl: [SKIP][180] ([Intel XE#1511] / [Intel XE#3297]) -> [PASS][181] [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_color@deep-color.html [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_color@deep-color.html * igt@kms_color_pipeline@plane-ctm3x4-lut1d: - shard-lnl: [SKIP][182] ([Intel XE#7006]) -> [PASS][183] [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_color_pipeline@plane-ctm3x4-lut1d.html [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_color_pipeline@plane-ctm3x4-lut1d.html * igt@kms_flip@basic-flip-vs-wf_vblank: - shard-lnl: [SKIP][184] ([Intel XE#2482]) -> [PASS][185] +6 other tests pass [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_flip@basic-flip-vs-wf_vblank.html [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling: - shard-lnl: [SKIP][186] ([Intel XE#1745] / [Intel XE#9144]) -> [PASS][187] +1 other test pass [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt: - shard-lnl: [SKIP][188] ([Intel XE#2548] / [Intel XE#7779]) -> [PASS][189] +20 other tests pass [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt: - shard-lnl: [SKIP][190] ([Intel XE#7779]) -> [PASS][191] +2 other tests pass [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html * igt@kms_invalid_mode@bad-vtotal: - shard-lnl: [SKIP][192] ([Intel XE#2568]) -> [PASS][193] [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_invalid_mode@bad-vtotal.html [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_invalid_mode@bad-vtotal.html * igt@kms_plane@pixel-format-x-tiled-modifier: - shard-lnl: [SKIP][194] ([Intel XE#7250] / [Intel XE#9128]) -> [PASS][195] [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_plane@pixel-format-x-tiled-modifier.html [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_plane@pixel-format-x-tiled-modifier.html * igt@kms_plane@planar-pixel-format-settings: - shard-lnl: [SKIP][196] ([Intel XE#7780] / [Intel XE#9125]) -> [PASS][197] [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_plane@planar-pixel-format-settings.html [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_plane@planar-pixel-format-settings.html * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-modifiers: - shard-lnl: [SKIP][198] ([Intel XE#2763] / [Intel XE#6886] / [Intel XE#7687] / [Intel XE#9125]) -> [PASS][199] +5 other tests pass [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-modifiers.html [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-modifiers.html * igt@kms_plane_scaling@planes-scaler-unity-scaling@pipe-b: - shard-lnl: [SKIP][200] ([Intel XE#2763] / [Intel XE#6886]) -> [PASS][201] +5 other tests pass [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_plane_scaling@planes-scaler-unity-scaling@pipe-b.html [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_plane_scaling@planes-scaler-unity-scaling@pipe-b.html * igt@kms_pm_backlight@fade-with-suspend: - shard-lnl: [SKIP][202] ([Intel XE#870]) -> [PASS][203] [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_pm_backlight@fade-with-suspend.html [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_pm_backlight@fade-with-suspend.html * igt@kms_pm_dc@dc5-dpms-suspend-resume: - shard-lnl: [FAIL][204] ([Intel XE#8399]) -> [PASS][205] [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_pm_dc@dc5-dpms-suspend-resume.html [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_pm_dc@dc5-dpms-suspend-resume.html * igt@kms_pm_dc@dc5-pageflip-negative: - shard-lnl: [SKIP][206] ([Intel XE#6927] / [Intel XE#8854]) -> [PASS][207] [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_pm_dc@dc5-pageflip-negative.html [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_pm_dc@dc5-pageflip-negative.html * igt@kms_pm_dc@dc5-psr: - shard-lnl: [SKIP][208] ([Intel XE#7794]) -> [PASS][209] [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_pm_dc@dc5-psr.html [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_rpm@universal-planes: - shard-lnl: [SKIP][210] ([Intel XE#4886]) -> [PASS][211] +1 other test pass [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_pm_rpm@universal-planes.html [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_pm_rpm@universal-planes.html * igt@kms_properties@colorop-properties-legacy: - shard-lnl: [SKIP][212] ([Intel XE#9126]) -> [PASS][213] [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_properties@colorop-properties-legacy.html [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_properties@colorop-properties-legacy.html * igt@kms_properties@plane-properties-legacy: - shard-lnl: [SKIP][214] ([Intel XE#9129]) -> [PASS][215] +1 other test pass [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_properties@plane-properties-legacy.html [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_properties@plane-properties-legacy.html * igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf: - shard-lnl: [SKIP][216] ([Intel XE#1489]) -> [PASS][217] +1 other test pass [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html * igt@kms_psr@psr-sprite-plane-onoff: - shard-lnl: [SKIP][218] ([Intel XE#2850] / [Intel XE#929]) -> [PASS][219] +4 other tests pass [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_psr@psr-sprite-plane-onoff.html [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_psr@psr-sprite-plane-onoff.html * igt@kms_vblank@query-forked: - shard-lnl: [SKIP][220] ([Intel XE#9125]) -> [PASS][221] +53 other tests pass [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_vblank@query-forked.html [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_vblank@query-forked.html * igt@xe_configfs@ctx-restore-mid-bb-invalid: - shard-bmg: [ABORT][222] ([Intel XE#8007]) -> [PASS][223] +2 other tests pass [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-9/igt@xe_configfs@ctx-restore-mid-bb-invalid.html [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-7/igt@xe_configfs@ctx-restore-mid-bb-invalid.html * igt@xe_pat@display-vs-wb-transient: - shard-lnl: [SKIP][224] ([Intel XE#7590] / [Intel XE#9125]) -> [PASS][225] [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@xe_pat@display-vs-wb-transient.html [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@xe_pat@display-vs-wb-transient.html * igt@xe_sriov_auto_provisioning@exclusive-ranges@numvfs-random: - shard-bmg: [FAIL][226] ([Intel XE#7992]) -> [PASS][227] +1 other test pass [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-1/igt@xe_sriov_auto_provisioning@exclusive-ranges@numvfs-random.html [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-4/igt@xe_sriov_auto_provisioning@exclusive-ranges@numvfs-random.html #### Warnings #### * igt@kms_atomic_transition@plane-all-modeset-transition: - shard-lnl: [SKIP][228] ([Intel XE#3279]) -> [SKIP][229] ([Intel XE#9125]) [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_atomic_transition@plane-all-modeset-transition.html [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_atomic_transition@plane-all-modeset-transition.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-lnl: [SKIP][230] ([Intel XE#9125]) -> [SKIP][231] ([Intel XE#1407]) +4 other tests skip [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: - shard-lnl: [SKIP][232] ([Intel XE#9125]) -> [SKIP][233] ([Intel XE#3658] / [Intel XE#7360]) +2 other tests skip [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-lnl: [SKIP][234] ([Intel XE#1407]) -> [SKIP][235] ([Intel XE#9125]) +5 other tests skip [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip: - shard-lnl: [SKIP][236] ([Intel XE#7059] / [Intel XE#7085]) -> [SKIP][237] ([Intel XE#9125]) [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip: - shard-lnl: [SKIP][238] ([Intel XE#9125]) -> [SKIP][239] ([Intel XE#7059] / [Intel XE#7085]) [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@y-tiled-32bpp-rotate-0: - shard-lnl: [SKIP][240] ([Intel XE#9125]) -> [SKIP][241] ([Intel XE#1124]) +10 other tests skip [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html * igt@kms_big_fb@y-tiled-addfb-size-overflow: - shard-lnl: [SKIP][242] ([Intel XE#1428] / [Intel XE#7387]) -> [SKIP][243] ([Intel XE#9125]) [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_big_fb@y-tiled-addfb-size-overflow.html [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_big_fb@y-tiled-addfb-size-overflow.html * igt@kms_big_fb@yf-tiled-64bpp-rotate-180: - shard-lnl: [SKIP][244] ([Intel XE#1124]) -> [SKIP][245] ([Intel XE#9125]) +9 other tests skip [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-addfb: - shard-lnl: [SKIP][246] ([Intel XE#9125]) -> [SKIP][247] ([Intel XE#1467] / [Intel XE#7367]) [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_big_fb@yf-tiled-addfb.html [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_big_fb@yf-tiled-addfb.html * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p: - shard-lnl: [SKIP][248] ([Intel XE#8365]) -> [SKIP][249] ([Intel XE#9125]) +1 other test skip [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html * igt@kms_bw@linear-tiling-2-displays-target-1920x1080p: - shard-lnl: [SKIP][250] ([Intel XE#9125]) -> [SKIP][251] ([Intel XE#367]) [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_bw@linear-tiling-2-displays-target-1920x1080p.html [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_bw@linear-tiling-2-displays-target-1920x1080p.html * igt@kms_bw@linear-tiling-2-displays-target-2160x1440p: - shard-lnl: [SKIP][252] ([Intel XE#367]) -> [SKIP][253] ([Intel XE#9125]) +2 other tests skip [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_bw@linear-tiling-2-displays-target-2160x1440p.html [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_bw@linear-tiling-2-displays-target-2160x1440p.html * igt@kms_bw@linear-tiling-4-displays-target-1920x1080p: - shard-lnl: [SKIP][254] ([Intel XE#9125]) -> [SKIP][255] ([Intel XE#8365]) [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_bw@linear-tiling-4-displays-target-1920x1080p.html [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_bw@linear-tiling-4-displays-target-1920x1080p.html * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc: - shard-lnl: [SKIP][256] ([Intel XE#2887]) -> [SKIP][257] ([Intel XE#9125]) +13 other tests skip [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs: - shard-lnl: [SKIP][258] ([Intel XE#9125]) -> [SKIP][259] ([Intel XE#2669] / [Intel XE#7389]) [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs: - shard-lnl: [SKIP][260] ([Intel XE#3432]) -> [SKIP][261] ([Intel XE#9125]) +1 other test skip [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc: - shard-lnl: [SKIP][262] ([Intel XE#9125]) -> [SKIP][263] ([Intel XE#3432]) +1 other test skip [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc: - shard-lnl: [SKIP][264] ([Intel XE#9125]) -> [SKIP][265] ([Intel XE#2887]) +15 other tests skip [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html * igt@kms_content_protection@atomic-dpms: - shard-lnl: [SKIP][266] ([Intel XE#7642]) -> [SKIP][267] ([Intel XE#9125]) +1 other test skip [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-1/igt@kms_content_protection@atomic-dpms.html [267]: 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igt@kms_content_protection@suspend-resume: - shard-lnl: [SKIP][272] ([Intel XE#9125]) -> [SKIP][273] ([Intel XE#7642]) +4 other tests skip [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_content_protection@suspend-resume.html [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_content_protection@suspend-resume.html * igt@kms_cursor_crc@cursor-onscreen-512x512: - shard-lnl: [SKIP][274] ([Intel XE#2321] / [Intel XE#7355]) -> [SKIP][275] ([Intel XE#9125]) +2 other tests skip [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_cursor_crc@cursor-onscreen-512x512.html [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_cursor_crc@cursor-onscreen-512x512.html * igt@kms_cursor_crc@cursor-random-512x170: - shard-lnl: [SKIP][276] ([Intel XE#9125]) -> [SKIP][277] ([Intel XE#2321] / [Intel XE#7355]) [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_cursor_crc@cursor-random-512x170.html [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_cursor_crc@cursor-random-512x170.html * igt@kms_cursor_crc@cursor-rapid-movement-128x42: - shard-lnl: [SKIP][278] ([Intel XE#1424]) -> [SKIP][279] ([Intel XE#9125]) +2 other tests skip [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html * igt@kms_cursor_crc@cursor-sliding-64x21: - shard-lnl: [SKIP][280] ([Intel XE#9125]) -> [SKIP][281] ([Intel XE#1424]) +3 other tests skip [280]: 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igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling: - shard-lnl: [SKIP][298] ([Intel XE#1745] / [Intel XE#9144]) -> [SKIP][299] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144]) +1 other test skip [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling: - shard-lnl: [SKIP][300] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144]) -> [SKIP][301] ([Intel XE#1745] / [Intel XE#9144]) +1 other test skip [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html [301]: 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https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-render.html [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-render.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt: - shard-lnl: [SKIP][322] ([Intel XE#2548] / [Intel XE#7779]) -> [SKIP][323] ([Intel XE#656] / [Intel XE#7905]) +41 other tests skip [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render: - shard-lnl: [SKIP][324] ([Intel XE#656] / [Intel XE#7905]) -> [SKIP][325] ([Intel XE#2548] / [Intel XE#7779]) +36 other tests skip [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt: - shard-lnl: [SKIP][326] ([Intel XE#7779]) -> [SKIP][327] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt.html [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt.html * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-plflip-blt: - shard-lnl: [SKIP][328] ([Intel XE#7865]) -> [SKIP][329] ([Intel XE#7779]) +26 other tests skip [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-8/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-plflip-blt.html [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move: - shard-lnl: [SKIP][330] ([Intel XE#7779]) -> [SKIP][331] ([Intel XE#7865]) +29 other tests skip [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move.html [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move.html * igt@kms_hdr@brightness-with-hdr: - shard-lnl: [SKIP][332] ([Intel XE#9125]) -> [SKIP][333] ([Intel XE#3374] / [Intel XE#3544]) [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_hdr@brightness-with-hdr.html [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_hdr@brightness-with-hdr.html - shard-bmg: [SKIP][334] ([Intel XE#3544]) -> [SKIP][335] ([Intel XE#3374] / [Intel XE#3544]) [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html * igt@kms_hdr@static-toggle-suspend: - shard-lnl: [SKIP][336] ([Intel XE#9125]) -> [SKIP][337] ([Intel XE#1503]) [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_hdr@static-toggle-suspend.html [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_hdr@static-toggle-suspend.html * igt@kms_mst@mst-suspend-read-crc: - shard-lnl: [SKIP][338] ([Intel XE#8348]) -> [SKIP][339] ([Intel XE#9125]) [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_mst@mst-suspend-read-crc.html [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_mst@mst-suspend-read-crc.html * igt@kms_plane_lowres@tiling-none: - shard-lnl: [SKIP][340] ([Intel XE#599] / [Intel XE#7382]) -> [SKIP][341] ([Intel XE#9125]) [340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-7/igt@kms_plane_lowres@tiling-none.html [341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_plane_lowres@tiling-none.html * igt@kms_plane_lowres@tiling-x: - shard-lnl: [SKIP][342] ([Intel XE#9125]) -> [SKIP][343] ([Intel XE#599] / [Intel XE#7382]) [342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_plane_lowres@tiling-x.html [343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_plane_lowres@tiling-x.html * igt@kms_plane_multiple@2x-tiling-y: - shard-lnl: [SKIP][344] ([Intel XE#4596] / [Intel XE#5854]) -> [SKIP][345] ([Intel XE#9125]) [344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-8/igt@kms_plane_multiple@2x-tiling-y.html [345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_plane_multiple@2x-tiling-y.html * igt@kms_plane_scaling@2x-scaler-multi-pipe: - shard-lnl: [SKIP][346] ([Intel XE#7343] / [Intel XE#7687] / [Intel XE#9125]) -> [SKIP][347] ([Intel XE#309] / [Intel XE#7343]) [346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html [347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_plane_scaling@2x-scaler-multi-pipe.html * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-c: - shard-lnl: [SKIP][348] ([Intel XE#2763] / [Intel XE#6886] / [Intel XE#7687] / [Intel XE#9125]) -> [SKIP][349] ([Intel XE#2763] / [Intel XE#6886]) +1 other test skip [348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-c.html [349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-c.html * igt@kms_pm_dc@deep-pkgc: - shard-lnl: [FAIL][350] ([Intel XE#2029] / [Intel XE#7395]) -> [SKIP][351] ([Intel XE#7778]) [350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html [351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_pm_dc@deep-pkgc.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf: - shard-lnl: [SKIP][352] ([Intel XE#1489]) -> [SKIP][353] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) +2 other tests skip [352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html [353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area: - shard-lnl: [SKIP][354] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) -> [SKIP][355] ([Intel XE#1489]) [354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html [355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area: - shard-lnl: [SKIP][356] ([Intel XE#2893] / [Intel XE#7304]) -> [SKIP][357] ([Intel XE#1489]) +5 other tests skip [356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html [357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area: - shard-lnl: [SKIP][358] ([Intel XE#1489]) -> [SKIP][359] ([Intel XE#2893] / [Intel XE#7304]) +2 other tests skip [358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html [359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-3/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html * igt@kms_psr2_su@page_flip-p010: - shard-lnl: [SKIP][360] ([Intel XE#1122] / [Intel XE#7429]) -> [SKIP][361] ([Intel XE#1128] / [Intel XE#7413]) [360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_psr2_su@page_flip-p010.html [361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_psr2_su@page_flip-p010.html * igt@kms_psr2_su@page_flip-xrgb8888: - shard-lnl: [SKIP][362] ([Intel XE#1128] / [Intel XE#7413]) -> [SKIP][363] ([Intel XE#1122] / [Intel XE#7429]) [362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-8/igt@kms_psr2_su@page_flip-xrgb8888.html [363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr2_su@page_flip-xrgb8888.html * igt@kms_psr@fbc-pr-sprite-plane-onoff: - shard-lnl: [SKIP][364] ([Intel XE#1406]) -> [SKIP][365] ([Intel XE#2850] / [Intel XE#929]) +4 other tests skip [364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_psr@fbc-pr-sprite-plane-onoff.html [365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_psr@fbc-pr-sprite-plane-onoff.html * igt@kms_psr@fbc-psr2-dpms: - shard-lnl: [SKIP][366] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][367] ([Intel XE#1406] / [Intel XE#7345]) +1 other test skip [366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_psr@fbc-psr2-dpms.html [367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_psr@fbc-psr2-dpms.html * igt@kms_psr@pr-primary-blt: - shard-lnl: [SKIP][368] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][369] ([Intel XE#1406]) +4 other tests skip [368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_psr@pr-primary-blt.html [369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-2/igt@kms_psr@pr-primary-blt.html * igt@kms_rotation_crc@bad-tiling: - shard-lnl: [SKIP][370] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) -> [SKIP][371] ([Intel XE#9125]) +1 other test skip [370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-3/igt@kms_rotation_crc@bad-tiling.html [371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_rotation_crc@bad-tiling.html * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0: - shard-lnl: [SKIP][372] ([Intel XE#9125]) -> [SKIP][373] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) [372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html [373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-7/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180: - shard-lnl: [SKIP][374] ([Intel XE#9125]) -> [SKIP][375] ([Intel XE#1127] / [Intel XE#5813]) [374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html [375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180: - shard-lnl: [SKIP][376] ([Intel XE#1127] / [Intel XE#5813]) -> [SKIP][377] ([Intel XE#9125]) [376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html [377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html * igt@kms_vrr@lobf: - shard-lnl: [SKIP][378] ([Intel XE#1499]) -> [SKIP][379] ([Intel XE#9125]) [378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-5/igt@kms_vrr@lobf.html [379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-6/igt@kms_vrr@lobf.html * igt@kms_vrr@negative-basic: - shard-lnl: [SKIP][380] ([Intel XE#9125]) -> [SKIP][381] ([Intel XE#1499]) [380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-lnl-6/igt@kms_vrr@negative-basic.html [381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-lnl-4/igt@kms_vrr@negative-basic.html * igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all: - shard-bmg: [ABORT][382] ([Intel XE#8007] / [Intel XE#8868]) -> [ABORT][383] ([Intel XE#8868]) [382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-2/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html [383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-10/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html * igt@xe_exec_reset@gt-reset-fault-injection: - shard-bmg: [ABORT][384] ([Intel XE#9145]) -> [DMESG-WARN][385] ([Intel XE#9130]) [384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-9/igt@xe_exec_reset@gt-reset-fault-injection.html [385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-5/igt@xe_exec_reset@gt-reset-fault-injection.html * igt@xe_wedged@basic-wedged: - shard-bmg: [DMESG-WARN][386] ([Intel XE#8963]) -> [ABORT][387] ([Intel XE#8591] / [Intel XE#8963]) [386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada/shard-bmg-2/igt@xe_wedged@basic-wedged.html [387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/shard-bmg-10/igt@xe_wedged@basic-wedged.html [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061 [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127 [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407 [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428 [Intel XE#1466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1466 [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467 [Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1511]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1511 [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729 [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745 [Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029 [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049 [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134 [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374 [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387 [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427 [Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482 [Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548 [Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568 [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149 [Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279 [Intel XE#3297]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3297 [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330 [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309 [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342 [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432 [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544 [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658 [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904 [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210 [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298 [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331 [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354 [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417 [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596 [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608 [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609 [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733 [Intel XE#4886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4886 [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020 [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100 [Intel XE#5447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5447 [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813 [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584 [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854 [Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857 [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873 [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599 [Intel XE#6127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6127 [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196 [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312 [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569 [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599 [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707 [Intel XE#6813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6813 [Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886 [Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900 [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911 [Intel XE#6927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6927 [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953 [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964 [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969 [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974 [Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006 [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059 [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061 [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085 [Intel XE#7106]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7106 [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178 [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179 [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227 [Intel XE#7250]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7250 [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283 [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304 [Intel XE#7322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7322 [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326 [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342 [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343 [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345 [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348 [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351 [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353 [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355 [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356 [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358 [Intel XE#7360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7360 [Intel XE#7362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7362 [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366 [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367 [Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368 [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369 [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370 [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372 [Intel XE#7382]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7382 [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385 [Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386 [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387 [Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389 [Intel XE#7395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7395 [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399 [Intel XE#7408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7408 [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413 [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417 [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424 [Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428 [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429 [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439 [Intel XE#7450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7450 [Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466 [Intel XE#7467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7467 [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482 [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590 [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642 [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679 [Intel XE#7687]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7687 [Intel XE#7778]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7778 [Intel XE#7779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7779 [Intel XE#7780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7780 [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793 [Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794 [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795 [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865 [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905 [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935 [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992 [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007 [Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155 [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265 [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303 [Intel XE#8348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8348 [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364 [Intel XE#8365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8365 [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369 [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370 [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374 [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378 [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399 [Intel XE#8583]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8583 [Intel XE#8587]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8587 [Intel XE#8591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8591 [Intel XE#8680]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8680 [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870 [Intel XE#8854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8854 [Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868 [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963 [Intel XE#9009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9009 [Intel XE#9125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9125 [Intel XE#9126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9126 [Intel XE#9128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9128 [Intel XE#9129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9129 [Intel XE#9130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9130 [Intel XE#9144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9144 [Intel XE#9145]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9145 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 Build changes ------------- * IGT: IGT_9086 -> IGT_9088 * Linux: xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada -> xe-pw-167706v8 IGT_9086: a89061ecccede222b8da2f310f3bf71ed908c365 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_9088: 55a88d20e327d5c440cd3f3d661684fb83f29027 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5710-dd822035c9dcd89e47cbfa75da6f3119617fbada: dd822035c9dcd89e47cbfa75da6f3119617fbada xe-pw-167706v8: 167706v8 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v8/index.html [-- Attachment #2: Type: text/html, Size: 135201 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms @ 2026-09-09 16:18 tilak.tirumalesh.tangudu 2026-09-09 16:18 ` [PATCH 2/2] " tilak.tirumalesh.tangudu 0 siblings, 1 reply; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-09 16:18 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, tejas.upadhyay, gustavo.sousa, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> This series adds Wa_14025941587 (minimum IDLEDLY floor) for Xe2, Xe3 and Xe3p and hardens the shared adjust_idledly() helper it builds on. Patch 1 fixes three pre-existing corner cases in adjust_idledly() that can panic or misprogram RING_IDLEDLY. (timestamp_base == 0 divide-by-zero, IDLE_WAIT_TIME == 0 underflow, and u32 overflow in the tick<->ns conversions). Patch 2 applies Wa_14025941587 on top of the hardened helper. Patch1 v2: Fix fourth issue by clamp with a floor (DIV_ROUND_DOWN_ULL) so the programmed delay stays strictly below maxcnt. Patch2 v8: Round up (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, so the tick-quantized delay cannot round back below 5 us. Tangudu Tilak Tirumalesh (2): drm/xe: harden adjust_idledly() against divide-by-zero and overflow drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 75 +++++++++++++++++++++++++----- drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + 3 files changed, 67 insertions(+), 12 deletions(-) -- 2.46.0 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-09 16:18 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu @ 2026-09-09 16:18 ` tilak.tirumalesh.tangudu 2026-09-09 16:33 ` sashiko-bot 2026-09-11 21:32 ` Belgaumkar, Vinay 0 siblings, 2 replies; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-09 16:18 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, tejas.upadhyay, gustavo.sousa, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Avoid programming the IDLEDLY timer to less than 5 microseconds. Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media Versions 13.01 to 35.03 v2: Use xe_rtp_match_not_sriov_vf, move to local variable Remove warn and other knits - Matt R v3: Add verbose comment - Tejas v4: Restore IDLE_DLY register on engine reset. Add it to GUC save-restore list. -Vivek v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay v6: Avoid clearing inhibit switch - Bala Refactor code accordingly by adding idle_reg_val. v7: Rebased with the divide-by-zero/overflow guards living in a separate hardening patch. v8: Preserve the Wa_16023105232 floor (DIV_ROUND_DOWN_ULL) and the maxcnt == 0 guard from the hardening patch. Round up (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, so the tick-quantized delay cannot round back below 5 us. Assisted-by: GitHub_Copilot:claude-opus-4.8 Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> --- drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 69 ++++++++++++++++++++++++------ drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + 3 files changed, 60 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c index ff8eee3831aa..58a3f6293ce4 100644 --- a/drivers/gpu/drm/xe/xe_guc_ads.c +++ b/drivers/gpu/drm/xe/xe_guc_ads.c @@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads, } } - if (XE_GT_WA(hwe->gt, 16023105232)) + if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587)) guc_mmio_regset_write_one(ads, regset_map, RING_IDLEDLY(hwe->mmio_base), count++); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index c86890e09b55..37cd7fe38c2b 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -588,33 +588,78 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, static void adjust_idledly(struct xe_hw_engine *hwe) { struct xe_gt *gt = hwe->gt; - u32 idledly, maxcnt; + u32 idledly, idledly_reg_val, maxcnt; u32 idledly_units_ps = 8 * gt->info.timestamp_base; u32 maxcnt_units_ns = 640; - bool inhibit_switch = 0; + bool inhibit_switch = false; + bool wa_applied = false; + bool clamped_below_maxcnt = false; + + if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) || + XE_GT_WA(gt, 14025941587)) { + u32 mincnt_idledly_ns = 5000; - if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) { /* xe_gt_clock_init() zeroes timestamp_base on unknown crystal clock. */ if (!idledly_units_ps) { xe_gt_warn(gt, "idledly WA skipped: timestamp_base is 0\n"); return; } - idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); + idledly_reg_val = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); - inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; - idledly = REG_FIELD_GET(IDLE_DELAY, idledly); + inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED; + idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val); idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); maxcnt *= maxcnt_units_ns; - if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { - /* Floor below maxcnt; write 0 to still clear the inhibit bit. */ - idledly = maxcnt ? - DIV_ROUND_DOWN_ULL((u64)(maxcnt - 1) * 1000, - idledly_units_ps) : 0; - xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly); + /* + * Wa_14025941587 is applied before Wa_16023105232, which has + * higher priority; the two are not expected to conflict. + */ + if (XE_GT_WA(gt, 14025941587) && + idledly < mincnt_idledly_ns) { + idledly = mincnt_idledly_ns; + wa_applied = true; + } + + if (XE_GT_WA(gt, 16023105232) && + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { + /* maxcnt may be 0 if IDLE_WAIT_TIME is unprogrammed. */ + idledly = maxcnt ? maxcnt - 1 : 0; + clamped_below_maxcnt = true; + wa_applied = true; + /* inhibit_switch override to keep + * semantics of Wa_16023105232 + */ + if (inhibit_switch) + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; + } + + if (wa_applied) { + u32 idledly_ticks; + + /* + * Wa_16023105232 requires idledly < maxcnt, so floor + * that clamp; otherwise round up to guarantee the + * Wa_14025941587 minimum survives tick quantization. + */ + if (clamped_below_maxcnt) + idledly_ticks = DIV_ROUND_DOWN_ULL((u64)idledly * 1000, + idledly_units_ps); + else + idledly_ticks = DIV_ROUND_UP_ULL((u64)idledly * 1000, + idledly_units_ps); + + idledly_reg_val &= ~IDLE_DELAY; + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, idledly_ticks); + xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n", + hwe->name, idledly, maxcnt, + !!inhibit_switch, gt->info.timestamp_base); + xe_mmio_write32(>->mmio, + RING_IDLEDLY(hwe->mmio_base), + idledly_reg_val); } } } diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules index dd69ad07f7a9..3001155f8d09 100644 --- a/drivers/gpu/drm/xe/xe_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules @@ -72,3 +72,5 @@ 16029897822 MEDIA_VERSION(3500) GRAPHICS_VERSION(3510) 14027054324 GRAPHICS_VERSION(3511) +14025941587 GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf) + MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf) -- 2.46.0 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-09 16:18 ` [PATCH 2/2] " tilak.tirumalesh.tangudu @ 2026-09-09 16:33 ` sashiko-bot 2026-09-09 17:06 ` Tangudu, Tilak Tirumalesh 2026-09-11 21:32 ` Belgaumkar, Vinay 1 sibling, 1 reply; 17+ messages in thread From: sashiko-bot @ 2026-09-09 16:33 UTC (permalink / raw) To: tilak.tirumalesh.tangudu; +Cc: intel-xe Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] Tick quantization rounding up causes `idledly` to exceed `maxcnt`, triggering spurious kernel warnings and WA invariant violations. -- commit d777113f52ced7ebda03cbb9155258701e427a45 Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms This commit avoids programming the IDLEDLY timer to less than 5 microseconds. It applies wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media Versions 13.01 to 35.03. > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c > index c86890e09b555..37cd7fe38c2b5 100644 > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c [ ... ] > @@ -588,33 +588,78 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, > static void adjust_idledly(struct xe_hw_engine *hwe) > { > struct xe_gt *gt = hwe->gt; [ ... ] > + if (XE_GT_WA(gt, 16023105232) && > + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [Severity: Medium] Will this warning spuriously fire on subsequent reads? If maxcnt is unprogrammed (0), the two workarounds conflict entirely (one forcing 5000, the other forcing 0), which would cause a WARN_ON and clamp cycle on every reset. Additionally, if maxcnt tightly bounds the 5000ns minimum, the tick quantization rounding up below can push the delay time above maxcnt. On the next engine reset or resume, this triggers this xe_gt_WARN_ON() and forces a clamp, causing idledly to oscillate and violate the invariants of Wa_16023105232. > + /* maxcnt may be 0 if IDLE_WAIT_TIME is unprogrammed. */ > + idledly = maxcnt ? maxcnt - 1 : 0; > + clamped_below_maxcnt = true; > + wa_applied = true; > + /* inhibit_switch override to keep > + * semantics of Wa_16023105232 > + */ > + if (inhibit_switch) > + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; > + } > + > + if (wa_applied) { > + u32 idledly_ticks; > + > + /* > + * Wa_16023105232 requires idledly < maxcnt, so floor > + * that clamp; otherwise round up to guarantee the > + * Wa_14025941587 minimum survives tick quantization. > + */ > + if (clamped_below_maxcnt) > + idledly_ticks = DIV_ROUND_DOWN_ULL((u64)idledly * 1000, > + idledly_units_ps); > + else > + idledly_ticks = DIV_ROUND_UP_ULL((u64)idledly * 1000, > + idledly_units_ps); ^^^^^^^^^^^^^^^^^^ [Severity: Medium] Does this ceiling division push the delay time above the maxcnt boundary? When maxcnt is close to the 5000ns minimum (e.g. 5120ns), rounding up idledly to ticks produces a delay (e.g. 5417ns) that exceeds maxcnt, storing a value that will fail the Wa_16023105232 check on the next read. > + > + idledly_reg_val &= ~IDLE_DELAY; > + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, idledly_ticks); -- Sashiko AI review · https://sashiko.dev/#/patchset/20260909161844.125147-1-tilak.tirumalesh.tangudu@intel.com?part=2 ^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-09 16:33 ` sashiko-bot @ 2026-09-09 17:06 ` Tangudu, Tilak Tirumalesh 0 siblings, 0 replies; 17+ messages in thread From: Tangudu, Tilak Tirumalesh @ 2026-09-09 17:06 UTC (permalink / raw) To: sashiko-reviews@lists.linux.dev; +Cc: intel-xe@lists.freedesktop.org > -----Original Message----- > From: sashiko-bot@kernel.org <sashiko-bot@kernel.org> > Sent: 09 September 2026 22:03 > To: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> > Cc: intel-xe@lists.freedesktop.org > Subject: Re: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p > platforms > > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to > consider: > - [Medium] Tick quantization rounding up causes `idledly` to exceed `maxcnt`, > triggering spurious kernel warnings and WA invariant violations. > -- > > commit d777113f52ced7ebda03cbb9155258701e427a45 > Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> > > drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms > > This commit avoids programming the IDLEDLY timer to less than 5 > microseconds. > It applies wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media > Versions 13.01 to 35.03. > > > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c > > b/drivers/gpu/drm/xe/xe_hw_engine.c > > index c86890e09b555..37cd7fe38c2b5 100644 > > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c > [ ... ] > > @@ -588,33 +588,78 @@ static void hw_engine_init_early(struct xe_gt > > *gt, struct xe_hw_engine *hwe, static void adjust_idledly(struct > > xe_hw_engine *hwe) { > > struct xe_gt *gt = hwe->gt; > [ ... ] > > + if (XE_GT_WA(gt, 16023105232) && > > + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > > [Severity: Medium] > Will this warning spuriously fire on subsequent reads? > > If maxcnt is unprogrammed (0), the two workarounds conflict entirely (one > forcing 5000, the other forcing 0), which would cause a WARN_ON and clamp > cycle on every reset. > > Additionally, if maxcnt tightly bounds the 5000ns minimum, the tick > quantization rounding up below can push the delay time above maxcnt. On the > next engine reset or resume, this triggers this xe_gt_WARN_ON() and forces a > clamp, causing idledly to oscillate and violate the invariants of > Wa_16023105232. This condition is guarded by xe_gt_WARN_ON() inherited from the existing Wa_16023105232 hardening , it deliberately fires to surface an unexpected IDLE_WAIT_TIME == 0 register state rather than silently misprogramming the delay, and always resolves to a safe value (0, with the inhibit bit cleared) regardless of which workaround is active. On every platform this series targets, IDLE_WAIT_TIME is programmed to a non-zero value, so this path is not expected to be hit in practice. This condition is guarded by xe_gt_WARN_ON() inherited from the existing Wa_16023105232 hardening , it deliberately fires to surface an unexpected IDLE_WAIT_TIME == 0 register state rather than silently misprogramming the delay, and always resolves to a safe value (0, with the inhibit bit cleared) regardless of which workaround is active. On every platform this series targets, IDLE_WAIT_TIME is programmed to a non-zero value, so this path is not expected to be hit in practice. > > > + /* maxcnt may be 0 if IDLE_WAIT_TIME is > unprogrammed. */ > > + idledly = maxcnt ? maxcnt - 1 : 0; > > + clamped_below_maxcnt = true; > > + wa_applied = true; > > + /* inhibit_switch override to keep > > + * semantics of Wa_16023105232 > > + */ > > + if (inhibit_switch) > > + idledly_reg_val &= > ~INHIBIT_SWITCH_UNTIL_PREEMPTED; > > + } > > + > > + if (wa_applied) { > > + u32 idledly_ticks; > > + > > + /* > > + * Wa_16023105232 requires idledly < maxcnt, so floor > > + * that clamp; otherwise round up to guarantee the > > + * Wa_14025941587 minimum survives tick > quantization. > > + */ > > + if (clamped_below_maxcnt) > > + idledly_ticks = > DIV_ROUND_DOWN_ULL((u64)idledly * 1000, > > + > idledly_units_ps); > > + else > > + idledly_ticks = > DIV_ROUND_UP_ULL((u64)idledly * 1000, > > + > idledly_units_ps); > ^^^^^^^^^^^^^^^^^^ > > [Severity: Medium] > Does this ceiling division push the delay time above the maxcnt boundary? > > When maxcnt is close to the 5000ns minimum (e.g. 5120ns), rounding up > idledly to ticks produces a delay (e.g. 5417ns) that exceeds maxcnt, storing a > value that will fail the Wa_16023105232 check on the next read. > Rounding the 5 µs floor up to whole ticks could, in principle, land above maxcnt if maxcnt were close enough to the floor. In practice, on every platform this workaround is enabled for, IDLE_WAIT_TIME is programmed with enough margin above 5 µs that the two workarounds don't conflict -Tilak > > + > > + idledly_reg_val &= ~IDLE_DELAY; > > + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, > idledly_ticks); > > -- > Sashiko AI review · https://sashiko.dev/#/patchset/20260909161844.125147-1- > tilak.tirumalesh.tangudu@intel.com?part=2 ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-09 16:18 ` [PATCH 2/2] " tilak.tirumalesh.tangudu 2026-09-09 16:33 ` sashiko-bot @ 2026-09-11 21:32 ` Belgaumkar, Vinay 1 sibling, 0 replies; 17+ messages in thread From: Belgaumkar, Vinay @ 2026-09-11 21:32 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, tejas.upadhyay, gustavo.sousa, intel-xe On 9/9/2026 9:18 AM, tilak.tirumalesh.tangudu@intel.com wrote: > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> > > Avoid programming the IDLEDLY timer to less than 5 microseconds. > Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 > and Media Versions 13.01 to 35.03 > > v2: Use xe_rtp_match_not_sriov_vf, move to local variable > Remove warn and other knits - Matt R > > v3: Add verbose comment - Tejas > > v4: Restore IDLE_DLY register on engine reset. > Add it to GUC save-restore list. -Vivek > > v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay > > v6: Avoid clearing inhibit switch - Bala > Refactor code accordingly by adding idle_reg_val. > > v7: Rebased with the divide-by-zero/overflow guards living in > a separate hardening patch. > > v8: Preserve the Wa_16023105232 floor (DIV_ROUND_DOWN_ULL) and the > maxcnt == 0 guard from the hardening patch. Round up > (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, > so the tick-quantized delay cannot round back below 5 us. > > Assisted-by: GitHub_Copilot:claude-opus-4.8 > Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> LGTM, Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > --- > drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- > drivers/gpu/drm/xe/xe_hw_engine.c | 69 ++++++++++++++++++++++++------ > drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + > 3 files changed, 60 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c > index ff8eee3831aa..58a3f6293ce4 100644 > --- a/drivers/gpu/drm/xe/xe_guc_ads.c > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c > @@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads, > } > } > > - if (XE_GT_WA(hwe->gt, 16023105232)) > + if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587)) > guc_mmio_regset_write_one(ads, regset_map, > RING_IDLEDLY(hwe->mmio_base), > count++); > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c > index c86890e09b55..37cd7fe38c2b 100644 > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c > @@ -588,33 +588,78 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, > static void adjust_idledly(struct xe_hw_engine *hwe) > { > struct xe_gt *gt = hwe->gt; > - u32 idledly, maxcnt; > + u32 idledly, idledly_reg_val, maxcnt; > u32 idledly_units_ps = 8 * gt->info.timestamp_base; > u32 maxcnt_units_ns = 640; > - bool inhibit_switch = 0; > + bool inhibit_switch = false; > + bool wa_applied = false; > + bool clamped_below_maxcnt = false; > + > + if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) || > + XE_GT_WA(gt, 14025941587)) { > + u32 mincnt_idledly_ns = 5000; > > - if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) { > /* xe_gt_clock_init() zeroes timestamp_base on unknown crystal clock. */ > if (!idledly_units_ps) { > xe_gt_warn(gt, "idledly WA skipped: timestamp_base is 0\n"); > return; > } > > - idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); > + idledly_reg_val = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); > maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); > > - inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; > - idledly = REG_FIELD_GET(IDLE_DELAY, idledly); > + inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED; > + idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val); > idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); > maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); > maxcnt *= maxcnt_units_ns; > > - if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { > - /* Floor below maxcnt; write 0 to still clear the inhibit bit. */ > - idledly = maxcnt ? > - DIV_ROUND_DOWN_ULL((u64)(maxcnt - 1) * 1000, > - idledly_units_ps) : 0; > - xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly); > + /* > + * Wa_14025941587 is applied before Wa_16023105232, which has > + * higher priority; the two are not expected to conflict. > + */ > + if (XE_GT_WA(gt, 14025941587) && > + idledly < mincnt_idledly_ns) { > + idledly = mincnt_idledly_ns; > + wa_applied = true; > + } > + > + if (XE_GT_WA(gt, 16023105232) && > + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { > + /* maxcnt may be 0 if IDLE_WAIT_TIME is unprogrammed. */ > + idledly = maxcnt ? maxcnt - 1 : 0; > + clamped_below_maxcnt = true; > + wa_applied = true; > + /* inhibit_switch override to keep > + * semantics of Wa_16023105232 > + */ > + if (inhibit_switch) > + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; > + } > + > + if (wa_applied) { > + u32 idledly_ticks; > + > + /* > + * Wa_16023105232 requires idledly < maxcnt, so floor > + * that clamp; otherwise round up to guarantee the > + * Wa_14025941587 minimum survives tick quantization. > + */ > + if (clamped_below_maxcnt) > + idledly_ticks = DIV_ROUND_DOWN_ULL((u64)idledly * 1000, > + idledly_units_ps); > + else > + idledly_ticks = DIV_ROUND_UP_ULL((u64)idledly * 1000, > + idledly_units_ps); > + > + idledly_reg_val &= ~IDLE_DELAY; > + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, idledly_ticks); > + xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n", > + hwe->name, idledly, maxcnt, > + !!inhibit_switch, gt->info.timestamp_base); > + xe_mmio_write32(>->mmio, > + RING_IDLEDLY(hwe->mmio_base), > + idledly_reg_val); > } > } > } > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules > index dd69ad07f7a9..3001155f8d09 100644 > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules > @@ -72,3 +72,5 @@ > 16029897822 MEDIA_VERSION(3500) > GRAPHICS_VERSION(3510) > 14027054324 GRAPHICS_VERSION(3511) > +14025941587 GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf) > + MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf) ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms @ 2026-09-15 11:13 tilak.tirumalesh.tangudu 2026-09-15 11:13 ` [PATCH 2/2] " tilak.tirumalesh.tangudu 0 siblings, 1 reply; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-15 11:13 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> This series adds Wa_14025941587 (minimum IDLEDLY floor) for Xe2, Xe3 and Xe3p and hardens the shared adjust_idledly() helper it builds on. Patch 1 fixes three pre-existing corner cases in adjust_idledly() that can panic or misprogram RING_IDLEDLY. (timestamp_base == 0 divide-by-zero, IDLE_WAIT_TIME == 0 underflow, and u32 overflow in the tick<->ns conversions). Patch 2 applies Wa_14025941587 on top of the hardened helper. Patch1 v2: Avoid redundant warn for unknown crystal clock. Patch2 v8: Round up (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, so the tick-quantized delay cannot round back below 5 us. Tangudu Tilak Tirumalesh (2): drm/xe: harden adjust_idledly() against divide-by-zero and overflow drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 73 +++++++++++++++++++++++++----- drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + 3 files changed, 65 insertions(+), 12 deletions(-) -- 2.46.0 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-15 11:13 [PATCH 0/2] " tilak.tirumalesh.tangudu @ 2026-09-15 11:13 ` tilak.tirumalesh.tangudu 2026-09-15 11:25 ` sashiko-bot 0 siblings, 1 reply; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-15 11:13 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Avoid programming the IDLEDLY timer to less than 5 microseconds. Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media Versions 13.01 to 35.03 v2: Use xe_rtp_match_not_sriov_vf, move to local variable Remove warn and other knits - Matt R v3: Add verbose comment - Tejas v4: Restore IDLE_DLY register on engine reset. Add it to GUC save-restore list. -Vivek v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay v6: Avoid clearing inhibit switch - Bala Refactor code accordingly by adding idle_reg_val. v7: Rebased with the divide-by-zero/overflow guards living in a separate hardening patch. v8: Preserve the Wa_16023105232 floor (DIV_ROUND_DOWN_ULL) and the maxcnt == 0 guard from the hardening patch. Round up (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, so the tick-quantized delay cannot round back below 5 us. Assisted-by: GitHub_Copilot:claude-opus-4.8 Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> --- drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 69 ++++++++++++++++++++++++------ drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + 3 files changed, 60 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c index ff8eee3831aa..58a3f6293ce4 100644 --- a/drivers/gpu/drm/xe/xe_guc_ads.c +++ b/drivers/gpu/drm/xe/xe_guc_ads.c @@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads, } } - if (XE_GT_WA(hwe->gt, 16023105232)) + if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587)) guc_mmio_regset_write_one(ads, regset_map, RING_IDLEDLY(hwe->mmio_base), count++); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index e5e761c33fa6..a0c29aacbbfe 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -588,31 +588,76 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, static void adjust_idledly(struct xe_hw_engine *hwe) { struct xe_gt *gt = hwe->gt; - u32 idledly, maxcnt; + u32 idledly, idledly_reg_val, maxcnt; u32 idledly_units_ps = 8 * gt->info.timestamp_base; u32 maxcnt_units_ns = 640; - bool inhibit_switch = 0; + bool inhibit_switch = false; + bool wa_applied = false; + bool clamped_below_maxcnt = false; + + if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) || + XE_GT_WA(gt, 14025941587)) { + u32 mincnt_idledly_ns = 5000; - if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) { /* xe_gt_clock_init() warns and zeroes timestamp_base on unknown crystal clock. */ if (!idledly_units_ps) return; - idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); + idledly_reg_val = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); - inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; - idledly = REG_FIELD_GET(IDLE_DELAY, idledly); + inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED; + idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val); idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); maxcnt *= maxcnt_units_ns; - if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { - /* Floor below maxcnt; write 0 to still clear the inhibit bit. */ - idledly = maxcnt ? - DIV_ROUND_DOWN_ULL((u64)(maxcnt - 1) * 1000, - idledly_units_ps) : 0; - xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly); + /* + * Wa_14025941587 is applied before Wa_16023105232, which has + * higher priority; the two are not expected to conflict. + */ + if (XE_GT_WA(gt, 14025941587) && + idledly < mincnt_idledly_ns) { + idledly = mincnt_idledly_ns; + wa_applied = true; + } + + if (XE_GT_WA(gt, 16023105232) && + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { + /* maxcnt may be 0 if IDLE_WAIT_TIME is unprogrammed. */ + idledly = maxcnt ? maxcnt - 1 : 0; + clamped_below_maxcnt = true; + wa_applied = true; + /* inhibit_switch override to keep + * semantics of Wa_16023105232 + */ + if (inhibit_switch) + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; + } + + if (wa_applied) { + u32 idledly_ticks; + + /* + * Wa_16023105232 requires idledly < maxcnt, so floor + * that clamp; otherwise round up to guarantee the + * Wa_14025941587 minimum survives tick quantization. + */ + if (clamped_below_maxcnt) + idledly_ticks = DIV_ROUND_DOWN_ULL((u64)idledly * 1000, + idledly_units_ps); + else + idledly_ticks = DIV_ROUND_UP_ULL((u64)idledly * 1000, + idledly_units_ps); + + idledly_reg_val &= ~IDLE_DELAY; + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, idledly_ticks); + xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n", + hwe->name, idledly, maxcnt, + !!inhibit_switch, gt->info.timestamp_base); + xe_mmio_write32(>->mmio, + RING_IDLEDLY(hwe->mmio_base), + idledly_reg_val); } } } diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules index dd69ad07f7a9..3001155f8d09 100644 --- a/drivers/gpu/drm/xe/xe_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules @@ -72,3 +72,5 @@ 16029897822 MEDIA_VERSION(3500) GRAPHICS_VERSION(3510) 14027054324 GRAPHICS_VERSION(3511) +14025941587 GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf) + MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf) -- 2.46.0 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-15 11:13 ` [PATCH 2/2] " tilak.tirumalesh.tangudu @ 2026-09-15 11:25 ` sashiko-bot 2026-09-15 11:56 ` Tangudu, Tilak Tirumalesh 0 siblings, 1 reply; 17+ messages in thread From: sashiko-bot @ 2026-09-15 11:25 UTC (permalink / raw) To: tilak.tirumalesh.tangudu; +Cc: intel-xe Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] xe: tick quantization bypasses Wa_16023105232 upper bound check -- commit 0bd0a59b09bd7c0fa136c7d141c58df4e531535b Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms Avoid programming the IDLEDLY timer to less than 5 microseconds. Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media Versions 13.01 to 35.03 > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c > index e5e761c33fa68..a0c29aacbbfe1 100644 > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c [ ... ] > @@ -588,31 +588,76 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, > static void adjust_idledly(struct xe_hw_engine *hwe) > { [ ... ] > + if (XE_GT_WA(gt, 16023105232) && > + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { [Severity: Medium] Does this upper bound check fail to account for the subsequent tick quantization? If maxcnt is slightly larger than the 5000ns minimum (e.g., 5120ns), the idledly >= maxcnt check will evaluate to false and the value won't be clamped. > + /* maxcnt may be 0 if IDLE_WAIT_TIME is unprogrammed. */ > + idledly = maxcnt ? maxcnt - 1 : 0; > + clamped_below_maxcnt = true; > + wa_applied = true; > + /* inhibit_switch override to keep > + * semantics of Wa_16023105232 > + */ > + if (inhibit_switch) > + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; > + } > + > + if (wa_applied) { > + u32 idledly_ticks; > + > + /* > + * Wa_16023105232 requires idledly < maxcnt, so floor > + * that clamp; otherwise round up to guarantee the > + * Wa_14025941587 minimum survives tick quantization. > + */ > + if (clamped_below_maxcnt) > + idledly_ticks = DIV_ROUND_DOWN_ULL((u64)idledly * 1000, > + idledly_units_ps); > + else > + idledly_ticks = DIV_ROUND_UP_ULL((u64)idledly * 1000, > + idledly_units_ps); [Severity: Medium] Will this round-up push the programmed delay above maxcnt, silently violating Wa_16023105232? If the check above bypassed clamping (because 5000 < 5120), we take the else branch here. Using DIV_ROUND_UP_ULL, 5000ns can round up by an extra tick. For instance, on a 19.2MHz clock (416.66ns per tick), 5000ns rounds up to 13 ticks (5416ns). Since 5416ns > 5120ns, the programmed IDLE_DELAY will end up exceeding IDLE_WAIT_TIME in the hardware. > + > + idledly_reg_val &= ~IDLE_DELAY; > + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, idledly_ticks); -- Sashiko AI review · https://sashiko.dev/#/patchset/20260915111314.564847-1-tilak.tirumalesh.tangudu@intel.com?part=2 ^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-15 11:25 ` sashiko-bot @ 2026-09-15 11:56 ` Tangudu, Tilak Tirumalesh 0 siblings, 0 replies; 17+ messages in thread From: Tangudu, Tilak Tirumalesh @ 2026-09-15 11:56 UTC (permalink / raw) To: sashiko-reviews@lists.linux.dev; +Cc: intel-xe@lists.freedesktop.org > -----Original Message----- > From: sashiko-bot@kernel.org <sashiko-bot@kernel.org> > Sent: 15 September 2026 16:55 > To: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> > Cc: intel-xe@lists.freedesktop.org > Subject: Re: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p > platforms > > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) > to consider: > - [Medium] xe: tick quantization bypasses Wa_16023105232 upper bound > check > -- > > commit 0bd0a59b09bd7c0fa136c7d141c58df4e531535b > Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> > > drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms > > Avoid programming the IDLEDLY timer to less than 5 microseconds. > Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 > and Media Versions 13.01 to 35.03 > > > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c > > b/drivers/gpu/drm/xe/xe_hw_engine.c > > index e5e761c33fa68..a0c29aacbbfe1 100644 > > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c > [ ... ] > > @@ -588,31 +588,76 @@ static void hw_engine_init_early(struct xe_gt > > *gt, struct xe_hw_engine *hwe, static void adjust_idledly(struct > > xe_hw_engine *hwe) { > [ ... ] > > + if (XE_GT_WA(gt, 16023105232) && > > + xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) { > > [Severity: Medium] > Does this upper bound check fail to account for the subsequent tick > quantization? > > If maxcnt is slightly larger than the 5000ns minimum (e.g., 5120ns), the idledly > >= maxcnt check will evaluate to false and the value won't be clamped. The idledly >= maxcnt comparison is done in the nanosecond domain, and Wa_16023105232 is intentionally checked after the Wa_14025941587 minimum so it retains priority. The missed-clamp case only arises if IDLE_WAIT_TIME is configured within about one tick of the 5 µs floor — a configuration these platforms don't use, so it isn't reachable here > > > + /* maxcnt may be 0 if IDLE_WAIT_TIME is > unprogrammed. */ > > + idledly = maxcnt ? maxcnt - 1 : 0; > > + clamped_below_maxcnt = true; > > + wa_applied = true; > > + /* inhibit_switch override to keep > > + * semantics of Wa_16023105232 > > + */ > > + if (inhibit_switch) > > + idledly_reg_val &= > ~INHIBIT_SWITCH_UNTIL_PREEMPTED; > > + } > > + > > + if (wa_applied) { > > + u32 idledly_ticks; > > + > > + /* > > + * Wa_16023105232 requires idledly < maxcnt, so > floor > > + * that clamp; otherwise round up to guarantee the > > + * Wa_14025941587 minimum survives tick > quantization. > > + */ > > + if (clamped_below_maxcnt) > > + idledly_ticks = > DIV_ROUND_DOWN_ULL((u64)idledly * 1000, > > + > idledly_units_ps); > > + else > > + idledly_ticks = > DIV_ROUND_UP_ULL((u64)idledly * 1000, > > + > idledly_units_ps); > > [Severity: Medium] > Will this round-up push the programmed delay above maxcnt, silently > violating Wa_16023105232? > > If the check above bypassed clamping (because 5000 < 5120), we take the else > branch here. Using DIV_ROUND_UP_ULL, 5000ns can round up by an extra > tick. For instance, on a 19.2MHz clock (416.66ns per tick), 5000ns rounds up > to 13 ticks (5416ns). > > Since 5416ns > 5120ns, the programmed IDLE_DELAY will end up exceeding > IDLE_WAIT_TIME in the hardware. Right that DIV_ROUND_UP_ULL bumps 5000 ns to the next whole tick — the round-up is deliberate so the Wa_14025941587 5 µs minimum survives tick quantization rather than dropping below it. This can only exceed IDLE_WAIT_TIME if IDLE_WAIT_TIME itself sits within one tick of 5 µs, which is the same precondition as the previous comment and not a configuration these platforms use. So it can't violate Wa_16023105232 in practice. > > > + > > + idledly_reg_val &= ~IDLE_DELAY; > > + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, > idledly_ticks); > > -- > Sashiko AI review · https://sashiko.dev/#/patchset/20260915111314.564847- > 1-tilak.tirumalesh.tangudu@intel.com?part=2 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms @ 2026-09-16 10:05 tilak.tirumalesh.tangudu 2026-09-16 10:05 ` [PATCH 2/2] " tilak.tirumalesh.tangudu 0 siblings, 1 reply; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-16 10:05 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, shuicheng.lin, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> This series adds Wa_14025941587 (minimum IDLEDLY floor) for Xe2, Xe3 and Xe3p and hardens the shared adjust_idledly() helper it builds on. Patch 1 fixes three pre-existing corner cases in adjust_idledly() that can panic or misprogram RING_IDLEDLY. (timestamp_base == 0 divide-by-zero, IDLE_WAIT_TIME == 0 underflow, and u32 overflow in the tick<->ns conversions). Patch 2 applies Wa_14025941587 on top of the hardened helper. Patch1 v2: Avoid redundant warn for unknown crystal clock. Patch1 v3: Field-mask the RING_IDLEDLY write with REG_FIELD_PREP(IDLE_DELAY, ...) instead of writing the raw tick count, which could clobber INHIBIT_SWITCH_UNTIL_PREEMPTED and reserved bits. Split the inhibit-switch clear from the maxcnt clamp so a set inhibit bit no longer forces a needless delay overwrite when the delay itself is already valid. Use gt_to_xe(gt) instead of gt_to_xe(hwe->gt). Patch2 v8: Round up (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, so the tick-quantized delay cannot round back below 5 us. Patch2 v9: Evaluate the Wa_16023105232 xe_gt_WARN_ON() against the value read from hardware instead of the Wa_14025941587-bumped value, so it no longer fires on the driver's own floor. Re-check the rounded-up tick value against maxcnt and floor it if tick quantization pushed it back to/above maxcnt, logging via xe_gt_dbg since this is the driver's own value, not a hardware anomaly. Tangudu Tilak Tirumalesh (2): drm/xe: harden adjust_idledly() against divide-by-zero and overflow drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 96 ++++++++++++++++++++++++++---- drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + 3 files changed, 88 insertions(+), 12 deletions(-) -- 2.46.0 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-16 10:05 [PATCH 0/2] " tilak.tirumalesh.tangudu @ 2026-09-16 10:05 ` tilak.tirumalesh.tangudu 2026-09-21 22:58 ` Belgaumkar, Vinay 0 siblings, 1 reply; 17+ messages in thread From: tilak.tirumalesh.tangudu @ 2026-09-16 10:05 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, vinay.belgaumkar, shuicheng.lin, intel-xe From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Avoid programming the IDLEDLY timer to less than 5 microseconds. Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media Versions 13.01 to 35.03 v2: Use xe_rtp_match_not_sriov_vf, move to local variable Remove warn and other knits - Matt R v3: Add verbose comment - Tejas v4: Restore IDLE_DLY register on engine reset. Add it to GUC save-restore list. -Vivek v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay v6: Avoid clearing inhibit switch - Bala Refactor code accordingly by adding idle_reg_val. v7: Rebased with the divide-by-zero/overflow guards living in a separate hardening patch. v8: Preserve the Wa_16023105232 floor (DIV_ROUND_DOWN_ULL) and the maxcnt == 0 guard from the hardening patch. Round up (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, so the tick-quantized delay cannot round back below 5 us. v9: Evaluate the Wa_16023105232 xe_gt_WARN_ON() against the value read from hardware instead of the Wa_14025941587-bumped value, so it no longer fires on the driver's own floor. Re-check the rounded-up tick value against maxcnt and floor it if tick quantization pushed it back to/above maxcnt, logging via xe_gt_dbg since this is the driver's own value, not a hardware anomaly. Assisted-by: GitHub_Copilot:claude-opus-4.8 Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> --- drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 93 ++++++++++++++++++++++++------ drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + 3 files changed, 79 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c index ff8eee3831aa..58a3f6293ce4 100644 --- a/drivers/gpu/drm/xe/xe_guc_ads.c +++ b/drivers/gpu/drm/xe/xe_guc_ads.c @@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads, } } - if (XE_GT_WA(hwe->gt, 16023105232)) + if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587)) guc_mmio_regset_write_one(ads, regset_map, RING_IDLEDLY(hwe->mmio_base), count++); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index d868af8e3301..9680d2a5adec 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -585,44 +585,103 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, xe_reg_whitelist_process_engine(hwe); } +static u32 idledly_floor_ticks(u32 idledly_ns, u32 idledly_units_ps) +{ + return DIV_ROUND_DOWN_ULL((u64)idledly_ns * 1000, idledly_units_ps); +} + static void adjust_idledly(struct xe_hw_engine *hwe) { struct xe_gt *gt = hwe->gt; - u32 idledly, maxcnt; + u32 idledly, idledly_hw, idledly_reg_val, maxcnt; u32 idledly_units_ps = 8 * gt->info.timestamp_base; u32 maxcnt_units_ns = 640; - bool inhibit_switch = 0; + bool inhibit_switch = false; bool wa_applied = false; + bool clamped_below_maxcnt = false; + + if ((!IS_SRIOV_VF(gt_to_xe(gt)) && XE_GT_WA(gt, 16023105232)) || + XE_GT_WA(gt, 14025941587)) { + u32 mincnt_idledly_ns = 5000; - if (!IS_SRIOV_VF(gt_to_xe(gt)) && XE_GT_WA(gt, 16023105232)) { /* xe_gt_clock_init() warns and zeroes timestamp_base on unknown crystal clock. */ if (!idledly_units_ps) return; - idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); + idledly_reg_val = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); - inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; - idledly = REG_FIELD_GET(IDLE_DELAY, idledly); + inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED; + idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val); idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); + idledly_hw = idledly; maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); maxcnt *= maxcnt_units_ns; - /* Clear the inhibit switch without disturbing a valid delay. */ - if (inhibit_switch) + /* + * Wa_14025941587 is applied before Wa_16023105232, which takes + * priority if the two ever conflict (not expected in practice). + */ + if (XE_GT_WA(gt, 14025941587) && + idledly < mincnt_idledly_ns) { + idledly = mincnt_idledly_ns; wa_applied = true; + } - if (xe_gt_WARN_ON(gt, idledly >= maxcnt)) { - /* Floor below maxcnt; write 0 to still clear the inhibit bit. */ - idledly = maxcnt ? - DIV_ROUND_DOWN_ULL((u64)(maxcnt - 1) * 1000, - idledly_units_ps) : 0; - wa_applied = true; + if (XE_GT_WA(gt, 16023105232)) { + /* Clear the inhibit switch without disturbing a valid delay. */ + if (inhibit_switch) { + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; + wa_applied = true; + } + + /* Warn only on the value read from hardware. */ + xe_gt_WARN_ON(gt, idledly_hw >= maxcnt); + + if (idledly >= maxcnt) { + /* maxcnt may be 0 if IDLE_WAIT_TIME is unprogrammed. */ + idledly = maxcnt ? maxcnt - 1 : 0; + clamped_below_maxcnt = true; + wa_applied = true; + } } - if (wa_applied) - xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), - REG_FIELD_PREP(IDLE_DELAY, idledly)); + if (wa_applied) { + u32 idledly_ticks; + + /* + * Wa_16023105232 requires idledly < maxcnt, so floor + * that clamp; otherwise round up to guarantee the + * Wa_14025941587 minimum survives tick quantization. + */ + if (clamped_below_maxcnt) + idledly_ticks = idledly_floor_ticks(idledly, idledly_units_ps); + else + idledly_ticks = DIV_ROUND_UP_ULL((u64)idledly * 1000, + idledly_units_ps); + + /* + * Tick quantization can still push the rounded-up value + * to/above maxcnt; re-floor here so Wa_16023105232 keeps + * priority even in that case. + */ + if (!clamped_below_maxcnt && XE_GT_WA(gt, 16023105232) && + (u64)idledly_ticks * idledly_units_ps >= (u64)maxcnt * 1000) { + xe_gt_dbg(gt, "idledly %s: %u ticks would exceed maxcnt=%u, so flooring\n", + hwe->name, idledly_ticks, maxcnt); + idledly = maxcnt ? maxcnt - 1 : 0; + idledly_ticks = idledly_floor_ticks(idledly, idledly_units_ps); + } + + idledly_reg_val &= ~IDLE_DELAY; + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, idledly_ticks); + xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n", + hwe->name, idledly, maxcnt, + !!inhibit_switch, gt->info.timestamp_base); + xe_mmio_write32(>->mmio, + RING_IDLEDLY(hwe->mmio_base), + idledly_reg_val); + } } } diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules index dd69ad07f7a9..3001155f8d09 100644 --- a/drivers/gpu/drm/xe/xe_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules @@ -72,3 +72,5 @@ 16029897822 MEDIA_VERSION(3500) GRAPHICS_VERSION(3510) 14027054324 GRAPHICS_VERSION(3511) +14025941587 GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf) + MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf) -- 2.46.0 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms 2026-09-16 10:05 ` [PATCH 2/2] " tilak.tirumalesh.tangudu @ 2026-09-21 22:58 ` Belgaumkar, Vinay 0 siblings, 0 replies; 17+ messages in thread From: Belgaumkar, Vinay @ 2026-09-21 22:58 UTC (permalink / raw) To: tilak.tirumalesh.tangudu, shuicheng.lin, intel-xe On 9/16/2026 3:05 AM, tilak.tirumalesh.tangudu@intel.com wrote: > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> > > Avoid programming the IDLEDLY timer to less than 5 microseconds. > Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 > and Media Versions 13.01 to 35.03 > > v2: Use xe_rtp_match_not_sriov_vf, move to local variable > Remove warn and other knits - Matt R > > v3: Add verbose comment - Tejas > > v4: Restore IDLE_DLY register on engine reset. > Add it to GUC save-restore list. -Vivek > > v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay > > v6: Avoid clearing inhibit switch - Bala > Refactor code accordingly by adding idle_reg_val. > > v7: Rebased with the divide-by-zero/overflow guards living in > a separate hardening patch. > > v8: Preserve the Wa_16023105232 floor (DIV_ROUND_DOWN_ULL) and the > maxcnt == 0 guard from the hardening patch. Round up > (DIV_ROUND_UP_ULL) the Wa_14025941587 minimum conversion instead, > so the tick-quantized delay cannot round back below 5 us. > > v9: Evaluate the Wa_16023105232 xe_gt_WARN_ON() against the value > read from hardware instead of the Wa_14025941587-bumped value, > so it no longer fires on the driver's own floor. Re-check the > rounded-up tick value against maxcnt and floor it if tick > quantization pushed it back to/above maxcnt, logging via > xe_gt_dbg since this is the driver's own value, not a hardware > anomaly. LGTM, Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > Assisted-by: GitHub_Copilot:claude-opus-4.8 > Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> > --- > drivers/gpu/drm/xe/xe_guc_ads.c | 2 +- > drivers/gpu/drm/xe/xe_hw_engine.c | 93 ++++++++++++++++++++++++------ > drivers/gpu/drm/xe/xe_wa_oob.rules | 2 + > 3 files changed, 79 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c > index ff8eee3831aa..58a3f6293ce4 100644 > --- a/drivers/gpu/drm/xe/xe_guc_ads.c > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c > @@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads, > } > } > > - if (XE_GT_WA(hwe->gt, 16023105232)) > + if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587)) > guc_mmio_regset_write_one(ads, regset_map, > RING_IDLEDLY(hwe->mmio_base), > count++); > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c > index d868af8e3301..9680d2a5adec 100644 > --- a/drivers/gpu/drm/xe/xe_hw_engine.c > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c > @@ -585,44 +585,103 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, > xe_reg_whitelist_process_engine(hwe); > } > > +static u32 idledly_floor_ticks(u32 idledly_ns, u32 idledly_units_ps) > +{ > + return DIV_ROUND_DOWN_ULL((u64)idledly_ns * 1000, idledly_units_ps); > +} > + > static void adjust_idledly(struct xe_hw_engine *hwe) > { > struct xe_gt *gt = hwe->gt; > - u32 idledly, maxcnt; > + u32 idledly, idledly_hw, idledly_reg_val, maxcnt; > u32 idledly_units_ps = 8 * gt->info.timestamp_base; > u32 maxcnt_units_ns = 640; > - bool inhibit_switch = 0; > + bool inhibit_switch = false; > bool wa_applied = false; > + bool clamped_below_maxcnt = false; > + > + if ((!IS_SRIOV_VF(gt_to_xe(gt)) && XE_GT_WA(gt, 16023105232)) || > + XE_GT_WA(gt, 14025941587)) { > + u32 mincnt_idledly_ns = 5000; > > - if (!IS_SRIOV_VF(gt_to_xe(gt)) && XE_GT_WA(gt, 16023105232)) { > /* xe_gt_clock_init() warns and zeroes timestamp_base on unknown crystal clock. */ > if (!idledly_units_ps) > return; > > - idledly = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); > + idledly_reg_val = xe_mmio_read32(>->mmio, RING_IDLEDLY(hwe->mmio_base)); > maxcnt = xe_mmio_read32(>->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base)); > > - inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED; > - idledly = REG_FIELD_GET(IDLE_DELAY, idledly); > + inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED; > + idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val); > idledly = DIV_ROUND_CLOSEST_ULL((u64)idledly * idledly_units_ps, 1000); > + idledly_hw = idledly; > maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt); > maxcnt *= maxcnt_units_ns; > > - /* Clear the inhibit switch without disturbing a valid delay. */ > - if (inhibit_switch) > + /* > + * Wa_14025941587 is applied before Wa_16023105232, which takes > + * priority if the two ever conflict (not expected in practice). > + */ > + if (XE_GT_WA(gt, 14025941587) && > + idledly < mincnt_idledly_ns) { > + idledly = mincnt_idledly_ns; > wa_applied = true; > + } > > - if (xe_gt_WARN_ON(gt, idledly >= maxcnt)) { > - /* Floor below maxcnt; write 0 to still clear the inhibit bit. */ > - idledly = maxcnt ? > - DIV_ROUND_DOWN_ULL((u64)(maxcnt - 1) * 1000, > - idledly_units_ps) : 0; > - wa_applied = true; > + if (XE_GT_WA(gt, 16023105232)) { > + /* Clear the inhibit switch without disturbing a valid delay. */ > + if (inhibit_switch) { > + idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED; > + wa_applied = true; > + } > + > + /* Warn only on the value read from hardware. */ > + xe_gt_WARN_ON(gt, idledly_hw >= maxcnt); > + > + if (idledly >= maxcnt) { > + /* maxcnt may be 0 if IDLE_WAIT_TIME is unprogrammed. */ > + idledly = maxcnt ? maxcnt - 1 : 0; > + clamped_below_maxcnt = true; > + wa_applied = true; > + } > } > > - if (wa_applied) > - xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), > - REG_FIELD_PREP(IDLE_DELAY, idledly)); > + if (wa_applied) { > + u32 idledly_ticks; > + > + /* > + * Wa_16023105232 requires idledly < maxcnt, so floor > + * that clamp; otherwise round up to guarantee the > + * Wa_14025941587 minimum survives tick quantization. > + */ > + if (clamped_below_maxcnt) > + idledly_ticks = idledly_floor_ticks(idledly, idledly_units_ps); > + else > + idledly_ticks = DIV_ROUND_UP_ULL((u64)idledly * 1000, > + idledly_units_ps); > + > + /* > + * Tick quantization can still push the rounded-up value > + * to/above maxcnt; re-floor here so Wa_16023105232 keeps > + * priority even in that case. > + */ > + if (!clamped_below_maxcnt && XE_GT_WA(gt, 16023105232) && > + (u64)idledly_ticks * idledly_units_ps >= (u64)maxcnt * 1000) { > + xe_gt_dbg(gt, "idledly %s: %u ticks would exceed maxcnt=%u, so flooring\n", > + hwe->name, idledly_ticks, maxcnt); > + idledly = maxcnt ? maxcnt - 1 : 0; > + idledly_ticks = idledly_floor_ticks(idledly, idledly_units_ps); > + } > + > + idledly_reg_val &= ~IDLE_DELAY; > + idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY, idledly_ticks); > + xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n", > + hwe->name, idledly, maxcnt, > + !!inhibit_switch, gt->info.timestamp_base); > + xe_mmio_write32(>->mmio, > + RING_IDLEDLY(hwe->mmio_base), > + idledly_reg_val); > + } > } > } > > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules > index dd69ad07f7a9..3001155f8d09 100644 > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules > @@ -72,3 +72,5 @@ > 16029897822 MEDIA_VERSION(3500) > GRAPHICS_VERSION(3510) > 14027054324 GRAPHICS_VERSION(3511) > +14025941587 GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf) > + MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf) ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2026-09-21 22:59 UTC | newest] Thread overview: 17+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-09-09 7:25 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu 2026-09-09 7:25 ` [PATCH 1/2] drm/xe: harden adjust_idledly() against divide-by-zero and overflow tilak.tirumalesh.tangudu 2026-09-09 7:38 ` sashiko-bot 2026-09-09 7:25 ` [PATCH 2/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu 2026-09-09 7:39 ` sashiko-bot 2026-09-09 8:23 ` ✓ CI.KUnit: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev8) Patchwork 2026-09-09 9:33 ` ✓ Xe.CI.BAT: " Patchwork 2026-09-09 14:15 ` ✗ Xe.CI.FULL: failure " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2026-09-09 16:18 [PATCH 0/2] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms tilak.tirumalesh.tangudu 2026-09-09 16:18 ` [PATCH 2/2] " tilak.tirumalesh.tangudu 2026-09-09 16:33 ` sashiko-bot 2026-09-09 17:06 ` Tangudu, Tilak Tirumalesh 2026-09-11 21:32 ` Belgaumkar, Vinay 2026-09-15 11:13 [PATCH 0/2] " tilak.tirumalesh.tangudu 2026-09-15 11:13 ` [PATCH 2/2] " tilak.tirumalesh.tangudu 2026-09-15 11:25 ` sashiko-bot 2026-09-15 11:56 ` Tangudu, Tilak Tirumalesh 2026-09-16 10:05 [PATCH 0/2] " tilak.tirumalesh.tangudu 2026-09-16 10:05 ` [PATCH 2/2] " tilak.tirumalesh.tangudu 2026-09-21 22:58 ` Belgaumkar, Vinay
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