From: sashiko-bot@kernel.org
To: "Nicolin Chen" <nicolinc@nvidia.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr()
Date: Thu, 10 Sep 2026 23:35:58 +0000 [thread overview]
Message-ID: <20260910233558.A6CF41F000FF@smtp.kernel.org> (raw)
In-Reply-To: <cbe6e6f578af848f4efdd8d1050181032effae37.1789081084.git.nicolinc@nvidia.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Missing `cond_resched()` in the PRI queue polling loop, potentially causing soft lockups.
--
commit 3323ab058351966ce0deb549fa5694bcbf787b2e
Author: Nicolin Chen <nicolinc@nvidia.com>
iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr()
This commit converts PRIQ entries into iopf_faults for PRI-enabled masters
and reports them. It also discards PASID Stop Markers prior to fault
reporting and keeps the LAST-page DENY path for unknown StreamIDs.
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 43a6029cef430..c631c6344685d 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
[ ... ]
> @@ -2380,9 +2381,47 @@ static void arm_smmu_handle_ppr(struct arm_smmu_device *smmu, u64 *evt)
> last = FIELD_GET(PRIQ_0_PRG_LAST, evt[0]);
> grpid = FIELD_GET(PRIQ_1_PRG_IDX, evt[1]);
>
> - dev_info(smmu->dev, "unexpected PRI request received:\n");
> - dev_info(smmu->dev,
> - "\tsid 0x%08x.0x%05x: [%u%s] %sprivileged %s%s%s access at iova 0x%016llx\n",
> + /*
> + * A PASID Stop Marker (LRW = 0b100) does not expect a response and
> + * must be discarded before fault reporting: see the documentation
> + * at iommu_report_device_fault().
> + */
> + if (last && !(evt[0] & (PRIQ_0_PERM_READ | PRIQ_0_PERM_WRITE)))
> + return;
> +
> + mutex_lock(&smmu->streams_mutex);
[ ... ]
[Severity: High]
This is a pre-existing issue, but missing a cond_resched() inside the queue
draining loop could potentially cause soft lockups:
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c:arm_smmu_priq_thread() {
...
do {
while (!queue_remove_raw(q, evt))
arm_smmu_handle_ppr(smmu, evt);
if (queue_sync_prod_in(q) == -EOVERFLOW)
dev_err(smmu->dev, "PRIQ overflow detected -- requests lost\n");
} while (!queue_empty(llq));
...
}
Could a faulty or malicious PCI device flood the PRI queue with requests
faster than the CPU can consume them?
If the outer loop continuously polls the hardware producer index via
queue_sync_prod_in(), preventing queue_empty() from returning true, would
the host CPU get stuck in an infinite loop inside the IRQ thread?
Since arm_smmu_priq_thread() runs as a threaded IRQ handler, wouldn't this
starve other normal tasks on the CPU and lead to a soft lockup or RCU stall?
Does it make sense to include cond_resched() in this loop, similar to what
is done in arm_smmu_evtq_thread()?
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1789081084.git.nicolinc@nvidia.com?part=10
next prev parent reply other threads:[~2026-09-10 23:35 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-10 23:16 [PATCH v4 00/15] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-09-10 23:16 ` [PATCH v4 01/15] iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdown Nicolin Chen
2026-09-10 23:32 ` sashiko-bot
2026-09-11 0:14 ` Jonathan Cameron
2026-09-11 23:17 ` Nicolin Chen
2026-09-10 23:16 ` [PATCH v4 02/15] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-09-10 23:28 ` sashiko-bot
2026-09-11 0:14 ` Jonathan Cameron
2026-09-10 23:16 ` [PATCH v4 03/15] iommu/arm-smmu-v3: Add Q_POS() macro Nicolin Chen
2026-09-10 23:21 ` sashiko-bot
2026-09-10 23:16 ` [PATCH v4 04/15] iommu/arm-smmu-v3: Drain in-flight fault events on domain detach Nicolin Chen
2026-09-10 23:31 ` sashiko-bot
2026-09-11 0:14 ` Jonathan Cameron
2026-09-10 23:16 ` [PATCH v4 05/15] iommu/arm-smmu-v3: Flush in-flight fault work " Nicolin Chen
2026-09-10 23:35 ` sashiko-bot
2026-09-11 0:14 ` Jonathan Cameron
2026-09-10 23:16 ` [PATCH v4 06/15] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA Nicolin Chen
2026-09-10 23:28 ` sashiko-bot
2026-09-10 23:16 ` [PATCH v4 07/15] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-09-10 23:36 ` sashiko-bot
2026-09-10 23:17 ` [PATCH v4 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Nicolin Chen
2026-09-10 23:28 ` sashiko-bot
2026-09-10 23:17 ` [PATCH v4 09/15] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-09-10 23:36 ` sashiko-bot
2026-09-10 23:17 ` [PATCH v4 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-09-10 23:35 ` sashiko-bot [this message]
2026-09-11 0:14 ` Jonathan Cameron
2026-09-11 23:16 ` Nicolin Chen
2026-09-10 23:17 ` [PATCH v4 11/15] iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow Nicolin Chen
2026-09-10 23:33 ` sashiko-bot
2026-09-11 0:14 ` Jonathan Cameron
2026-09-10 23:17 ` [PATCH v4 12/15] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-09-10 23:31 ` sashiko-bot
2026-09-10 23:17 ` [PATCH v4 13/15] PCI/ATS: Add PRI stubs Nicolin Chen
2026-09-10 23:25 ` sashiko-bot
2026-09-10 23:17 ` [PATCH v4 14/15] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-09-10 23:28 ` sashiko-bot
2026-09-10 23:17 ` [PATCH v4 15/15] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
2026-09-10 23:36 ` sashiko-bot
2026-09-11 0:14 ` Jonathan Cameron
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