From: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>,
Rakesh Kota <rakesh.kota@oss.qualcomm.com>,
Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: [PATCH v6 1/4] arm64: dts: qcom: pm4125: Add VADC and temp alarm nodes
Date: Fri, 11 Sep 2026 22:10:39 +0530 [thread overview]
Message-ID: <20260911-shikra_adc_support-v6-1-e4b2da5cd55c@oss.qualcomm.com> (raw)
In-Reply-To: <20260911-shikra_adc_support-v6-0-e4b2da5cd55c@oss.qualcomm.com>
Add VADC node with some channels under it, for voltage and
temperature readings. Add temperature alarm node, used for
PMIC thermal mitigation.
Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/pm4125.dtsi | 104 +++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm4125.dtsi b/arch/arm64/boot/dts/qcom/pm4125.dtsi
index 3dc8d667d091..77de9db8c119 100644
--- a/arch/arm64/boot/dts/qcom/pm4125.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm4125.dtsi
@@ -8,6 +8,35 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
+/ {
+ thermal-zones {
+ pm4125-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&pm4125_tz>;
+
+ trips {
+ pm4125_trip0: trip0 {
+ temperature = <105000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ pm4125_trip1: trip1 {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ pm4125_trip2: trip2 {
+ temperature = <155000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+};
+
&spmi_bus {
pmic@0 {
compatible = "qcom,pm2250", "qcom,spmi-pmic";
@@ -65,6 +94,81 @@ pm4125_typec: typec@1500 {
status = "disabled";
};
+ pm4125_tz: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400>;
+ interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+ io-channels = <&pm4125_adc ADC5_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pm4125_adc: adc@3100 {
+ compatible = "qcom,spmi-adc5";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+ /* Channel nodes */
+ channel@0 {
+ reg = <ADC5_REF_GND>;
+ label = "ref_gnd";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@1 {
+ reg = <ADC5_1P25VREF>;
+ label = "vref_1p25";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@6 {
+ reg = <ADC5_DIE_TEMP>;
+ label = "die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@7 {
+ reg = <ADC5_USB_IN_I>;
+ label = "usb_in_i_uv";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@8 {
+ reg = <ADC5_USB_IN_V_16>;
+ label = "usb_in_v_div_16";
+ qcom,pre-scaling = <1 16>;
+ };
+
+ channel@9 {
+ reg = <ADC5_CHG_TEMP>;
+ label = "chg_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@4b {
+ reg = <ADC5_BAT_ID_100K_PU>;
+ label = "bat_id";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@83 {
+ reg = <ADC5_VPH_PWR>;
+ label = "vph_pwr";
+ qcom,pre-scaling = <1 3>;
+ };
+
+ channel@84 {
+ reg = <ADC5_VBAT_SNS>;
+ label = "vbat_sns";
+ qcom,pre-scaling = <1 3>;
+ };
+ };
+
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>, <0x6100>;
--
2.43.0
next prev parent reply other threads:[~2026-09-11 16:41 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-11 16:40 [PATCH v6 0/4] arm64: dts: qcom: Add PMIC thermal support for Shikra platforms Jishnu Prakash
2026-09-11 16:40 ` Jishnu Prakash [this message]
2026-09-12 15:35 ` [PATCH v6 1/4] arm64: dts: qcom: pm4125: Add VADC and temp alarm nodes Abel Vesa
2026-09-11 16:40 ` [PATCH v6 2/4] arm64: dts: qcom: pm8005: Add temp alarm node Jishnu Prakash
2026-09-11 16:51 ` sashiko-bot
2026-09-12 15:35 ` Abel Vesa
2026-09-11 16:40 ` [PATCH v6 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform Jishnu Prakash
2026-09-11 16:51 ` sashiko-bot
2026-09-12 15:36 ` Abel Vesa
2026-09-11 16:40 ` [PATCH v6 4/4] arm64: dts: qcom: Add PMIC thermal support for Shikra IQ2390S " Jishnu Prakash
2026-09-11 16:49 ` sashiko-bot
2026-09-12 15:36 ` Abel Vesa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260911-shikra_adc_support-v6-1-e4b2da5cd55c@oss.qualcomm.com \
--to=jishnu.prakash@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kamal.wadhwa@oss.qualcomm.com \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=rakesh.kota@oss.qualcomm.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.