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* [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig
  2026-09-02 10:45 [PATCH 0/2] arm: sunplus: add SP7021 LTPP3G2 board support Andrew Gaylard
@ 2026-09-02 10:45 ` Andrew Gaylard
  2026-09-02 11:00   ` sashiko-bot
  0 siblings, 1 reply; 4+ messages in thread
From: Andrew Gaylard @ 2026-09-02 10:45 UTC (permalink / raw)
  To: qinjian, linux-arm-kernel
  Cc: robh, krzk+dt, conor+dt, linux, devicetree, Andrew Gaylard

Add a device tree source for the Tibbo LTPP3G2 board based on the
SP7021 SoC. The board features a quad-core ARM Cortex-A7 processor,
4GB eMMC, 10/100 Ethernet via the L2SW switch, and a PWM-controlled
LED.

Enable CONFIG_ARM_ERRATA_814220 to work around a known Cortex-A7 r0p5
erratum.

Enable CGROUP and SECURITY so that the shipped rootfs will boot.

Signed-off-by: Andrew Gaylard <ag@ffroot.co.za>
---
 arch/arm/boot/dts/sunplus/Makefile            |   5 +-
 .../dts/sunplus/sunplus-sp7021-ltpp3g2.dts    | 301 ++++++++++++++++++
 arch/arm/configs/sp7021_defconfig             |  30 ++
 3 files changed, 333 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/boot/dts/sunplus/sunplus-sp7021-ltpp3g2.dts

diff --git a/arch/arm/boot/dts/sunplus/Makefile b/arch/arm/boot/dts/sunplus/Makefile
index 868f2ea0c127..25ba2e530c35 100644
--- a/arch/arm/boot/dts/sunplus/Makefile
+++ b/arch/arm/boot/dts/sunplus/Makefile
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_SOC_SP7021) += \
-	sunplus-sp7021-demo-v3.dtb
-dtb-$(CONFIG_SOC_SP7021) += \
-	sunplus-sp7021-demo-v3.dtb
+	sunplus-sp7021-demo-v3.dtb \
+	sunplus-sp7021-ltpp3g2.dtb
diff --git a/arch/arm/boot/dts/sunplus/sunplus-sp7021-ltpp3g2.dts b/arch/arm/boot/dts/sunplus/sunplus-sp7021-ltpp3g2.dts
new file mode 100644
index 000000000000..c42e6f779ce3
--- /dev/null
+++ b/arch/arm/boot/dts/sunplus/sunplus-sp7021-ltpp3g2.dts
@@ -0,0 +1,301 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for Tibbo LTPP board G2
+ *
+ * Copyright (C) 2021 Sunplus Technology Co.
+ */
+
+/dts-v1/;
+
+#include "sunplus-sp7021-achip.dtsi"
+
+/ {
+	compatible = "tibbo,ltpp3g2", "sunplus,sp7021";
+	model = "Tibbo LTPP3G2";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		bootargs = "console=ttySUP0,115200 earlycon root=/dev/mmcblk0p8 rootwait";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512MB */
+	};
+
+	led {
+		compatible = "gpio-leds";
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&gpio_leds_pins>;
+		pinctrl-1 = <&leds_s0_slp>;
+		system-led {
+			label = "system-led";
+			gpios = <&pctl 6 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			linux,default-trigger = "heartbeat";
+		};
+		led@2 {
+			label = "SG";
+			gpios = <&pctl 7 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			default-state = "off";
+		};
+	};
+
+	i2c_tps: i2c-tps { /* eeprom */
+		compatible = "i2c-gpio";
+		i2c-gpio,scl-open-drain;
+		i2c-gpio,sda-open-drain;
+		i2c-gpio,delay-us = <1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pins_i2ctps>;
+		gpios = <&pctl 2 GPIO_ACTIVE_HIGH  /* SDA */
+			 &pctl 1 GPIO_ACTIVE_HIGH  /* SCL */
+			>;
+		eeprom: eeprom@50 {
+			compatible = "at,24c16";
+			reg = <0x50>;
+			pagesize = <16>;
+		};
+	};
+};
+
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_pwm>;
+	status = "okay";
+};
+
+&spi_controller0 {
+	spi-cpha;
+	spi-cpol;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi0>;
+	status = "disabled";
+};
+
+&spi_controller1 {
+	spi-cpha;
+	spi-cpol;
+	status = "disabled";
+};
+
+&spi_controller2 {
+	spi-cpha;
+	spi-cpol;
+	status = "disabled";
+};
+
+&spi_controller3 {
+	spi-slave;
+	status = "disabled";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_uart1>;
+	status = "disabled";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_uart2>;
+	status = "disabled";
+};
+
+&uart3 {
+	status = "disabled";
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_btuart &pins_bt_reset>;
+	status = "disabled";
+};
+
+&l2sw {
+	pinctrl-names = "default";
+	pinctrl-0 = <&l2sw_ltpp3g2_pins>;
+	status = "okay";
+
+	ethernet-ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			phy-handle = <&eth_phy0>;
+			phy-mode = "rmii";
+			nvmem-cells = <&mac_addr0>;
+			nvmem-cell-names = "mac-address";
+		};
+
+		port@1 {
+			reg = <1>;
+			phy-handle = <&eth_phy1>;
+			phy-mode = "rmii";
+			nvmem-cells = <&mac_addr1>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		eth_phy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+		eth_phy1: ethernet-phy@1 {
+			reg = <1>;
+		};
+	};
+};
+
+
+&mmc0 {
+	status = "okay";
+};
+
+&rtc {
+	charging-mode = <0xE>;
+	/*
+	 *      0xE     Disable
+	 *      0x1     0.86mA (2K Ohm with diode)
+	 *      0x5     1.81mA (250 Ohm with diode)
+	 *      0x9     2.07mA (50 Ohm with diode)
+	 *      0xD     16.0mA (0 Ohm with diode)
+	 *      0x3     1.36mA (2K Ohm without diode)
+	 *      0x7     3.99mA (250 Ohm without diode)
+	 *      0xB     4.41mA (50 Ohm without diode)
+	 *      0xF     16.0mA (0 Ohm without diode)
+	 */
+};
+
+&pctl {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_gpio_nobinded>;
+
+	pins_pwm: pinmux_pwm-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(48, SPPCTL_PCTL_G_PMUX, MUXF_PWM0, 0)
+		>;
+	};
+
+	pins_gpio_nobinded: pinmux_gpio_nobinded-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(30, SPPCTL_PCTL_G_GPIO, 0, 0)   /* was L2SW_LED_FLASH1 */
+			SPPCTL_IOPAD(39, SPPCTL_PCTL_G_GPIO, 0, 0)   /* was L2SW_LED_ON1  */
+		>;
+	};
+
+	pins_i2ctps: pinmux_i2ctps-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(1, SPPCTL_PCTL_G_GPIO, 0,
+				     SPPCTL_PCTL_L_OUT | SPPCTL_PCTL_L_ONV | SPPCTL_PCTL_L_ODR)
+			SPPCTL_IOPAD(2, SPPCTL_PCTL_G_GPIO, 0,
+				     SPPCTL_PCTL_L_OUT | SPPCTL_PCTL_L_ONV | SPPCTL_PCTL_L_ODR)
+		>;
+	};
+
+	l2sw_ltpp3g2_pins: pinmux_l2sw_ltpp3g2-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(63, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_CLK_OUT, 0)
+			SPPCTL_IOPAD(71, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_MAC_SMI_MDC, 0)
+			SPPCTL_IOPAD(64, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_MAC_SMI_MDIO, 0)
+			SPPCTL_IOPAD(62, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P0_MAC_RMII_TXEN, 0)
+			SPPCTL_IOPAD(61, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P0_MAC_RMII_TXD0, 0)
+			SPPCTL_IOPAD(60, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P0_MAC_RMII_TXD1, 0)
+			SPPCTL_IOPAD(59, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P0_MAC_RMII_CRSDV, 0)
+			SPPCTL_IOPAD(58, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P0_MAC_RMII_RXD0, 0)
+			SPPCTL_IOPAD(57, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P0_MAC_RMII_RXD1, 0)
+			SPPCTL_IOPAD(55, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P1_MAC_RMII_TXEN, 0)
+			SPPCTL_IOPAD(54, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P1_MAC_RMII_TXD0, 0)
+			SPPCTL_IOPAD(53, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P1_MAC_RMII_TXD1, 0)
+			SPPCTL_IOPAD(52, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P1_MAC_RMII_CRSDV, 0)
+			SPPCTL_IOPAD(51, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P1_MAC_RMII_RXD0, 0)
+			SPPCTL_IOPAD(50, SPPCTL_PCTL_G_PMUX, MUXF_L2SW_P1_MAC_RMII_RXD1, 0)
+		>;
+		sunplus,zerofunc = <
+			MUXF_L2SW_LED_FLASH0
+			MUXF_L2SW_LED_ON0
+			MUXF_L2SW_LED_FLASH1
+			MUXF_L2SW_LED_ON1
+			MUXF_DAISY_MODE
+			MUXF_L2SW_P0_MAC_RMII_RXER
+			MUXF_L2SW_P1_MAC_RMII_RXER
+			GROP_SPI_FLASH
+		>;
+	};
+
+	gpio_leds_pins: pinmux_gpio_leds-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(6, SPPCTL_PCTL_G_GPIO, 0, SPPCTL_PCTL_L_OUT)
+			SPPCTL_IOPAD(7, SPPCTL_PCTL_G_GPIO, 0, SPPCTL_PCTL_L_OUT)
+		>;
+	};
+
+	leds_s0_slp: pinmux_user_leds_s0_slp-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(6, SPPCTL_PCTL_G_GPIO, 0, 0)
+			SPPCTL_IOPAD(7, SPPCTL_PCTL_G_GPIO, 0, 0)
+		>;
+	};
+
+	pins_uart1: pinmux_uart1-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(8, SPPCTL_PCTL_G_PMUX, MUXF_UA1_TX, 0)
+			SPPCTL_IOPAD(9, SPPCTL_PCTL_G_PMUX, MUXF_UA1_RX, 0)
+			SPPCTL_IOPAD(10, SPPCTL_PCTL_G_PMUX, MUXF_UA1_RTS, 0)
+			SPPCTL_IOPAD(11, SPPCTL_PCTL_G_PMUX, MUXF_UA1_CTS, 0)
+		>;
+	};
+
+	pins_uart2: pinmux_uart2-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(12, SPPCTL_PCTL_G_PMUX, MUXF_UA2_TX, 0)
+			SPPCTL_IOPAD(13, SPPCTL_PCTL_G_PMUX, MUXF_UA2_RX, 0)
+			SPPCTL_IOPAD(14, SPPCTL_PCTL_G_PMUX, MUXF_UA2_RTS, 0)
+			SPPCTL_IOPAD(15, SPPCTL_PCTL_G_PMUX, MUXF_UA2_CTS, 0)
+		>;
+	};
+
+	pins_uart3: pinmux_uart3-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(16, SPPCTL_PCTL_G_PMUX, MUXF_UA3_TX, 0)
+			SPPCTL_IOPAD(17, SPPCTL_PCTL_G_PMUX, MUXF_UA3_RX, 0)
+			SPPCTL_IOPAD(18, SPPCTL_PCTL_G_PMUX, MUXF_UA3_RTS, 0)
+			SPPCTL_IOPAD(19, SPPCTL_PCTL_G_PMUX, MUXF_UA3_CTS, 0)
+		>;
+	};
+
+	/* AP6256 Bluetooth */
+	pins_btuart: pinmux_btuart-pins {
+		sunplus,pins = <
+			SPPCTL_IOPAD(40, SPPCTL_PCTL_G_PMUX, MUXF_UA4_RX, 0)
+			SPPCTL_IOPAD(41, SPPCTL_PCTL_G_PMUX, MUXF_UA4_TX, 0)
+			SPPCTL_IOPAD(56, SPPCTL_PCTL_G_PMUX, MUXF_UA4_RTS, SPPCTL_PCTL_L_ONV)
+			SPPCTL_IOPAD(49, SPPCTL_PCTL_G_PMUX, MUXF_UA4_CTS, 0)
+		>;
+	};
+
+	pins_bt_reset: pinmux_bt_reset-pins {
+		sunplus,pins = < SPPCTL_IOPAD(82, SPPCTL_PCTL_G_GPIO, 0, 0) >;
+	};
+
+	pins_spi0: pinmux_spi0-pins {
+		sunplus,pins = <
+			/*SPPCTL_IOPAD(26, SPPCTL_PCTL_G_PMUX, MUXF_SPI0S_EN, 0) */
+			/*SPPCTL_IOPAD(23, SPPCTL_PCTL_G_PMUX, MUXF_SPI0S_DO, 0) */
+			/*SPPCTL_IOPAD(25, SPPCTL_PCTL_G_PMUX, MUXF_SPI0S_DI, 0) */
+			/*SPPCTL_IOPAD(27, SPPCTL_PCTL_G_PMUX, MUXF_SPI0S_CLK, 0) */
+		>;
+	};
+
+};
diff --git a/arch/arm/configs/sp7021_defconfig b/arch/arm/configs/sp7021_defconfig
index ec723401b440..e0c0692f455d 100644
--- a/arch/arm/configs/sp7021_defconfig
+++ b/arch/arm/configs/sp7021_defconfig
@@ -1,4 +1,7 @@
 CONFIG_SYSVIPC=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_MEMCG=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
@@ -16,6 +19,7 @@ CONFIG_PERF_EVENTS=y
 CONFIG_ARCH_SUNPLUS=y
 # CONFIG_VDSO is not set
 CONFIG_SMP=y
+CONFIG_ARM_ERRATA_814220=y
 CONFIG_THUMB2_KERNEL=y
 CONFIG_ARCH_FORCE_MAX_ORDER=11
 CONFIG_VFP=y
@@ -24,11 +28,16 @@ CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
 CONFIG_UEVENT_HELPER=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_BLK_DEV_LOOP=y
+CONFIG_NETDEVICES=y
+CONFIG_SP7021_EMAC=y
 CONFIG_INPUT_SPARSEKMAP=y
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
@@ -36,6 +45,25 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_HWMON is not set
+CONFIG_SPI=y
+CONFIG_SPI_SUNPLUS_SP7021=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_EEPROM_AT24=y
+CONFIG_MMC=y
+CONFIG_MMC_SUNPLUS=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_SYSFS=y
+CONFIG_SUNPLUS_WATCHDOG=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_SUNPLUS=y
+CONFIG_NVMEM=y
+CONFIG_NVMEM_SUNPLUS_OCOTP=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_RESET_CONTROLLER=y
 CONFIG_EXT4_FS=y
@@ -51,6 +79,8 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ASCII=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_UTF8=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DYNAMIC_DEBUG=y
 CONFIG_MAGIC_SYSRQ=y
-- 
2.53.0



^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig
  2026-09-02 10:45 ` [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig Andrew Gaylard
@ 2026-09-02 11:00   ` sashiko-bot
  0 siblings, 0 replies; 4+ messages in thread
From: sashiko-bot @ 2026-09-02 11:00 UTC (permalink / raw)
  To: Andrew Gaylard; +Cc: robh, conor+dt, devicetree

Thank you for your contribution! Sashiko AI review found 7 potential issue(s) to consider:
- [Medium] The `rtc` node uses a non-existent `charging-mode` property that is unsupported by the driver and violates device tree bindings.
- [Medium] The EEPROM node uses an invalid compatible string `at,24c16` instead of `atmel,24c16`.
- [Medium] The `CONFIG_I2C_GPIO` option is not enabled in `sp7021_defconfig`, which is required for the `i2c_tps` bus to function.
- [Medium] The board DTS creates a new root `led` node rather than overriding the SoC's `&leds` node, leading to duplicate `gpio-leds` instances.
- [Low] Invalid properties `spi-cpha` and `spi-cpol` applied directly to SPI controller nodes.
- [Low] The `i2c_tps` node uses deprecated properties `gpios`, `i2c-gpio,scl-open-drain`, and `i2c-gpio,sda-open-drain`, violating the `i2c-gpio` schema.
- [Low] The `led@2` node uses a unit address in its name but lacks a `reg` property.
--

commit 21c4fb2cd185ac71c6b0d8d79e82b451794aa5c2
Author: Andrew Gaylard <ag@ffroot.co.za>

arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig

This commit adds a device tree source for the Tibbo LTPP3G2 board based on
the SP7021 SoC. It includes node configurations for various peripherals like
I2C, SPI, RTC, and Ethernet. It also updates the defconfig to enable the
necessary options for the board to boot correctly.

> diff --git a/arch/arm/boot/dts/sunplus/sunplus-sp7021-ltpp3g2.dts b/arch/arm/boot/dts/sunplus/sunplus-sp7021-ltpp3g2.dts
> new file mode 100644
> index 0000000000000..c42e6f779ce36
> --- /dev/null
> +++ b/arch/arm/boot/dts/sunplus/sunplus-sp7021-ltpp3g2.dts
> @@ -0,0 +1,301 @@

[ ... ]

> +	led {
> +		compatible = "gpio-leds";

[Severity: Medium]
Does creating a new root "led" node here rather than overriding the SoC's
existing "&leds" node from sunplus-sp7021.dtsi create duplicate gpio-leds
instances? This could result in an led subsystem sysfs naming conflict and
potential issues with the SoC's default floating pin mapping, since both
nodes contain a "system-led" subnode.

> +		pinctrl-names = "default", "sleep";
> +		pinctrl-0 = <&gpio_leds_pins>;
> +		pinctrl-1 = <&leds_s0_slp>;
> +		system-led {
> +			label = "system-led";
> +			gpios = <&pctl 6 GPIO_ACTIVE_HIGH>;
> +			default-state = "off";
> +			linux,default-trigger = "heartbeat";
> +		};
> +		led@2 {

[Severity: Low]
Does this node violate the Devicetree Specification by including a unit
address ("@2") without a corresponding "reg" property? This will trigger a
unit_address_vs_reg compiler warning.

> +			label = "SG";
> +			gpios = <&pctl 7 GPIO_ACTIVE_HIGH>;
> +			linux,default-trigger = "heartbeat";
> +			default-state = "off";
> +		};
> +	};
> +
> +	i2c_tps: i2c-tps { /* eeprom */
> +		compatible = "i2c-gpio";
> +		i2c-gpio,scl-open-drain;
> +		i2c-gpio,sda-open-drain;
> +		i2c-gpio,delay-us = <1>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pins_i2ctps>;
> +		gpios = <&pctl 2 GPIO_ACTIVE_HIGH  /* SDA */
> +			 &pctl 1 GPIO_ACTIVE_HIGH  /* SCL */
> +			>;

[Severity: Low]
Is this node using deprecated properties for the i2c-gpio binding? The
schema requires "sda-gpios" and "scl-gpios", whereas using "gpios" alongside
the boolean open-drain flags triggers dtbs_check validation errors.

> +		eeprom: eeprom@50 {
> +			compatible = "at,24c16";

[Severity: Medium]
Is "at,24c16" an invalid compatible string for the Atmel EEPROM? The correct
vendor prefix for Atmel is "atmel". Using this non-existent string could
prevent the at24 EEPROM driver from matching and probing, making the device
inaccessible.

> +			reg = <0x50>;
> +			pagesize = <16>;
> +		};
> +	};
> +};

[ ... ]

> +&spi_controller0 {
> +	spi-cpha;
> +	spi-cpol;

[Severity: Low]
Are these slave-specific flags incorrectly placed on the master controller
node instead of the peripheral nodes? While the SPI controller driver ignores
them on the controller node, this violates device tree schemas and causes
dtbs_check validation errors.

> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pins_spi0>;
> +	status = "disabled";
> +};
> +
> +&spi_controller1 {
> +	spi-cpha;
> +	spi-cpol;

[Severity: Low]
Are these slave-specific flags also incorrectly placed on this master
controller node?

> +	status = "disabled";
> +};
> +
> +&spi_controller2 {
> +	spi-cpha;
> +	spi-cpol;

[Severity: Low]
Are these slave-specific flags also incorrectly placed on this master
controller node?

> +	status = "disabled";
> +};

[ ... ]

> +&rtc {
> +	charging-mode = <0xE>;

[Severity: Medium]
Is "charging-mode" a non-existent legacy property? This violates the schema
and is unsupported by the driver, silently failing to configure the battery
trickle charger hardware, which could prevent the RTC battery from charging.

> +	/*
> +	 *      0xE     Disable
> +	 *      0x1     0.86mA (2K Ohm with diode)
> +	 *      0x5     1.81mA (250 Ohm with diode)

[ ... ]

> diff --git a/arch/arm/configs/sp7021_defconfig b/arch/arm/configs/sp7021_defconfig
> index ec723401b4405..e0c0692f455de 100644
> --- a/arch/arm/configs/sp7021_defconfig
> +++ b/arch/arm/configs/sp7021_defconfig

[ ... ]

> @@ -36,6 +45,25 @@ CONFIG_INPUT_EVDEV=y
>  # CONFIG_LEGACY_PTYS is not set
>  # CONFIG_HW_RANDOM is not set
>  # CONFIG_HWMON is not set
> +CONFIG_SPI=y
> +CONFIG_SPI_SUNPLUS_SP7021=y
> +CONFIG_I2C=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_EEPROM_AT24=y

[Severity: Medium]
Is CONFIG_I2C_GPIO missing from this configuration? Since the board adds an
EEPROM on the i2c_tps bus using the "i2c-gpio" compatible, failing to enable
CONFIG_I2C_GPIO (which is a tristate and not selected by default) will
prevent the bus from probing and break access to the EEPROM.

> +CONFIG_MMC=y
> +CONFIG_MMC_SUNPLUS=y

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902104545.67794-1-ag@ffroot.co.za?part=2

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig
@ 2026-09-10 22:58 kernel test robot
  0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2026-09-10 22:58 UTC (permalink / raw)
  To: oe-kbuild; +Cc: lkp

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20260902104545.67794-3-ag@ffroot.co.za>
References: <20260902104545.67794-3-ag@ffroot.co.za>
TO: Andrew Gaylard <ag@ffroot.co.za>
TO: qinjian@cqplus1.com
TO: linux-arm-kernel@lists.infradead.org
CC: robh@kernel.org
CC: krzk+dt@kernel.org
CC: conor+dt@kernel.org
CC: linux@armlinux.org.uk
CC: devicetree@vger.kernel.org
CC: Andrew Gaylard <ag@ffroot.co.za>

Hi Andrew,

kernel test robot noticed the following build warnings:

[auto build test WARNING on robh/for-next]
[also build test WARNING on arm/for-next arm/fixes arm64/for-next/core clk/clk-next kvmarm/next rockchip/for-next soc/for-next linus/master shawnguo/for-next v7.3-rc2 next-20260909]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Andrew-Gaylard/arm-dts-sunplus-add-peripheral-device-nodes-to-sp7021-dtsi/20260902-124544
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20260902104545.67794-3-ag%40ffroot.co.za
patch subject: [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig
:::::: branch date: 9 days ago
:::::: commit date: 9 days ago
config: arm-randconfig-2053-20260907 (https://download.01.org/0day-ci/archive/20260911/202609110010.imLkdJ1s-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
dtschema: 2026.7.dev16+g39602f98e
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260911/202609110010.imLkdJ1s-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202609110010.imLkdJ1s-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   arch/arm/boot/dts/sunplus/sunplus-sp7021-demo-v3.dtb: otp@af00 (sunplus,sp7021-ocotp): Unevaluated properties are not allowed ('resets' was unexpected)
   	from schema $id: http://devicetree.org/schemas/nvmem/sunplus,sp7021-ocotp.yaml
>> arch/arm/boot/dts/sunplus/sunplus-sp7021-demo-v3.dtb: ethernet@108000 (sunplus,sp7021-emac): 'clock-names' does not match any of the regexes: '^pinctrl-[0-9]+$'
   	from schema $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml
>> arch/arm/boot/dts/sunplus/sunplus-sp7021-demo-v3.dtb: ethernet@108000 (sunplus,sp7021-emac): clocks: [[4, 61], [4, 67], [4, 66], [4, 68]] is too long
   	from schema $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig
@ 2026-09-12  4:35 kernel test robot
  0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2026-09-12  4:35 UTC (permalink / raw)
  To: oe-kbuild; +Cc: lkp

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20260902104545.67794-3-ag@ffroot.co.za>
References: <20260902104545.67794-3-ag@ffroot.co.za>
TO: Andrew Gaylard <ag@ffroot.co.za>
TO: qinjian@cqplus1.com
TO: linux-arm-kernel@lists.infradead.org
CC: robh@kernel.org
CC: krzk+dt@kernel.org
CC: conor+dt@kernel.org
CC: linux@armlinux.org.uk
CC: devicetree@vger.kernel.org
CC: Andrew Gaylard <ag@ffroot.co.za>

Hi Andrew,

kernel test robot noticed the following build warnings:

[auto build test WARNING on robh/for-next]
[also build test WARNING on arm/for-next arm/fixes arm64/for-next/core clk/clk-next kvmarm/next rockchip/for-next soc/for-next linus/master shawnguo/for-next v7.3-rc2 next-20260910]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Andrew-Gaylard/arm-dts-sunplus-add-peripheral-device-nodes-to-sp7021-dtsi/20260902-124544
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20260902104545.67794-3-ag%40ffroot.co.za
patch subject: [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig
:::::: branch date: 10 days ago
:::::: commit date: 10 days ago
config: arm-randconfig-2053-20260907 (https://download.01.org/0day-ci/archive/20260912/202609120633.W13Gq8MD-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
dtschema: 2026.7.dev16+g39602f98e
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260912/202609120633.W13Gq8MD-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202609120633.W13Gq8MD-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   arch/arm/boot/dts/sunplus/sunplus-sp7021-demo-v3.dtb: otp@af00 (sunplus,sp7021-ocotp): Unevaluated properties are not allowed ('resets' was unexpected)
   	from schema $id: http://devicetree.org/schemas/nvmem/sunplus,sp7021-ocotp.yaml
>> arch/arm/boot/dts/sunplus/sunplus-sp7021-demo-v3.dtb: ethernet@108000 (sunplus,sp7021-emac): 'clock-names' does not match any of the regexes: '^pinctrl-[0-9]+$'
   	from schema $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml
>> arch/arm/boot/dts/sunplus/sunplus-sp7021-demo-v3.dtb: ethernet@108000 (sunplus,sp7021-emac): clocks: [[4, 61], [4, 67], [4, 66], [4, 68]] is too long
   	from schema $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-09-12  4:35 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-09-10 22:58 [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig kernel test robot
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2026-09-12  4:35 kernel test robot
2026-09-02 10:45 [PATCH 0/2] arm: sunplus: add SP7021 LTPP3G2 board support Andrew Gaylard
2026-09-02 10:45 ` [PATCH 2/2] arm: sunplus: add Tibbo LTPP3G2 board support; update defconfig Andrew Gaylard
2026-09-02 11:00   ` sashiko-bot

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