Re: [PATCH 12/17] phy: qcom: edp: Add Nord bias and clock buffer enable callback

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Redundant function added due to an incorrect commit message claim
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commit 3bc884119c8e394e11daa5276d830b8881379d66
Author: Ritesh Kumar <ritesh.kumar@oss.qualcomm.com>

phy: qcom: edp: Add Nord bias and clock buffer enable callback

This commit introduces a new callback for the Nord platform to enable the
internal bias generator and clock buffer. It writes 0x1f to the
BIAS_EN_CLKBUFLR_EN register.

> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c
> index 6cac4b55b66f6..ec4220cffe693 100644
> --- a/drivers/phy/qualcomm/phy-qcom-edp.c
> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c
> @@ -1637,6 +1637,14 @@ static int qcom_edp_phy_com_resetsm_cntrl_nord(const struct qcom_edp *edp)
>  }
>  
>  
> +static int qcom_edp_com_bias_en_clkbuflr_nord(const struct qcom_edp *edp)
> +{
> +	writel(0x1f, edp->pll + DP_QSERDES_V8_COM_BIAS_EN_CLKBUFLR_EN);
> +
> +	return 0;
> +}
> +
> +

[Severity: Medium]
The commit message states that setting BIAS_EN_CLKBUFLR_EN to 0x1f "differs 
from the value used on existing SoCs". Is this description accurate?

The existing qcom_edp_com_bias_en_clkbuflr_v8() function already writes exactly 
0x1f to the same DP_QSERDES_V8_COM_BIAS_EN_CLKBUFLR_EN register.

Does this new qcom_edp_com_bias_en_clkbuflr_nord() function introduce redundant 
code? Could the existing v8 variant be reused to avoid duplication, or should 
the commit message be updated to explain why a separate identical callback is 
required?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260911-nord-drv-dt-v1-0-e25c073cf1b6@oss.qualcomm.com?part=12

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