* [PATCH v6 1/5] dt-bindings: thermal: sun8i: Add A523 THS0/1 controllers
2026-09-13 14:55 [PATCH v6 0/5] Allwinner: A523: add support for A523 THS0/1 controllers Mikhail Kalashnikov
@ 2026-09-13 14:55 ` Mikhail Kalashnikov
2026-09-20 9:39 ` Chen-Yu Tsai
2026-09-24 15:17 ` Rob Herring
2026-09-13 14:55 ` [PATCH v6 2/5] thermal/drivers/sun8i: replace devm_reset_control_get to devm_reset_control_get_shared_deasserted Mikhail Kalashnikov
` (3 subsequent siblings)
4 siblings, 2 replies; 12+ messages in thread
From: Mikhail Kalashnikov @ 2026-09-13 14:55 UTC (permalink / raw)
To: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland
Cc: linux-pm, devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
From: Mikhail Kalashnikov <iuncuim@gmail.com>
Add dt-bindings description of the thermal sensors in the A523 processor.
The calibration data for both thermal controllers (THS0, THS1) is split
across two nvmem cells at different offsets, requiring the two cells
to be read and merged. To maintain backward compatibility, the name of
the old cell remains "calibration" and the new cell is named
"calibration-second-part".
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
---
.../thermal/allwinner,sun8i-a83t-ths.yaml | 34 +++++++++++++++++--
1 file changed, 31 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
index 3e61689f6..792081af5 100644
--- a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
+++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
@@ -24,6 +24,8 @@ properties:
- allwinner,sun50i-h5-ths
- allwinner,sun50i-h6-ths
- allwinner,sun50i-h616-ths
+ - allwinner,sun55i-a523-ths0
+ - allwinner,sun55i-a523-ths1
clocks:
minItems: 1
@@ -47,11 +49,16 @@ properties:
maxItems: 1
nvmem-cells:
- maxItems: 1
- description: Calibration data for thermal sensors
+ minItems: 1
+ items:
+ - description: Calibration data for thermal sensors
+ - description: Additional cell in case of separate calibration data
nvmem-cell-names:
- const: calibration
+ minItems: 1
+ items:
+ - const: calibration
+ - const: calibration-second-part
allwinner,sram:
maxItems: 1
@@ -107,6 +114,7 @@ allOf:
enum:
- allwinner,sun8i-h3-ths
- allwinner,sun20i-d1-ths
+ - allwinner,sun55i-a523-ths0
then:
properties:
@@ -132,6 +140,26 @@ allOf:
- clock-names
- resets
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun55i-a523-ths0
+ - allwinner,sun55i-a523-ths1
+ then:
+ properties:
+ nvmem-cells:
+ minItems: 2
+ nvmem-cell-names:
+ minItems: 2
+ else:
+ properties:
+ nvmem-cells:
+ maxItems: 1
+ nvmem-cell-names:
+ maxItems: 1
+
required:
- compatible
- reg
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v6 1/5] dt-bindings: thermal: sun8i: Add A523 THS0/1 controllers
2026-09-13 14:55 ` [PATCH v6 1/5] dt-bindings: thermal: sun8i: Add " Mikhail Kalashnikov
@ 2026-09-20 9:39 ` Chen-Yu Tsai
2026-09-24 15:17 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Chen-Yu Tsai @ 2026-09-20 9:39 UTC (permalink / raw)
To: Mikhail Kalashnikov
Cc: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jernej Skrabec, Samuel Holland, linux-pm,
devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
On Sun, Sep 13, 2026 at 10:56 PM Mikhail Kalashnikov <iuncuim@gmail.com> wrote:
>
> From: Mikhail Kalashnikov <iuncuim@gmail.com>
>
> Add dt-bindings description of the thermal sensors in the A523 processor.
>
> The calibration data for both thermal controllers (THS0, THS1) is split
> across two nvmem cells at different offsets, requiring the two cells
> to be read and merged. To maintain backward compatibility, the name of
> the old cell remains "calibration" and the new cell is named
> "calibration-second-part".
>
> Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v6 1/5] dt-bindings: thermal: sun8i: Add A523 THS0/1 controllers
2026-09-13 14:55 ` [PATCH v6 1/5] dt-bindings: thermal: sun8i: Add " Mikhail Kalashnikov
2026-09-20 9:39 ` Chen-Yu Tsai
@ 2026-09-24 15:17 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Rob Herring @ 2026-09-24 15:17 UTC (permalink / raw)
To: Mikhail Kalashnikov
Cc: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Krzysztof Kozlowski, Conor Dooley,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, linux-pm,
devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
On Sun, Sep 13, 2026 at 10:55:23PM +0800, Mikhail Kalashnikov wrote:
> From: Mikhail Kalashnikov <iuncuim@gmail.com>
>
> Add dt-bindings description of the thermal sensors in the A523 processor.
>
> The calibration data for both thermal controllers (THS0, THS1) is split
> across two nvmem cells at different offsets, requiring the two cells
> to be read and merged. To maintain backward compatibility, the name of
> the old cell remains "calibration" and the new cell is named
> "calibration-second-part".
>
> Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
> ---
> .../thermal/allwinner,sun8i-a83t-ths.yaml | 34 +++++++++++++++++--
> 1 file changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
> index 3e61689f6..792081af5 100644
> --- a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
> +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
> @@ -24,6 +24,8 @@ properties:
> - allwinner,sun50i-h5-ths
> - allwinner,sun50i-h6-ths
> - allwinner,sun50i-h616-ths
> + - allwinner,sun55i-a523-ths0
> + - allwinner,sun55i-a523-ths1
Why the 2 compatibles? What's the difference between them?
Surely this has been asked already, but nothing *in this patch* answers
it.
Rob
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v6 2/5] thermal/drivers/sun8i: replace devm_reset_control_get to devm_reset_control_get_shared_deasserted
2026-09-13 14:55 [PATCH v6 0/5] Allwinner: A523: add support for A523 THS0/1 controllers Mikhail Kalashnikov
2026-09-13 14:55 ` [PATCH v6 1/5] dt-bindings: thermal: sun8i: Add " Mikhail Kalashnikov
@ 2026-09-13 14:55 ` Mikhail Kalashnikov
2026-09-13 14:55 ` [PATCH v6 3/5] thermal/drivers/sun8i: get calibration data from two nvmem cells Mikhail Kalashnikov
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Mikhail Kalashnikov @ 2026-09-13 14:55 UTC (permalink / raw)
To: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland
Cc: linux-pm, devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
From: Mikhail Kalashnikov <iuncuim@gmail.com>
The A523 processor has two temperature controllers, but they share a
common reset line. Make it shared with the shared variant of
devm_reset_control_get(), and also simplify the driver by switching to
devm_reset_control_get_shared_deasserted().
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/thermal/sun8i_thermal.c | 16 +---------------
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c
index 284684137..1412bce63 100644
--- a/drivers/thermal/sun8i_thermal.c
+++ b/drivers/thermal/sun8i_thermal.c
@@ -341,11 +341,6 @@ static int sun8i_ths_calibrate(struct ths_device *tmdev)
return ret;
}
-static void sun8i_ths_reset_control_assert(void *data)
-{
- reset_control_assert(data);
-}
-
static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node)
{
struct platform_device *sram_pdev;
@@ -388,19 +383,10 @@ static int sun8i_ths_resource_init(struct ths_device *tmdev)
return PTR_ERR(tmdev->regmap);
if (tmdev->chip->has_bus_clk_reset) {
- tmdev->reset = devm_reset_control_get(dev, NULL);
+ tmdev->reset = devm_reset_control_get_shared_deasserted(dev, NULL);
if (IS_ERR(tmdev->reset))
return PTR_ERR(tmdev->reset);
- ret = reset_control_deassert(tmdev->reset);
- if (ret)
- return ret;
-
- ret = devm_add_action_or_reset(dev, sun8i_ths_reset_control_assert,
- tmdev->reset);
- if (ret)
- return ret;
-
tmdev->bus_clk = devm_clk_get_enabled(&pdev->dev, "bus");
if (IS_ERR(tmdev->bus_clk))
return PTR_ERR(tmdev->bus_clk);
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v6 3/5] thermal/drivers/sun8i: get calibration data from two nvmem cells
2026-09-13 14:55 [PATCH v6 0/5] Allwinner: A523: add support for A523 THS0/1 controllers Mikhail Kalashnikov
2026-09-13 14:55 ` [PATCH v6 1/5] dt-bindings: thermal: sun8i: Add " Mikhail Kalashnikov
2026-09-13 14:55 ` [PATCH v6 2/5] thermal/drivers/sun8i: replace devm_reset_control_get to devm_reset_control_get_shared_deasserted Mikhail Kalashnikov
@ 2026-09-13 14:55 ` Mikhail Kalashnikov
2026-09-13 15:10 ` sashiko-bot
2026-09-20 9:50 ` Chen-Yu Tsai
2026-09-13 14:55 ` [PATCH v6 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers Mikhail Kalashnikov
2026-09-13 14:55 ` [PATCH v6 5/5] arm64: dts: allwinner: sun55i: add thermal sensors Mikhail Kalashnikov
4 siblings, 2 replies; 12+ messages in thread
From: Mikhail Kalashnikov @ 2026-09-13 14:55 UTC (permalink / raw)
To: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland
Cc: linux-pm, devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
From: Mikhail Kalashnikov <iuncuim@gmail.com>
The A523 processor has calibration data in two nvmem cells. To be able to
add support, the ability to add data from two cells into one array must be
added.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
---
drivers/thermal/sun8i_thermal.c | 81 +++++++++++++++++++++------------
1 file changed, 53 insertions(+), 28 deletions(-)
diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c
index 1412bce63..360654880 100644
--- a/drivers/thermal/sun8i_thermal.c
+++ b/drivers/thermal/sun8i_thermal.c
@@ -300,43 +300,68 @@ static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
static int sun8i_ths_calibrate(struct ths_device *tmdev)
{
- struct nvmem_cell *calcell;
+ struct nvmem_cell *calcell = NULL;
struct device *dev = tmdev->dev;
- u16 *caldata;
- size_t callen;
+ struct device_node *np = dev_of_node(dev);
+ struct property *prop;
+ const char *cellname;
+ u8 *caldata = NULL;
+ size_t callen = 0;
int ret = 0;
- calcell = nvmem_cell_get(dev, "calibration");
- if (IS_ERR(calcell)) {
- if (PTR_ERR(calcell) == -EPROBE_DEFER)
- return -EPROBE_DEFER;
- /*
- * Even if the external calibration data stored in sid is
- * not accessible, the THS hardware can still work, although
- * the data won't be so accurate.
- *
- * The default value of calibration register is 0x800 for
- * every sensor, and the calibration value is usually 0x7xx
- * or 0x8xx, so they won't be away from the default value
- * for a lot.
- *
- * So here we do not return error if the calibration data is
- * not available, except the probe needs deferring.
- */
- goto out;
+ of_property_for_each_string(np, "nvmem-cell-names", prop, cellname) {
+ size_t len;
+ u8 *caldatapart;
+
+ calcell = of_nvmem_cell_get(np, cellname);
+ if (IS_ERR(calcell)) {
+ if (PTR_ERR(calcell) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ /*
+ * Even if the external calibration data stored in sid is
+ * not accessible, the THS hardware can still work, although
+ * the data won't be so accurate.
+ *
+ * The default value of calibration register is 0x800 for
+ * every sensor, and the calibration value is usually 0x7xx
+ * or 0x8xx, so they won't be away from the default value
+ * for a lot.
+ *
+ * So here we do not return error if the calibration data is
+ * not available, except the probe needs deferring.
+ */
+ goto out;
+ }
+
+ caldatapart = nvmem_cell_read(calcell, &len);
+ nvmem_cell_put(calcell);
+ calcell = NULL;
+ if (IS_ERR(caldatapart)) {
+ ret = PTR_ERR(caldatapart);
+ goto out;
+ }
+
+ caldata = devm_krealloc(dev, caldata, callen + len, GFP_KERNEL);
+ if (!caldata) {
+ kfree(caldatapart);
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ memcpy(caldata + callen, caldatapart, len);
+ callen += len;
+ kfree(caldatapart);
}
- caldata = nvmem_cell_read(calcell, &callen);
- if (IS_ERR(caldata)) {
- ret = PTR_ERR(caldata);
+ if (!caldata)
goto out;
- }
- tmdev->chip->calibrate(tmdev, caldata, callen);
+ tmdev->chip->calibrate(tmdev, (u16 *)caldata, callen);
- kfree(caldata);
+ devm_kfree(dev, caldata);
+ caldata = NULL;
out:
- if (!IS_ERR(calcell))
+ if (!IS_ERR_OR_NULL(calcell))
nvmem_cell_put(calcell);
return ret;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v6 3/5] thermal/drivers/sun8i: get calibration data from two nvmem cells
2026-09-13 14:55 ` [PATCH v6 3/5] thermal/drivers/sun8i: get calibration data from two nvmem cells Mikhail Kalashnikov
@ 2026-09-13 15:10 ` sashiko-bot
2026-09-20 9:50 ` Chen-Yu Tsai
1 sibling, 0 replies; 12+ messages in thread
From: sashiko-bot @ 2026-09-13 15:10 UTC (permalink / raw)
To: Mikhail Kalashnikov; +Cc: devicetree, conor+dt, robh, linux-sunxi
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Devres-managed memory allocated for `caldata` is leaked for the lifetime of the device if a secondary nvmem cell fails to be acquired.
--
commit 340e56882111780a9b5ca525d954f99c45894fc7
Author: Mikhail Kalashnikov <iuncuim@gmail.com>
thermal/drivers/sun8i: get calibration data from two nvmem cells
The commit updates the sun8i thermal driver to support retrieving calibration
data from multiple nvmem cells. It iterates over nvmem-cell-names and
concatenates the cell data into a single devm-managed buffer.
> diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c
> index 1412bce630c0c..3606548801f02 100644
> --- a/drivers/thermal/sun8i_thermal.c
> +++ b/drivers/thermal/sun8i_thermal.c
> @@ -300,43 +300,68 @@ static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
>
> static int sun8i_ths_calibrate(struct ths_device *tmdev)
> {
[ ... ]
> + of_property_for_each_string(np, "nvmem-cell-names", prop, cellname) {
> + size_t len;
> + u8 *caldatapart;
> +
> + calcell = of_nvmem_cell_get(np, cellname);
> + if (IS_ERR(calcell)) {
> + if (PTR_ERR(calcell) == -EPROBE_DEFER)
> + return -EPROBE_DEFER;
[ ... ]
> + goto out;
[Severity: Medium]
Does this goto out cause a memory leak of the devres-managed caldata buffer?
If of_nvmem_cell_get() fails for a secondary cell (with an error other than
-EPROBE_DEFER), the function jumps to out returning 0, since ret is not
updated. Since probe succeeds, the devres memory allocated via
devm_krealloc() for the first cell's data is retained for the lifetime of
the device, skipping the explicit devm_kfree(dev, caldata) before the
out label.
> + }
> +
> + caldatapart = nvmem_cell_read(calcell, &len);
> + nvmem_cell_put(calcell);
> + calcell = NULL;
> + if (IS_ERR(caldatapart)) {
> + ret = PTR_ERR(caldatapart);
> + goto out;
> + }
> +
> + caldata = devm_krealloc(dev, caldata, callen + len, GFP_KERNEL);
> + if (!caldata) {
> + kfree(caldatapart);
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + memcpy(caldata + callen, caldatapart, len);
> + callen += len;
> + kfree(caldatapart);
> }
>
> - caldata = nvmem_cell_read(calcell, &callen);
> - if (IS_ERR(caldata)) {
> - ret = PTR_ERR(caldata);
> + if (!caldata)
> goto out;
> - }
>
> - tmdev->chip->calibrate(tmdev, caldata, callen);
> + tmdev->chip->calibrate(tmdev, (u16 *)caldata, callen);
>
> - kfree(caldata);
> + devm_kfree(dev, caldata);
> + caldata = NULL;
> out:
> - if (!IS_ERR(calcell))
> + if (!IS_ERR_OR_NULL(calcell))
> nvmem_cell_put(calcell);
> return ret;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260913145527.18148-1-iuncuim@gmail.com?part=3
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v6 3/5] thermal/drivers/sun8i: get calibration data from two nvmem cells
2026-09-13 14:55 ` [PATCH v6 3/5] thermal/drivers/sun8i: get calibration data from two nvmem cells Mikhail Kalashnikov
2026-09-13 15:10 ` sashiko-bot
@ 2026-09-20 9:50 ` Chen-Yu Tsai
1 sibling, 0 replies; 12+ messages in thread
From: Chen-Yu Tsai @ 2026-09-20 9:50 UTC (permalink / raw)
To: Mikhail Kalashnikov
Cc: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jernej Skrabec, Samuel Holland, linux-pm,
devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
On Sun, Sep 13, 2026 at 10:56 PM Mikhail Kalashnikov <iuncuim@gmail.com> wrote:
>
> From: Mikhail Kalashnikov <iuncuim@gmail.com>
>
> The A523 processor has calibration data in two nvmem cells. To be able to
> add support, the ability to add data from two cells into one array must be
> added.
>
> Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
I'd say that Sashiko's comment on "leaking" memory until the device is
removed is not too much of a concern. Sure it could be released sooner
since it's not used, but it's not a lot of memory.
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
> ---
> drivers/thermal/sun8i_thermal.c | 81 +++++++++++++++++++++------------
> 1 file changed, 53 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c
> index 1412bce63..360654880 100644
> --- a/drivers/thermal/sun8i_thermal.c
> +++ b/drivers/thermal/sun8i_thermal.c
> @@ -300,43 +300,68 @@ static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
>
> static int sun8i_ths_calibrate(struct ths_device *tmdev)
> {
> - struct nvmem_cell *calcell;
> + struct nvmem_cell *calcell = NULL;
> struct device *dev = tmdev->dev;
> - u16 *caldata;
> - size_t callen;
> + struct device_node *np = dev_of_node(dev);
> + struct property *prop;
> + const char *cellname;
> + u8 *caldata = NULL;
> + size_t callen = 0;
> int ret = 0;
>
> - calcell = nvmem_cell_get(dev, "calibration");
> - if (IS_ERR(calcell)) {
> - if (PTR_ERR(calcell) == -EPROBE_DEFER)
> - return -EPROBE_DEFER;
> - /*
> - * Even if the external calibration data stored in sid is
> - * not accessible, the THS hardware can still work, although
> - * the data won't be so accurate.
> - *
> - * The default value of calibration register is 0x800 for
> - * every sensor, and the calibration value is usually 0x7xx
> - * or 0x8xx, so they won't be away from the default value
> - * for a lot.
> - *
> - * So here we do not return error if the calibration data is
> - * not available, except the probe needs deferring.
> - */
> - goto out;
> + of_property_for_each_string(np, "nvmem-cell-names", prop, cellname) {
> + size_t len;
> + u8 *caldatapart;
> +
> + calcell = of_nvmem_cell_get(np, cellname);
> + if (IS_ERR(calcell)) {
> + if (PTR_ERR(calcell) == -EPROBE_DEFER)
> + return -EPROBE_DEFER;
> + /*
> + * Even if the external calibration data stored in sid is
> + * not accessible, the THS hardware can still work, although
> + * the data won't be so accurate.
> + *
> + * The default value of calibration register is 0x800 for
> + * every sensor, and the calibration value is usually 0x7xx
> + * or 0x8xx, so they won't be away from the default value
> + * for a lot.
> + *
> + * So here we do not return error if the calibration data is
> + * not available, except the probe needs deferring.
> + */
> + goto out;
> + }
> +
> + caldatapart = nvmem_cell_read(calcell, &len);
> + nvmem_cell_put(calcell);
> + calcell = NULL;
> + if (IS_ERR(caldatapart)) {
> + ret = PTR_ERR(caldatapart);
> + goto out;
> + }
> +
> + caldata = devm_krealloc(dev, caldata, callen + len, GFP_KERNEL);
> + if (!caldata) {
> + kfree(caldatapart);
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + memcpy(caldata + callen, caldatapart, len);
> + callen += len;
> + kfree(caldatapart);
> }
>
> - caldata = nvmem_cell_read(calcell, &callen);
> - if (IS_ERR(caldata)) {
> - ret = PTR_ERR(caldata);
> + if (!caldata)
> goto out;
> - }
>
> - tmdev->chip->calibrate(tmdev, caldata, callen);
> + tmdev->chip->calibrate(tmdev, (u16 *)caldata, callen);
>
> - kfree(caldata);
> + devm_kfree(dev, caldata);
> + caldata = NULL;
> out:
> - if (!IS_ERR(calcell))
> + if (!IS_ERR_OR_NULL(calcell))
> nvmem_cell_put(calcell);
> return ret;
> }
> --
> 2.55.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v6 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers
2026-09-13 14:55 [PATCH v6 0/5] Allwinner: A523: add support for A523 THS0/1 controllers Mikhail Kalashnikov
` (2 preceding siblings ...)
2026-09-13 14:55 ` [PATCH v6 3/5] thermal/drivers/sun8i: get calibration data from two nvmem cells Mikhail Kalashnikov
@ 2026-09-13 14:55 ` Mikhail Kalashnikov
2026-09-13 15:08 ` sashiko-bot
2026-09-20 10:02 ` Chen-Yu Tsai
2026-09-13 14:55 ` [PATCH v6 5/5] arm64: dts: allwinner: sun55i: add thermal sensors Mikhail Kalashnikov
4 siblings, 2 replies; 12+ messages in thread
From: Mikhail Kalashnikov @ 2026-09-13 14:55 UTC (permalink / raw)
To: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland
Cc: linux-pm, devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
From: Mikhail Kalashnikov <iuncuim@gmail.com>
The A523 processor has two temperature controllers, THS0 and THS1.
THS0 has only one temperature sensor, which is located in the DRAM
controller. THS1 does have 4 sensors:
ths1_0 - "big" cores
ths1_1 - "little" cores
ths1_2 - gpu
ths1_3 - npu
The user manual for the T527 processor describes 4 sensors, whereas
the one for the A523 describes only 3. As additional information, the BSP
driver was used, in which the value SUN55IW3_CAL_COM(5000) is used as
the calibration value in the formula; in the mainline driver it is
treated as the ft_deviation value. Also, in the BSP driver the NPU sensor
is used for both the GPU and the NPU — its actual purpose is unclear;
both sensors are functional and show temperature changes depending on
load.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
---
drivers/thermal/sun8i_thermal.c | 147 ++++++++++++++++++++++++++++++++
1 file changed, 147 insertions(+)
diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c
index 360654880..4a81486f8 100644
--- a/drivers/thermal/sun8i_thermal.c
+++ b/drivers/thermal/sun8i_thermal.c
@@ -59,6 +59,12 @@
#define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12)
#define SUN50I_H6_THS_DATA_IRQ_STS(x) BIT(x)
+#define SUN55I_A523_DELIMITER 0x7c8
+#define SUN55I_A523_OFFSET_BELOW 2736
+#define SUN55I_A523_OFFSET_ABOVE 2825
+#define SUN55I_A523_SCALE_BELOW 74
+#define SUN55I_A523_SCALE_ABOVE 65
+
struct tsensor {
struct ths_device *tmdev;
struct thermal_zone_device *tzd;
@@ -114,6 +120,21 @@ static int sun50i_h5_calc_temp(struct ths_device *tmdev,
return -1590 * reg / 10 + 276000;
}
+/*
+ * The constant names were chosen in accordance with the BSP driver;
+ * they indicate whether the value corresponds to a high or low
+ * temperature (relative to a value of ~55 °C), rather than the reg value
+ * that was read.
+ */
+static int sun55i_a523_calc_temp(struct ths_device *tmdev,
+ int id, int reg)
+{
+ if (reg >= SUN55I_A523_DELIMITER)
+ return SUN55I_A523_SCALE_BELOW * (SUN55I_A523_OFFSET_BELOW - reg);
+ else
+ return SUN55I_A523_SCALE_ABOVE * (SUN55I_A523_OFFSET_ABOVE - reg);
+}
+
static int sun8i_ths_get_temp(struct thermal_zone_device *tz, int *temp)
{
struct tsensor *s = thermal_zone_device_priv(tz);
@@ -298,6 +319,105 @@ static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
return 0;
}
+/*
+ * The A523 calibration data is stored in the eFuse, split across two
+ * nvmem cells. THS1 has four sensors, including ths1_3 which is used
+ * for the NPU, each with its own calibration value. The fields are
+ * packed as shown in the layouts below.
+ *
+ * efuse layout 0x38-0x3F (caldata[0..3]):
+ * caldata[0] caldata[1] caldata[2] caldata[3]
+ * 0 16 24 32 36 48 60 64
+ * +---------------+---------------+---------------+---------------+
+ * | | | temp | ths1_0 | ths1_1 | +
+ * +---------------+---------------+---------------+---------------+
+ *
+ * efuse layout 0x44-0x4B (caldata[4..7]):
+ * caldata[4] caldata[5] caldata[6] caldata[7]
+ * 0 12 16 24 32 36 48 64
+ * +---------------+---------------+---------------+---------------+
+ * | ths1_2 | ths1_3 | ths0 | | +
+ * +---------------+---------------+---------------+---------------+
+ */
+static int sun55i_a523_ths_calibrate(struct ths_device *tmdev,
+ u16 *caldata, int callen)
+{
+ struct device *dev = tmdev->dev;
+ int i, ft_temp;
+
+ if (!caldata[1])
+ return -EINVAL;
+
+ ft_temp = (((caldata[2] << 8) | (caldata[1] >> 8)) & FT_TEMP_MASK) * 100;
+
+ for (i = 0; i < tmdev->chip->sensor_num; i++) {
+ int sensor_reg, sensor_temp, cdata, offset;
+ /*
+ * Chips ths0 and ths1 have common parameters for value
+ * calibration. To separate them we can use the number of
+ * temperature sensors on each chip.
+ * For ths0 this value is 1.
+ */
+ if (tmdev->chip->sensor_num == 1) {
+ sensor_reg = ((caldata[5] >> 8) |
+ (caldata[6] << 8)) & TEMP_CALIB_MASK;
+ } else {
+ switch (i) {
+ case 0:
+ sensor_reg = (caldata[2] >> 4) & TEMP_CALIB_MASK;
+ break;
+ case 1:
+ sensor_reg = caldata[3] & TEMP_CALIB_MASK;
+ break;
+ case 2:
+ sensor_reg = caldata[4] & TEMP_CALIB_MASK;
+ break;
+ case 3:
+ sensor_reg = ((caldata[4] >> 12) |
+ (caldata[5] << 4)) & TEMP_CALIB_MASK;
+ break;
+ default:
+ sensor_reg = 0;
+ break;
+ }
+ }
+
+ sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg);
+
+ /*
+ * Calibration data is CALIBRATE_DEFAULT - (calculated
+ * temperature from sensor reading at factory temperature
+ * minus actual factory temperature) * X (scale from
+ * temperature to register values).
+ *
+ * The BSP's SUN55IW3_CAL_COM(5000) is applied as ft_deviation
+ * in sun8i_ths_get_temp(), after calc_temp(), and therefore
+ * intentionally not repeated here.
+ */
+ cdata = CALIBRATE_DEFAULT -
+ ((sensor_temp - ft_temp) / SUN55I_A523_SCALE_BELOW);
+
+ if (cdata & ~TEMP_CALIB_MASK) {
+ /*
+ * Calibration value more than 12-bit, but calibration
+ * register is 12-bit. In this case, ths hardware can
+ * still work without calibration, although the data
+ * won't be so accurate.
+ */
+ dev_warn(dev, "sensor%d is not calibrated.\n", i);
+ continue;
+ }
+
+ offset = (i % 2) * 16;
+ regmap_update_bits(tmdev->regmap,
+ SUN50I_H6_THS_TEMP_CALIB + (i / 2 * 4),
+ TEMP_CALIB_MASK << offset,
+ cdata << offset);
+ }
+
+ return 0;
+}
+
static int sun8i_ths_calibrate(struct ths_device *tmdev)
{
struct nvmem_cell *calcell = NULL;
@@ -719,6 +839,31 @@ static const struct ths_thermal_chip sun50i_h616_ths = {
.calc_temp = sun8i_ths_calc_temp,
};
+/* The A523 has a shared reset line for both chips */
+static const struct ths_thermal_chip sun55i_a523_ths0 = {
+ .sensor_num = 1,
+ .has_bus_clk_reset = true,
+ .has_mod_clk = true,
+ .ft_deviation = 5000,
+ .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
+ .calibrate = sun55i_a523_ths_calibrate,
+ .init = sun50i_h6_thermal_init,
+ .irq_ack = sun50i_h6_irq_ack,
+ .calc_temp = sun55i_a523_calc_temp,
+};
+
+static const struct ths_thermal_chip sun55i_a523_ths1 = {
+ .sensor_num = 4,
+ .has_bus_clk_reset = true,
+ .has_mod_clk = true,
+ .ft_deviation = 5000,
+ .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
+ .calibrate = sun55i_a523_ths_calibrate,
+ .init = sun50i_h6_thermal_init,
+ .irq_ack = sun50i_h6_irq_ack,
+ .calc_temp = sun55i_a523_calc_temp,
+};
+
static const struct of_device_id of_ths_match[] = {
{ .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
{ .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
@@ -729,6 +874,8 @@ static const struct of_device_id of_ths_match[] = {
{ .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },
{ .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths },
{ .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths },
+ { .compatible = "allwinner,sun55i-a523-ths0", .data = &sun55i_a523_ths0 },
+ { .compatible = "allwinner,sun55i-a523-ths1", .data = &sun55i_a523_ths1 },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, of_ths_match);
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v6 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers
2026-09-13 14:55 ` [PATCH v6 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers Mikhail Kalashnikov
@ 2026-09-13 15:08 ` sashiko-bot
2026-09-20 10:02 ` Chen-Yu Tsai
1 sibling, 0 replies; 12+ messages in thread
From: sashiko-bot @ 2026-09-13 15:08 UTC (permalink / raw)
To: Mikhail Kalashnikov; +Cc: devicetree, linux-sunxi, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Incorrect check for unprogrammed eFuse can reject valid calibration data.
- [Medium] Missing bounds check on `callen` in `sun55i_a523_ths_calibrate` allows out-of-bounds memory reads on the dynamically allocated `caldata` array.
--
commit 1a5244bb0d5a03f3ec7f2a8c21b6249015b66057
Author: Mikhail Kalashnikov <iuncuim@gmail.com>
thermal/drivers/sun8i: Add support for A523 THS0/1 controllers
The A523 processor has two temperature controllers, THS0 and THS1.
THS0 has only one temperature sensor, which is located in the DRAM
controller. THS1 does have 4 sensors:
ths1_0 - "big" cores
ths1_1 - "little" cores
ths1_2 - gpu
ths1_3 - npu
> diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c
> index 3606548801f02..4a81486f8faec 100644
> --- a/drivers/thermal/sun8i_thermal.c
> +++ b/drivers/thermal/sun8i_thermal.c
[ ... ]
> @@ -298,6 +319,105 @@ static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
> return 0;
> }
>
> +/*
> + * The A523 calibration data is stored in the eFuse, split across two
> + * nvmem cells. THS1 has four sensors, including ths1_3 which is used
> + * for the NPU, each with its own calibration value. The fields are
> + * packed as shown in the layouts below.
> + *
> + * efuse layout 0x38-0x3F (caldata[0..3]):
> + * caldata[0] caldata[1] caldata[2] caldata[3]
> + * 0 16 24 32 36 48 60 64
> + * +---------------+---------------+---------------+---------------+
> + * | | | temp | ths1_0 | ths1_1 | +
> + * +---------------+---------------+---------------+---------------+
> + *
> + * efuse layout 0x44-0x4B (caldata[4..7]):
> + * caldata[4] caldata[5] caldata[6] caldata[7]
> + * 0 12 16 24 32 36 48 64
> + * +---------------+---------------+---------------+---------------+
> + * | ths1_2 | ths1_3 | ths0 | | +
> + * +---------------+---------------+---------------+---------------+
> + */
> +static int sun55i_a523_ths_calibrate(struct ths_device *tmdev,
> + u16 *caldata, int callen)
> +{
> + struct device *dev = tmdev->dev;
> + int i, ft_temp;
> +
> + if (!caldata[1])
[Severity: High]
Does this check inadvertently reject valid calibration data?
If the 12-bit factory calibration temperature happens to be a multiple of
25.6 C (meaning its lowest 8 bits are 0, like 0x100), caldata[1] will be
legitimately 0 since it only holds those lower 8 bits. This would cause the
driver to incorrectly abort calibration on perfectly valid hardware.
[Severity: Medium]
Can this read out-of-bounds memory?
The function receives a dynamically allocated caldata array of size callen
populated from the NVMEM cells, but callen is never verified here. If the
device tree provides a malformed or incomplete NVMEM cell, this access and
subsequent reads will happen past the end of the allocation.
> + return -EINVAL;
> +
> + ft_temp = (((caldata[2] << 8) | (caldata[1] >> 8)) & FT_TEMP_MASK) * 100;
> +
> + for (i = 0; i < tmdev->chip->sensor_num; i++) {
> + int sensor_reg, sensor_temp, cdata, offset;
> + /*
> + * Chips ths0 and ths1 have common parameters for value
> + * calibration. To separate them we can use the number of
> + * temperature sensors on each chip.
> + * For ths0 this value is 1.
> + */
> + if (tmdev->chip->sensor_num == 1) {
> + sensor_reg = ((caldata[5] >> 8) |
> + (caldata[6] << 8)) & TEMP_CALIB_MASK;
[Severity: Medium]
Is it possible to read out-of-bounds memory here as well?
This is the highest index accessed in sun55i_a523_ths_calibrate. It strictly
requires a minimum buffer size of 14 bytes. If the device tree provides an
8-byte NVMEM cell, accessing caldata[5] and caldata[6] will pull
uninitialized heap data into the calibration calculations or cause a crash.
> + } else {
> + switch (i) {
> + case 0:
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260913145527.18148-1-iuncuim@gmail.com?part=4
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v6 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers
2026-09-13 14:55 ` [PATCH v6 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers Mikhail Kalashnikov
2026-09-13 15:08 ` sashiko-bot
@ 2026-09-20 10:02 ` Chen-Yu Tsai
1 sibling, 0 replies; 12+ messages in thread
From: Chen-Yu Tsai @ 2026-09-20 10:02 UTC (permalink / raw)
To: Mikhail Kalashnikov
Cc: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jernej Skrabec, Samuel Holland, linux-pm,
devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
On Sun, Sep 13, 2026 at 10:56 PM Mikhail Kalashnikov <iuncuim@gmail.com> wrote:
>
> From: Mikhail Kalashnikov <iuncuim@gmail.com>
>
> The A523 processor has two temperature controllers, THS0 and THS1.
> THS0 has only one temperature sensor, which is located in the DRAM
> controller. THS1 does have 4 sensors:
> ths1_0 - "big" cores
> ths1_1 - "little" cores
> ths1_2 - gpu
> ths1_3 - npu
>
> The user manual for the T527 processor describes 4 sensors, whereas
> the one for the A523 describes only 3. As additional information, the BSP
> driver was used, in which the value SUN55IW3_CAL_COM(5000) is used as
> the calibration value in the formula; in the mainline driver it is
> treated as the ft_deviation value. Also, in the BSP driver the NPU sensor
> is used for both the GPU and the NPU — its actual purpose is unclear;
> both sensors are functional and show temperature changes depending on
> load.
>
> Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
I think we can ignore Sashiko's concerns for this patch.
1. calibration likely happens at room temperature
2. it is not the drivers responsibility to guard against incorrect
device trees
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v6 5/5] arm64: dts: allwinner: sun55i: add thermal sensors
2026-09-13 14:55 [PATCH v6 0/5] Allwinner: A523: add support for A523 THS0/1 controllers Mikhail Kalashnikov
` (3 preceding siblings ...)
2026-09-13 14:55 ` [PATCH v6 4/5] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers Mikhail Kalashnikov
@ 2026-09-13 14:55 ` Mikhail Kalashnikov
4 siblings, 0 replies; 12+ messages in thread
From: Mikhail Kalashnikov @ 2026-09-13 14:55 UTC (permalink / raw)
To: Vasily Khoruzhick, Yangtao Li, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland
Cc: linux-pm, devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
Philipp Zabel, Juan Manuel López Carrillo, Andre Przywara
From: Mikhail Kalashnikov <iuncuim@gmail.com>
The A523 processor has two temperature controllers, THS0 and THS1.
THS0 has only one temperature sensor, which is located in the DRAM
controller.
THS1 does have 4 sensors:
ths1_0 - "big" cores
ths1_1 - "little" cores
ths1_2 - gpu
ths1_3 - npu
Add the thermal sensor configuration and the thermal zones.
Trips temperature, polling-delay and sustainable-power parameters are
derived from the manufacturer's BSP.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
---
.../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 172 ++++++++++++++++++
1 file changed, 172 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 85ef492ff..ced544154 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -11,6 +11,7 @@
#include <dt-bindings/reset/sun55i-a523-r-ccu.h>
#include <dt-bindings/power/allwinner,sun55i-a523-ppu.h>
#include <dt-bindings/power/allwinner,sun55i-a523-pck-600.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@@ -26,6 +27,7 @@ cpu0: cpu@0 {
device_type = "cpu";
reg = <0x000>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu1: cpu@100 {
@@ -33,6 +35,7 @@ cpu1: cpu@100 {
device_type = "cpu";
reg = <0x100>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu2: cpu@200 {
@@ -40,6 +43,7 @@ cpu2: cpu@200 {
device_type = "cpu";
reg = <0x200>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu3: cpu@300 {
@@ -47,6 +51,7 @@ cpu3: cpu@300 {
device_type = "cpu";
reg = <0x300>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu4: cpu@400 {
@@ -54,6 +59,7 @@ cpu4: cpu@400 {
device_type = "cpu";
reg = <0x400>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu5: cpu@500 {
@@ -61,6 +67,7 @@ cpu5: cpu@500 {
device_type = "cpu";
reg = <0x500>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu6: cpu@600 {
@@ -68,6 +75,7 @@ cpu6: cpu@600 {
device_type = "cpu";
reg = <0x600>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu7: cpu@700 {
@@ -75,6 +83,7 @@ cpu7: cpu@700 {
device_type = "cpu";
reg = <0x700>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
};
@@ -380,6 +389,30 @@ gpadc: adc@2009000 {
status = "disabled";
};
+ ths1: thermal-sensor@2009400 {
+ compatible = "allwinner,sun55i-a523-ths1";
+ reg = <0x02009400 0x400>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_GPADC1>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration0>, <&ths_calibration1>;
+ nvmem-cell-names = "calibration", "calibration-second-part";
+ #thermal-sensor-cells = <1>;
+ };
+
+ ths0: thermal-sensor@200a000 {
+ compatible = "allwinner,sun55i-a523-ths0";
+ reg = <0x0200a000 0x400>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_GPADC0>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration0>, <&ths_calibration1>;
+ nvmem-cell-names = "calibration", "calibration-second-part";
+ #thermal-sensor-cells = <0>;
+ };
+
wdt: watchdog@2050000 {
compatible = "allwinner,sun55i-a523-wdt";
reg = <0x2050000 0x20>;
@@ -611,6 +644,14 @@ sid: efuse@3006000 {
reg = <0x03006000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
+
+ ths_calibration0: ths-calibration0@38 {
+ reg = <0x38 0x8>;
+ };
+
+ ths_calibration1: ths-calibration1@44 {
+ reg = <0x44 0x8>;
+ };
};
gic: interrupt-controller@3400000 {
@@ -1145,4 +1186,135 @@ npu: npu@7122000 {
power-domains = <&ppu PD_NPU>;
};
};
+
+ thermal-zones {
+ cpu0-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths1 1>;
+ sustainable-power = <1200>;
+
+ trips {
+ cpu-trip-0 {
+ temperature = <70000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+
+ cpu0_target: cpu-trip-1 {
+ temperature = <90000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+
+ cpu-trip-2 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu0_target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu4-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths1 0>;
+ sustainable-power = <1600>;
+
+ trips {
+ cpu-trip-0 {
+ temperature = <70000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+
+ cpu4_target: cpu-trip-1 {
+ temperature = <90000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+
+ cpu-trip-2 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu4_target>;
+ cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths1 2>;
+ sustainable-power = <2400>;
+
+ trips {
+ gpu-trip-0 {
+ temperature = <60000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+
+ gpu-trip-1 {
+ temperature = <90000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+
+ gpu-trip-2 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+ };
+
+ npu-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths1 3>;
+
+ trips {
+ npu-trip-0 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+ };
+
+ ddr-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths0>;
+
+ trips {
+ ddr-trip-0 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+ };
+ };
};
--
2.55.0
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