From: sashiko-bot@kernel.org
To: "Wangao Wang" <wangao.wang@oss.qualcomm.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org,
media-ci@linuxtv.org, conor+dt@kernel.org
Subject: Re: [PATCH 4/4] arm64: dts: qcom: eliza-mtp: Enable iris video codec
Date: Mon, 14 Sep 2026 10:10:14 +0000 [thread overview]
Message-ID: <20260914101015.03CD11F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260914-add_iris_for_eliza-v1-4-e8ccd9b8cf7a@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The `iommus` property is incorrectly placed inside `non-pixel` and `pixel` subnodes instead of the main `iris` node.
--
commit f75c3762943bc77bc910383ace15428dcbdec236
Author: Wangao Wang <wangao.wang@oss.qualcomm.com>
arm64: dts: qcom: eliza-mtp: Enable iris video codec
The Eliza MTP includes the Iris video codec, but the device tree leaves
the node disabled. Mark it as okay so the video codec driver can probe
on this board.
> diff --git a/arch/arm64/boot/dts/qcom/eliza-mtp.dts b/arch/arm64/boot/dts/qcom/eliza-mtp.dts
> index ee05192adcfb9..e5a698602dfc7 100644
> --- a/arch/arm64/boot/dts/qcom/eliza-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/eliza-mtp.dts
[ ... ]
> @@ -430,6 +430,10 @@ &gpu_zap_shader {
> firmware-name = "qcom/eliza/gen71700_zap.mbn";
> };
>
> +&iris {
> + status = "okay";
> +};
[Severity: High]
Does enabling the iris node here expose an issue with how its IOMMU
configuration is defined in the base dtsi?
In arch/arm64/boot/dts/qcom/eliza.dtsi, the iommus property is placed inside
legacy non-pixel and pixel subnodes:
non-pixel {
iommus = <&apps_smmu 0x1940 0x0>;
iommu-ranges = <0x25800000 0xba800000>;
};
pixel {
iommus = <&apps_smmu 0x1947 0x0>;
};
The generic IOMMU framework (of_iommu_configure() in drivers/iommu/of_iommu.c)
only looks for the iommus property directly on the device node (dev->of_node)
and ignores arbitrary subnodes.
Because of this misplacement, the platform device will fail to attach to its
designated SMMU domain, causing DMA operations to use raw physical addresses
and trigger SMMU translation faults.
Furthermore, the qcom,sm8550-iris.yaml binding explicitly requires the iommus
property on the main node and strictly forbids unlisted subnodes via
unevaluatedProperties: false, which triggers dtbs_check validation errors.
Should the iommus property be moved to the main iris node before enabling it?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260914-add_iris_for_eliza-v1-0-e8ccd9b8cf7a@oss.qualcomm.com?part=4
next prev parent reply other threads:[~2026-09-14 10:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-14 9:54 [PATCH 0/4] media: iris: Enable Iris video codec on Eliza Wangao Wang
2026-09-14 9:54 ` [PATCH 1/4] dt-bindings: media: qcom,sm8550-iris: Document Eliza IRIS accelerator Wangao Wang
2026-09-15 7:10 ` Krzysztof Kozlowski
2026-09-14 9:54 ` [PATCH 2/4] media: iris: Add support for Eliza Wangao Wang
2026-09-14 9:54 ` [PATCH 3/4] arm64: dts: qcom: eliza: Add iris video codec node Wangao Wang
2026-09-14 10:09 ` sashiko-bot
2026-09-14 9:54 ` [PATCH 4/4] arm64: dts: qcom: eliza-mtp: Enable iris video codec Wangao Wang
2026-09-14 10:10 ` sashiko-bot [this message]
2026-09-14 11:27 ` Abel Vesa
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