From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Alex Williamson" <alex@shazbot.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH 0/2] hw/pci-bridge: Add x-speed and x-width properties to xio3130 ports
Date: Tue, 15 Sep 2026 09:25:05 +0200 [thread overview]
Message-ID: <20260915072507.1230187-1-clg@redhat.com> (raw)
Hello,
The xio3130-downstream and x3130-upstream devices lacks x-speed and
x-width device properties, making it impossible to configure PCIe link
speed/width when building PIX switch topologies for GPU/NIC passthrough.
Fix that and preserve migration compatibility with a 2.5GT/s x1 default.
Thanks,
C.
Cédric Le Goater (2):
hw/pci-bridge: Add x-speed and x-width properties to
xio3130-downstream
hw/pci-bridge: Add x-speed and x-width properties to x3130-upstream
hw/core/machine.c | 4 ++++
hw/pci-bridge/xio3130_downstream.c | 5 +++++
hw/pci-bridge/xio3130_upstream.c | 28 +++++++++++++++++++++++++++-
3 files changed, 36 insertions(+), 1 deletion(-)
--
2.55.0
next reply other threads:[~2026-09-15 7:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 7:25 Cédric Le Goater [this message]
2026-09-15 7:25 ` [PATCH 1/2] hw/pci-bridge: Add x-speed and x-width properties to xio3130-downstream Cédric Le Goater
2026-09-15 7:25 ` [PATCH 2/2] hw/pci-bridge: Add x-speed and x-width properties to x3130-upstream Cédric Le Goater
2026-09-15 8:27 ` [PATCH 0/2] hw/pci-bridge: Add x-speed and x-width properties to xio3130 ports Cédric Le Goater
2026-09-15 10:01 ` Michael S. Tsirkin
2026-09-15 11:17 ` David Vrabel
2026-09-15 14:22 ` Michael S. Tsirkin
2026-09-15 15:36 ` Cédric Le Goater
2026-09-15 16:40 ` Michael S. Tsirkin
2026-09-16 9:40 ` David Vrabel
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