Re: [PATCH v6 18/18] drm/i915/alpm: Disallow ALPM for UHBR link rate

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/i915: ALPM and Panel Replay stay enabled with zeroed params on external DP UHBR
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commit 735fad731be8c8f544adf68949ae9f43b62606f2
Author: Animesh Manna <animesh.manna@intel.com>

drm/i915/alpm: Disallow ALPM for UHBR link rate

This commit attempts to reject ALPM parameter computation for external DP
running at a UHBR rate on NVL platforms. eDP is explicitly excluded from this
check to keep eDP ALPM working at all link rates.

> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 84777c8d31bb4..51805a6bca867 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -453,6 +453,12 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp,
>  	int precharge = intel_dp_aux_fw_sync_len(intel_dp) - preamble;
>  	u8 max_wake_lines;
>  
> +	/* DP2.1 ALPM is not supported on UHBR (128b/132b) link rates on NVL. */
> +	if (DISPLAY_VER(display) == 35 &&
> +	    !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
> +	    intel_dp_is_uhbr(crtc_state))
> +		return false;
> +

[Severity: High]
Does returning false here successfully prevent ALPM and Panel Replay from being
enabled on external DP?

Looking at _panel_replay_compute_config() in
drivers/gpu/drm/i915/display/intel_psr.c, there is an early return for non-eDP
displays:

    if (!intel_dp_is_edp(intel_dp))
        return true;

    /* Remaining checks are for eDP only */

    if (!crtc_state->has_alpm)
        return false;

Because of this early return, the failed ALPM parameter computation is bypassed
for external DP. Later in intel_sel_update_config_valid(), has_alpm is
unconditionally overwritten:

    crtc_state->has_alpm = intel_alpm_is_possible(intel_dp);
    return true;

Could this sequence leave ALPM and Panel Replay enabled with uninitialized
(zeroed) wake lines and times, potentially violating DP specifications and
preventing the external display from waking up correctly?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260915180449.277933-1-animesh.manna@intel.com?part=18