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From: sashiko-bot@kernel.org
To: "Bryan O'Donoghue" <bryan.odonoghue@linaro.org>
Cc: neil.armstrong@linaro.org, devicetree@vger.kernel.org,
	linux-phy@lists.infradead.org, robh@kernel.org,
	conor+dt@kernel.org, vkoul@kernel.org, olteanv@gmail.com,
	media-ci@linuxtv.org
Subject: Re: [PATCH v18 1/2] dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema
Date: Thu, 17 Sep 2026 00:05:37 +0000	[thread overview]
Message-ID: <20260917000537.EB7241F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260917-x1e-csi2-phy-v18-1-6515b5255fa9@linaro.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: phy: qcom: Incomplete constraints for DPHY split-mode
--

commit f4a95bb9fcce6ee77a3c3f8e0b0bc0bc538a0aa7
Author: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema

Add a base schema for the MIPI CSI2 PHYs on Qualcomm SoCs. The schema
supports both C-PHY and D-PHY modes, as well as a split-mode allowing two
sensors to be connected to one PHY.

> diff --git a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> new file mode 100644
> index 0000000000000..dc64af97da6c6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
[ ... ]
> +        allOf:
> +          - if:
> +              required:
> +                - endpoint@1
> +            then:
> +              properties:
> +                endpoint@0:
> +                  properties:
> +                    data-lanes:
> +                      maxItems: 2
> +                      items:
> +                        maximum: 2
> +                endpoint@1:
> +                  properties:
> +                    data-lanes:
> +                      items:
> +                        - const: 3

[Severity: Low]
Does this schema lack sufficient constraints for the split-mode endpoints?

The split-mode definition in properties.ports.properties.port@0.allOf appears
to be missing bus-type restrictions, clock-lanes constraints, and an explicit
maxItems restriction for endpoint@1. Without these, a misconfigured device
tree utilizing split-mode with an invalid bus-type, incorrect clock-lanes, or
extra data-lanes on endpoint@1 will pass dt-schema validation silently.

Could explicit constraints be added here to enforce the D-PHY bus-type,
restrict the clock-lanes positions, and strictly limit maxItems?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260917-x1e-csi2-phy-v18-0-6515b5255fa9@linaro.org?part=1

WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Bryan O'Donoghue" <bryan.odonoghue@linaro.org>
Cc: neil.armstrong@linaro.org, devicetree@vger.kernel.org,
	linux-phy@lists.infradead.org, robh@kernel.org,
	conor+dt@kernel.org, vkoul@kernel.org, olteanv@gmail.com,
	media-ci@linuxtv.org
Subject: Re: [PATCH v18 1/2] dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema
Date: Thu, 17 Sep 2026 00:05:37 +0000	[thread overview]
Message-ID: <20260917000537.EB7241F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260917-x1e-csi2-phy-v18-1-6515b5255fa9@linaro.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: phy: qcom: Incomplete constraints for DPHY split-mode
--

commit f4a95bb9fcce6ee77a3c3f8e0b0bc0bc538a0aa7
Author: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema

Add a base schema for the MIPI CSI2 PHYs on Qualcomm SoCs. The schema
supports both C-PHY and D-PHY modes, as well as a split-mode allowing two
sensors to be connected to one PHY.

> diff --git a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> new file mode 100644
> index 0000000000000..dc64af97da6c6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
[ ... ]
> +        allOf:
> +          - if:
> +              required:
> +                - endpoint@1
> +            then:
> +              properties:
> +                endpoint@0:
> +                  properties:
> +                    data-lanes:
> +                      maxItems: 2
> +                      items:
> +                        maximum: 2
> +                endpoint@1:
> +                  properties:
> +                    data-lanes:
> +                      items:
> +                        - const: 3

[Severity: Low]
Does this schema lack sufficient constraints for the split-mode endpoints?

The split-mode definition in properties.ports.properties.port@0.allOf appears
to be missing bus-type restrictions, clock-lanes constraints, and an explicit
maxItems restriction for endpoint@1. Without these, a misconfigured device
tree utilizing split-mode with an invalid bus-type, incorrect clock-lanes, or
extra data-lanes on endpoint@1 will pass dt-schema validation silently.

Could explicit constraints be added here to enforce the D-PHY bus-type,
restrict the clock-lanes positions, and strictly limit maxItems?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260917-x1e-csi2-phy-v18-0-6515b5255fa9@linaro.org?part=1

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2026-09-17  0:05 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16 23:58 [PATCH v18 0/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver Bryan O'Donoghue
2026-09-16 23:58 ` Bryan O'Donoghue
2026-09-16 23:58 ` [PATCH v18 1/2] dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema Bryan O'Donoghue
2026-09-16 23:58   ` Bryan O'Donoghue
2026-09-17  0:05   ` sashiko-bot [this message]
2026-09-17  0:05     ` sashiko-bot
2026-09-23  8:29   ` Krzysztof Kozlowski
2026-09-23  8:29     ` Krzysztof Kozlowski
2026-09-16 23:58 ` [PATCH v18 2/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver Bryan O'Donoghue
2026-09-16 23:58   ` Bryan O'Donoghue
2026-09-17  0:08   ` sashiko-bot
2026-09-17  0:08     ` sashiko-bot
2026-09-22 12:15   ` Neil Armstrong
2026-09-22 12:15     ` Neil Armstrong
2026-09-22 13:15   ` Manivannan Sadhasivam
2026-09-22 13:15     ` Manivannan Sadhasivam
2026-10-10  9:23   ` [RFC PATCH] phy: qcom-mipi-csi2: round the requested settle interval up fQwQf
2026-10-10  9:23     ` fQwQf
2026-10-10  9:33     ` sashiko-bot
2026-10-13  2:54     ` [RFC PATCH v2] " Jizhou Tong
2026-10-13  2:54       ` Jizhou Tong
2026-10-13  3:04       ` sashiko-bot
2026-09-23 12:35 ` [PATCH v18 0/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver Vinod Koul
2026-09-23 12:35   ` Vinod Koul

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