From: Devendra K Verma <devverma@amd.com>
To: <mani@kernel.org>, <vkoul@kernel.org>, <frank.li@kernel.org>,
<den@valinux.co.jp>
Cc: <dmaengine@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <michal.simek@amd.com>,
<devverma@amd.com>
Subject: [PATCH v2 0/2] Macro Ordering and Typo Correction
Date: Thu, 17 Sep 2026 16:00:48 +0530 [thread overview]
Message-ID: <20260917103050.1020982-1-devverma@amd.com> (raw)
These are minor and cosmetic changes.
o If the macros declaring the bit positions of a register
are in order then it provides a good view. Corrected
the ordering for once such register.
o Corrected the typo under the IP related data struct to
have the correct name under respective IP structs.
Previous reviewed-by tags were part of the following
review:
https://lore.kernel.org/all/aoW7vxy2lpXEbmRq@SMW015318/
https://lore.kernel.org/all/dx5jvko7ygrqugzkt3k74l3d7lk7iauikmxrzuhvn2b4bdv5ub@s2l6zl3alx3z/#t
Devendra K Verma (2):
dmaengine: dw-edma: Sort Register Field Macros by Bit Position
dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment
drivers/dma/dw-edma/dw-edma-pcie.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--
2.43.0
next reply other threads:[~2026-09-17 10:30 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 10:30 Devendra K Verma [this message]
2026-09-17 10:30 ` [PATCH v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position Devendra K Verma
2026-09-17 10:33 ` sashiko-bot
2026-09-17 15:55 ` Frank Li
2026-10-05 14:19 ` Vinod Koul
2026-10-07 10:01 ` Verma, Devendra
2026-09-17 10:30 ` [PATCH v2 2/2] dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment Devendra K Verma
2026-09-17 10:32 ` sashiko-bot
2026-09-17 15:56 ` Frank Li
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