From: Vinod Koul <vkoul@kernel.org>
To: Devendra K Verma <devverma@amd.com>
Cc: mani@kernel.org, frank.li@kernel.org, den@valinux.co.jp,
dmaengine@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, michal.simek@amd.com
Subject: Re: [PATCH v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position
Date: Mon, 5 Oct 2026 16:19:23 +0200 [thread overview]
Message-ID: <asOx6y7hiVrEUNGa@parshuram> (raw)
In-Reply-To: <20260917103050.1020982-2-devverma@amd.com>
On 17-09-26, 16:00, Devendra K Verma wrote:
> Sort register field macros by bit position to improve readability.
> No functional change.
This fails on current code and needs a bit more sorting.
>
> Signed-off-by: Devendra K Verma <devverma@amd.com>
> ---
> Changes in v1:
> o Corrected heading and body as per reviewer's suggestion
> ---
> drivers/dma/dw-edma/dw-edma-pcie.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
> index 9f237ba916de..006dea7d6322 100644
> --- a/drivers/dma/dw-edma/dw-edma-pcie.c
> +++ b/drivers/dma/dw-edma/dw-edma-pcie.c
> @@ -31,8 +31,8 @@
>
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_ID 0x6
> #define DW_PCIE_XILINX_MDB_VSEC_ID 0x20
> -#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR GENMASK(10, 8)
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_MAP GENMASK(2, 0)
> +#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR GENMASK(10, 8)
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_WR_CH GENMASK(9, 0)
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_RD_CH GENMASK(25, 16)
>
> --
> 2.43.0
--
~Vinod
next prev parent reply other threads:[~2026-10-05 14:19 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 10:30 [PATCH v2 0/2] Macro Ordering and Typo Correction Devendra K Verma
2026-09-17 10:30 ` [PATCH v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position Devendra K Verma
2026-09-17 10:33 ` sashiko-bot
2026-09-17 15:55 ` Frank Li
2026-10-05 14:19 ` Vinod Koul [this message]
2026-10-07 10:01 ` Verma, Devendra
2026-09-17 10:30 ` [PATCH v2 2/2] dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment Devendra K Verma
2026-09-17 10:32 ` sashiko-bot
2026-09-17 15:56 ` Frank Li
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