All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Kyle Switch" <kyle.switch@motor-comm.com>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH net-next v19 2/3] net: phy: Add support for Template Control register for PMA
Date: Thu, 17 Sep 2026 11:00:53 +0000	[thread overview]
Message-ID: <20260917110054.5185A1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260916105504.3262767-3-kyle.switch@motor-comm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] uapi: use of kernel-internal GENMASK in UAPI header
--

commit ccf2fd652b5c489e327ab08ec390f834e2c1b18b
Author: Kyle Switch <kyle.switch@motor-comm.com>

net: phy: Add support for Template Control register for PMA

This patch adds support for the 10GBASE-T PMA Template Test Mode register
field. It introduces standard MDIO macros and helper functions to select
one of eight test modes used for PHY validation.

> diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
> index 06f4bc3c20c71..353ca13c64fca 100644
> --- a/include/uapi/linux/mdio.h
> +++ b/include/uapi/linux/mdio.h

[ ... ]

> @@ -320,6 +321,17 @@
>  /* PMA 10GBASE-R Fast Retrain status and control register. */
>  #define MDIO_PMA_10GBR_FSRT_ENABLE	0x0001	/* Fast retrain enable */
>  
> +/* PMA 10GBASE-T Template Test Mode Register*/
> +#define MDIO_PMA_10GBT_TESTMODE_MASK GENMASK(15, 13) /* Template test mode */

[Severity: Medium]
Will this macro break compilation for userspace applications?

GENMASK is a kernel-internal macro defined in <linux/bits.h> and is not
exported to userspace. Any userspace program attempting to include this UAPI
header and use MDIO_PMA_10GBT_TESTMODE_MASK will fail to compile due to an
undefined macro.

Could this be changed to use __GENMASK() or a hardcoded hexadecimal value
instead to ensure it is safe for userspace consumption?

> +#define MDIO_PMA_10GBT_TESTMODE_NORMAL 0x0 /* Template Normal */
> +#define MDIO_PMA_10GBT_TESTMODE_1 0x1 /* Template TestMode1 */
> +#define MDIO_PMA_10GBT_TESTMODE_2 0x2 /* Template TestMode2 */

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260916105504.3262767-1-kyle.switch@motor-comm.com?part=2

  reply	other threads:[~2026-09-17 11:00 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16 10:55 [PATCH net-next v19 0/3] net: phy: Add driver for Motorcomm Quad 2.5GbE phy Kyle Switch
2026-09-16 10:55 ` [PATCH net-next v19 1/3] dt-bindings: net: Document Motorcomm YT8824 PHY package Kyle Switch
2026-09-16 15:22   ` Rob Herring (Arm)
2026-09-17 11:00   ` sashiko-bot
2026-09-16 10:55 ` [PATCH net-next v19 2/3] net: phy: Add support for Template Control register for PMA Kyle Switch
2026-09-17 11:00   ` sashiko-bot [this message]
2026-09-16 10:55 ` [PATCH net-next v19 3/3] net: phy: Add driver for Motorcomm Quad 2.5GbE phy Kyle Switch

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260917110054.5185A1F000FF@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=kyle.switch@motor-comm.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.