From: sashiko-bot@kernel.org
To: "Sean Christopherson" <seanjc@google.com>
Cc: linux-perf-users@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v4 01/10] perf/x86/intel: Ensure guest PEBS path doesn't set unwanted PERF_GLOBAL_CTRL bits
Date: Mon, 21 Sep 2026 19:22:39 +0000 [thread overview]
Message-ID: <20260921192239.C1C151F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260921191418.950933-2-seanjc@google.com>
> When reinstating PEBS counters into PERF_GLOBAL_CTRL for a KVM guest, mask
> the value with perf's desired/original PERF_GLOBAL_CTRL value to ensure
> KVM doesn't unintentionally set reserved bits in PERF_GLOBAL_CTRL. E.g.
> if the guest's PEBS_ENABLE value had bit 63, "Enable Precise Store", set,
> then using the raw guest PEBS value would propagate bit 63 to the guest's
> PERF_GLOBAL_CTRL value (which thankfully would be a failed VM-Entry, not
> a VMX Abort).
>
> The only reason this bug isn't reachable is because KVM doesn't support
> "Enable Precise Store" (which is probably a KVM bug?), i.e. bit 63 can't
> be set in kvm_pmu->pebs_enable and thus not in arr[pebs_enable].guest. In
> other words, this _should_ be a glorified nop in the current code base.
>
> Fixes: c59a1f106f5c ("KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR emulation for extended PEBS")
> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260921191418.950933-1-seanjc@google.com?part=1
next prev parent reply other threads:[~2026-09-21 19:22 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 19:14 [PATCH v4 00/10] perf/x86: Don't write PEBS_ENABLED on KVM transitions Sean Christopherson
2026-09-21 19:14 ` [PATCH v4 01/10] perf/x86/intel: Ensure guest PEBS path doesn't set unwanted PERF_GLOBAL_CTRL bits Sean Christopherson
2026-09-21 19:22 ` sashiko-bot [this message]
2026-09-21 19:14 ` [PATCH v4 02/10] perf/x86/intel: Don't write PEBS_ENABLED on host<=>guest xfers if CPU has isolation Sean Christopherson
2026-09-21 19:28 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 03/10] perf/x86/intel: Don't context switch DS_AREA (and PEBS config) if PEBS is unused Sean Christopherson
2026-09-21 19:24 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 04/10] perf/x86/intel: Make @data a mandatory param for intel_guest_get_msrs() Sean Christopherson
2026-09-21 19:20 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 05/10] perf/x86/intel: Invert names of intel_ctrl_{guest,host}_mask Sean Christopherson
2026-09-21 19:19 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 06/10] perf/x86: KVM: Have perf define a dedicated struct for getting guest PEBS data Sean Christopherson
2026-09-21 19:23 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 07/10] perf/x86/intel: KVM: Handle cross-mapped PEBS PMCs entirely within KVM Sean Christopherson
2026-09-21 19:28 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 08/10] KVM: VMX: Drop a redundant pmu->global_ctrl check when processing pebs_enable Sean Christopherson
2026-09-21 19:22 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 09/10] KVM: VMX: Only tell perf to enable PEBS counters for fully enabled PMCs Sean Christopherson
2026-09-21 19:26 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 10/10] perf/x86/intel: Check only PMC bits in PEBS_ENABLED when detecting host PEBS usage Sean Christopherson
2026-09-21 19:25 ` sashiko-bot
2026-09-22 1:03 ` Mi, Dapeng
2026-09-22 8:30 ` [PATCH v4 00/10] perf/x86: Don't write PEBS_ENABLED on KVM transitions Peter Zijlstra
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