From: sashiko-bot@kernel.org
To: "Sean Christopherson" <seanjc@google.com>
Cc: linux-perf-users@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v4 02/10] perf/x86/intel: Don't write PEBS_ENABLED on host<=>guest xfers if CPU has isolation
Date: Mon, 21 Sep 2026 19:28:20 +0000 [thread overview]
Message-ID: <20260921192820.906781F00899@smtp.kernel.org> (raw)
In-Reply-To: <20260921191418.950933-3-seanjc@google.com>
> When filling the list of MSRs to be loaded by KVM on VM-Enter and VM-Exit,
> *never* insert an entry for PEBS_ENABLED if the CPU properly isolates PEBS
> events, in which case disabling counters via PERF_GLOBAL_CTRL is sufficient
> to prevent unwanted PEBS events in the guest (or host). Because perf loads
> PEBS_ENABLE with the unfiltered cpu_hw_events.pebs_enabled, i.e. with both
> host and guest masks, there is no need to load different values for the
> guest versus host, perf+KVM can and should simply control which counters
> are enabled/disabled via PERF_GLOBAL_CTRL.
>
> Avoiding touching PEBS_ENABLED "fixes" a bug where PEBS_ENABLED can end up
> with "stuck" bits if a PEBS event is throttled between generating the list
> and actually entering the guest (Intel CPUs can't arbtitrarily block NMIs).
> Fixes in quotes because leaving PEBS_ENABLED as-is doesn't fix the
> underlying problem of perf (via PMIs) being able to modify state after the
> perf<=>KVM handoff.
> [ ... ]
> Cc: Jim Mattson <jmattson@google.com>
> Cc: Mingwei Zhang <mizhang@google.com>
> Cc: Stephane Eranian <eranian@google.com>
> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260921191418.950933-1-seanjc@google.com?part=2
next prev parent reply other threads:[~2026-09-21 19:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 19:14 [PATCH v4 00/10] perf/x86: Don't write PEBS_ENABLED on KVM transitions Sean Christopherson
2026-09-21 19:14 ` [PATCH v4 01/10] perf/x86/intel: Ensure guest PEBS path doesn't set unwanted PERF_GLOBAL_CTRL bits Sean Christopherson
2026-09-21 19:22 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 02/10] perf/x86/intel: Don't write PEBS_ENABLED on host<=>guest xfers if CPU has isolation Sean Christopherson
2026-09-21 19:28 ` sashiko-bot [this message]
2026-09-21 19:14 ` [PATCH v4 03/10] perf/x86/intel: Don't context switch DS_AREA (and PEBS config) if PEBS is unused Sean Christopherson
2026-09-21 19:24 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 04/10] perf/x86/intel: Make @data a mandatory param for intel_guest_get_msrs() Sean Christopherson
2026-09-21 19:20 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 05/10] perf/x86/intel: Invert names of intel_ctrl_{guest,host}_mask Sean Christopherson
2026-09-21 19:19 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 06/10] perf/x86: KVM: Have perf define a dedicated struct for getting guest PEBS data Sean Christopherson
2026-09-21 19:23 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 07/10] perf/x86/intel: KVM: Handle cross-mapped PEBS PMCs entirely within KVM Sean Christopherson
2026-09-21 19:28 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 08/10] KVM: VMX: Drop a redundant pmu->global_ctrl check when processing pebs_enable Sean Christopherson
2026-09-21 19:22 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 09/10] KVM: VMX: Only tell perf to enable PEBS counters for fully enabled PMCs Sean Christopherson
2026-09-21 19:26 ` sashiko-bot
2026-09-21 19:14 ` [PATCH v4 10/10] perf/x86/intel: Check only PMC bits in PEBS_ENABLED when detecting host PEBS usage Sean Christopherson
2026-09-21 19:25 ` sashiko-bot
2026-09-22 1:03 ` Mi, Dapeng
2026-09-22 8:30 ` [PATCH v4 00/10] perf/x86: Don't write PEBS_ENABLED on KVM transitions Peter Zijlstra
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