* [PATCH v2 0/2] Add BWMON support for Nord SoC @ 2026-09-24 7:32 Shawn Guo 2026-09-24 7:32 ` [PATCH v2 1/2] dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible Shawn Guo 2026-09-24 7:32 ` [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord Shawn Guo 0 siblings, 2 replies; 5+ messages in thread From: Shawn Guo @ 2026-09-24 7:32 UTC (permalink / raw) To: Bjorn Andersson Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Georgi Djakov, Bartosz Golaszewski, Zhangfei Gao, Pushpendra Singh, devicetree, linux-arm-msm, linux-kernel, Shawn Guo The series adds BWMON support for Nord SoC by documenting the compatible and adding DTS nodes. Georgi's Acked-by on the binding suggests that we can apply it via soc tree. Changes for v2: - Fix "reg" length to be 0x500 for all three bwmon nodes (Thanks Konrad!) - Combine bindging and DTS as one series - Link to v1: https://lore.kernel.org/all/20260831090134.585588-1-zhangfei.gao@oss.qualcomm.com/ https://lore.kernel.org/all/20260922080416.484280-1-shengchao.guo@oss.qualcomm.com/ Pushpendra Singh (1): arm64: dts: qcom: nord: Add bwmon node for Nord Zhangfei Gao (1): dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible .../interconnect/qcom,msm8998-bwmon.yaml | 1 + arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 21 ++++++ arch/arm64/boot/dts/qcom/nord.dtsi | 67 +++++++++++++++++++ 3 files changed, 89 insertions(+) -- 2.43.0 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/2] dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible 2026-09-24 7:32 [PATCH v2 0/2] Add BWMON support for Nord SoC Shawn Guo @ 2026-09-24 7:32 ` Shawn Guo 2026-09-24 12:25 ` Bartosz Golaszewski 2026-09-24 7:32 ` [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord Shawn Guo 1 sibling, 1 reply; 5+ messages in thread From: Shawn Guo @ 2026-09-24 7:32 UTC (permalink / raw) To: Bjorn Andersson Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Georgi Djakov, Bartosz Golaszewski, Zhangfei Gao, Pushpendra Singh, devicetree, linux-arm-msm, linux-kernel, Krzysztof Kozlowski From: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com> Document the qcom,nord-cpu-bwmon fallback compatible used by the CPU bandwidth monitors on Nord. Signed-off-by: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Georgi Djakov <djakov@kernel.org> --- .../devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index f6969910bded..3db61c38e2e7 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -30,6 +30,7 @@ properties: - qcom,hawi-cpu-bwmon - qcom,kaanapali-cpu-bwmon - qcom,maili-cpu-bwmon + - qcom,nord-cpu-bwmon - qcom,qcm2290-cpu-bwmon - qcom,qcs615-cpu-bwmon - qcom,qcs8300-cpu-bwmon -- 2.43.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible 2026-09-24 7:32 ` [PATCH v2 1/2] dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible Shawn Guo @ 2026-09-24 12:25 ` Bartosz Golaszewski 0 siblings, 0 replies; 5+ messages in thread From: Bartosz Golaszewski @ 2026-09-24 12:25 UTC (permalink / raw) To: Shawn Guo Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Georgi Djakov, Bartosz Golaszewski, Zhangfei Gao, Pushpendra Singh, devicetree, linux-arm-msm, linux-kernel, Krzysztof Kozlowski, Bjorn Andersson On Thu, 24 Sep 2026 09:32:21 +0200, Shawn Guo <shengchao.guo@oss.qualcomm.com> said: > From: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com> > > Document the qcom,nord-cpu-bwmon fallback compatible used by the > CPU bandwidth monitors on Nord. > > Signed-off-by: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> > Acked-by: Georgi Djakov <djakov@kernel.org> > --- Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord 2026-09-24 7:32 [PATCH v2 0/2] Add BWMON support for Nord SoC Shawn Guo 2026-09-24 7:32 ` [PATCH v2 1/2] dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible Shawn Guo @ 2026-09-24 7:32 ` Shawn Guo 2026-09-24 7:43 ` sashiko-bot 1 sibling, 1 reply; 5+ messages in thread From: Shawn Guo @ 2026-09-24 7:32 UTC (permalink / raw) To: Bjorn Andersson Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Georgi Djakov, Bartosz Golaszewski, Zhangfei Gao, Pushpendra Singh, devicetree, linux-arm-msm, linux-kernel, Bartosz Golaszewski, Konrad Dybcio, Shawn Guo From: Pushpendra Singh <pussin@qti.qualcomm.com> Add BWMON nodes and associated OPP tables to enable dynamic DDR/LLCC frequency scaling. The compatible is added in nord-embedded.dtsi rather than nord.dtsi, because Embedded variant specific 'interconnects' is required by the compatible. Co-developed-by: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com> Signed-off-by: Pushpendra Singh <pussin@qti.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 21 +++++++ arch/arm64/boot/dts/qcom/nord.dtsi | 67 +++++++++++++++++++++ 2 files changed, 88 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi index 568fe68cd185..c27d01a82214 100644 --- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi +++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi @@ -30,6 +30,27 @@ mc_virt: interconnect-mc-virt { }; }; +&bwmon_cluster0 { + compatible = "qcom,nord-cpu-bwmon", + "qcom,sdm845-bwmon"; + interconnects = <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>; +}; + +&bwmon_cluster1 { + compatible = "qcom,nord-cpu-bwmon", + "qcom,sdm845-bwmon"; + interconnects = <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>; +}; + +&bwmon_cluster2 { + compatible = "qcom,nord-cpu-bwmon", + "qcom,sdm845-bwmon"; + interconnects = <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>; +}; + &crypto { interconnects = <&aggre1_noc_tile MASTER_CRYPTO_CORE0 QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi index e0496fd40c30..4c3504b2a233 100644 --- a/arch/arm64/boot/dts/qcom/nord.dtsi +++ b/arch/arm64/boot/dts/qcom/nord.dtsi @@ -1460,6 +1460,73 @@ uart13: serial@a98000 { }; }; + bwmon_cluster2: pmu@1014400 { + reg = <0x0 0x01014400 0x0 0x500>; + interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>; + operating-points-v2 = <&bwmon_cluster_opp_table>; + }; + + bwmon_cluster1: pmu@1015400 { + reg = <0x0 0x01015400 0x0 0x500>; + interrupts = <GIC_SPI 812 IRQ_TYPE_LEVEL_HIGH>; + operating-points-v2 = <&bwmon_cluster_opp_table>; + }; + + bwmon_cluster0: pmu@1016400 { + reg = <0x0 0x01016400 0x0 0x500>; + interrupts = <GIC_SPI 813 IRQ_TYPE_LEVEL_HIGH>; + + operating-points-v2 = <&bwmon_cluster_opp_table>; + + bwmon_cluster_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-0 { + opp-peak-kBps = <800000>; + }; + + opp-1 { + opp-peak-kBps = <2188800>; + }; + + opp-2 { + opp-peak-kBps = <5414400>; + }; + + opp-3 { + opp-peak-kBps = <6220800>; + }; + + opp-4 { + opp-peak-kBps = <6835200>; + }; + + opp-5 { + opp-peak-kBps = <7603200>; + }; + + opp-6 { + opp-peak-kBps = <8371200>; + }; + + opp-7 { + opp-peak-kBps = <9657600>; + }; + + opp-8 { + opp-peak-kBps = <10944000>; + }; + + opp-9 { + opp-peak-kBps = <12748800>; + }; + + opp-10 { + opp-peak-kBps = <14745600>; + }; + }; + }; + rng: rng@10c3000 { compatible = "qcom,nord-trng", "qcom,trng"; -- 2.43.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord 2026-09-24 7:32 ` [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord Shawn Guo @ 2026-09-24 7:43 ` sashiko-bot 0 siblings, 0 replies; 5+ messages in thread From: sashiko-bot @ 2026-09-24 7:43 UTC (permalink / raw) To: Shawn Guo; +Cc: conor+dt, robh, devicetree Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] dt: qcom: nord: BWMON nodes lack compatible and are not disabled in base dtsi -- commit 675cbf4793d6f43a6d3c3f98ae9f6537235567fc Author: Pushpendra Singh <pussin@qti.qualcomm.com> arm64: dts: qcom: nord: Add bwmon node for Nord This commit adds BWMON nodes and associated OPP tables for dynamic DDR/LLCC frequency scaling. The compatible strings and interconnect properties are added in the nord-embedded.dtsi variant file. > diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi > index e0496fd40c308..4c3504b2a233b 100644 > --- a/arch/arm64/boot/dts/qcom/nord.dtsi > +++ b/arch/arm64/boot/dts/qcom/nord.dtsi [ ... ] > @@ -1460,6 +1460,73 @@ uart13: serial@a98000 { > }; > }; > > + bwmon_cluster2: pmu@1014400 { > + reg = <0x0 0x01014400 0x0 0x500>; > + interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>; > + operating-points-v2 = <&bwmon_cluster_opp_table>; > + }; > + > + bwmon_cluster1: pmu@1015400 { > + reg = <0x0 0x01015400 0x0 0x500>; > + interrupts = <GIC_SPI 812 IRQ_TYPE_LEVEL_HIGH>; > + operating-points-v2 = <&bwmon_cluster_opp_table>; > + }; > + > + bwmon_cluster0: pmu@1016400 { > + reg = <0x0 0x01016400 0x0 0x500>; > + interrupts = <GIC_SPI 813 IRQ_TYPE_LEVEL_HIGH>; [Severity: Low] Since bwmon_cluster0, bwmon_cluster1, and bwmon_cluster2 omit the 'compatible' string here to wait for variant-specific interconnects, should they be marked with 'status = "disabled";' in this base dtsi? If they remain enabled, won't they unconditionally instantiate as incomplete dead nodes in the final DTB for any other board (such as nord-gearvm.dtsi) that includes nord.dtsi without appending a compatible string? Base SoC nodes awaiting variant properties typically need to be disabled by default or located entirely within the variant include to satisfy DT schema validation. [ ... ] -- Sashiko AI review · https://sashiko.dev/#/patchset/20260924073222.1000666-1-shengchao.guo@oss.qualcomm.com?part=2 ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-09-24 12:25 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-09-24 7:32 [PATCH v2 0/2] Add BWMON support for Nord SoC Shawn Guo 2026-09-24 7:32 ` [PATCH v2 1/2] dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible Shawn Guo 2026-09-24 12:25 ` Bartosz Golaszewski 2026-09-24 7:32 ` [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord Shawn Guo 2026-09-24 7:43 ` sashiko-bot
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