All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Karthik Poosa" <karthik.poosa@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH i-g-t v4 11/13] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754
Date: Thu, 24 Sep 2026 11:22:36 +0000	[thread overview]
Message-ID: <20260924112236.F1FEC1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260924105000.2627929-12-karthik.poosa@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] hwmon: Incorrect IEEE-754 decoding applied to CHANNEL_VRAM_N
--

commit 4017413f8095f651034d897f32ec30cb3740f4f1
Author: Karthik Poosa <karthik.poosa@intel.com>

drm/xe/hwmon: Decode CRI temperature registers as IEEE-754

This commit decodes the package and VRAM temperature registers for Crescent
Island platforms as IEEE-754 floating-point values instead of the previous
fixed-point formats. It implements integer-based decoding to be exposed through
hwmon.

> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index e1cff5700e7f9..c411cd375aa1b 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
[ ... ]
> @@ -1249,26 +1312,27 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>  	switch (attr) {
>  	case hwmon_temp_input:
>  		switch (channel) {
[ ... ]
> +		case CHANNEL_PKG:
> +		case CHANNEL_VRAM:
>  		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>  			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
> -			/*
> -			 * This temperature format is 24 bit [31:8] signed integer and 8 bit
> -			 * [7:0] fraction.
> -			 */
> -			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
> -				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
> -				 MILLIDEGREE_PER_DEGREE;
> +			if (hwmon->xe->info.platform >= XE_CRESCENTISLAND) {
> +				return xe_hwmon_temperature_decode((u32)reg_val, val);

[Severity: Medium]
Will this incorrectly apply IEEE-754 decoding to CHANNEL_VRAM_N registers on
Crescent Island?

Looking at xe_hwmon_get_reg(), when the platform is XE_CRESCENTISLAND,
CHANNEL_VRAM_N still maps to the legacy BMG_VRAM_TEMPERATURE_N:

drivers/gpu/drm/xe/xe_hwmon.c:xe_hwmon_get_reg() {
	...
	case REG_TEMP:
		if (xe->info.platform == XE_CRESCENTISLAND) {
			if (channel == CHANNEL_PKG)
				return CRI_PACKAGE_TEMPERATURE;
			else if (channel == CHANNEL_VRAM)
				return CRI_VRAM_TEMPERATURE;
			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count) &&
				 xe_hwmon_vram_channel_enabled(hwmon, channel - CHANNEL_VRAM_N))
				return BMG_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
	...
}

Since BMG_VRAM_TEMPERATURE_N uses a 24.8 fixed-point format, decoding it as
IEEE-754 will cause the exponent bits to evaluate to 0 for most normal
temperatures. This could result in the function returning 0 degrees instead of
the correct value.

Should CHANNEL_VRAM_N bypass the IEEE-754 decoding even on Crescent Island?

> +			} else if (channel >= CHANNEL_VRAM_N) {
> +				/*
> +				 * This temperature format is 24 bit [31:8] signed integer and 8 bit
> +				 * [7:0] fraction for platforms before CRI.
> +				 */
> +				*val = (s32)REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val) *
> +					(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
> +					MILLIDEGREE_PER_DEGREE;
> +			} else {
> +				*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
> +			}
>  			return 0;
>  		default:
>  			return -EOPNOTSUPP;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260924105000.2627929-1-karthik.poosa@intel.com?part=11

  reply	other threads:[~2026-09-24 11:22 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-24 10:49 [PATCH i-g-t v4 00/13] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 01/13] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-09-24 11:03   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 02/13] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 03/13] drm/xe/hwmon: Fix memory controller thermal data handling Karthik Poosa
2026-09-24 11:02   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 04/13] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 05/13] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 06/13] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 07/13] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 08/13] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 09/13] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-09-24 11:21   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 10/13] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-09-24 11:25   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 11/13] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-09-24 11:22   ` sashiko-bot [this message]
2026-09-24 10:49 ` [PATCH i-g-t v4 12/13] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-09-24 10:50 ` [PATCH i-g-t v4 13/13] drm/xe/hwmon: Update PCIE temperature sensor " Karthik Poosa
2026-09-24 11:00 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox Patchwork
2026-09-24 12:13 ` ✓ Xe.CI.BAT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260924112236.F1FEC1F000FF@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=karthik.poosa@intel.com \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.