From: sashiko-bot@kernel.org
To: "Igor Velkov" <iav@iav.lv>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: Add buttons to Kobol Helios64
Date: Wed, 30 Sep 2026 03:00:33 +0000 [thread overview]
Message-ID: <20260930030034.3099C1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260930-helios64-buttons-v1-1-d76249064003@iav.lv>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] dts: rockchip: floating User1 button causes interrupt storms
--
commit a839eb665d8bc992ebe29b10a50a8b7e57d5f4f5
Author: Igor Velkov <iav@iav.lv>
arm64: dts: rockchip: Add buttons to Kobol Helios64
The commit adds gpio-keys and adc-keys for the Power, User1, and Recovery
buttons on the Kobol Helios64 board. It also adds the vcc1v8_s3 regulator
reference for the SARADC.
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
> index b2de018a7d363..d146e5075b4f8 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
[ ... ]
> @@ -68,6 +83,27 @@ fan2 {
> cooling-levels = <0 80 170 255>;
> };
>
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwr_btn &user1_btn>;
> +
> + button-power {
> + debounce-interval = <100>;
> + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
> + label = "Power";
> + linux,code = <KEY_POWER>;
> + wakeup-source;
> + };
> +
> + button-user1 {
> + debounce-interval = <100>;
> + gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
> + label = "User Button 1";
> + linux,code = <BTN_0>;
> + };
> + };
[ ... ]
> @@ -434,6 +483,16 @@ &pcie0 {
> };
>
> &pinctrl {
> + buttons {
> + pwr_btn: pwr-btn {
> + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + user1_btn: user1-btn {
> + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
[Severity: High]
Since the user1 button GPIO (RK_PA3) is registered in gpio-keys as
GPIO_ACTIVE_LOW to generate edge interrupts, does disabling the internal pull-up
with &pcfg_pull_none leave the pin floating?
The commit message notes "User1 has no button on the enclosure and is
untested", meaning the pin is unconnected. Without an internal or external
pull-up, a floating pin will pick up ambient electromagnetic noise and cross the
logic threshold randomly, continuously generating spurious BTN_0 events.
Can this cause interrupt storms that degrade system performance or lead to
unresponsiveness?
Should the pinctrl configuration use &pcfg_pull_up here to prevent the pin from
floating, or should the node remain disabled by default?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260930-helios64-buttons-v1-1-d76249064003@iav.lv?part=1
next prev parent reply other threads:[~2026-09-30 3:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 2:52 [PATCH] arm64: dts: rockchip: Add buttons to Kobol Helios64 Igor Velkov via B4 Relay
2026-09-30 2:52 ` Igor Velkov via B4 Relay
2026-09-30 2:52 ` Igor Velkov
2026-09-30 3:00 ` sashiko-bot [this message]
2026-09-30 3:23 ` Igor Velkov
2026-09-30 3:23 ` Igor Velkov
2026-10-04 21:17 ` Heiko Stuebner
2026-10-04 21:17 ` Heiko Stuebner
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