From: Igor Velkov <iav@iav.lv>
To: sashiko-reviews@lists.linux.dev
Cc: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: Add buttons to Kobol Helios64
Date: Wed, 30 Sep 2026 03:23:07 +0000 [thread overview]
Message-ID: <20260930032307.4ab95783e5ff@iav.lv> (raw)
In-Reply-To: <20260930030034.3099C1F000FF@smtp.kernel.org>
On Wed, Sep 30, 2026 at 03:00:34AM +0000, sashiko-bot@kernel.org wrote:
> Since the user1 button GPIO (RK_PA3) is registered in gpio-keys as
> GPIO_ACTIVE_LOW to generate edge interrupts, does disabling the internal pull-up
> with &pcfg_pull_none leave the pin floating?
Not floating: GPIO0_A3 (USR1_SWITCH#) has an external 4.75k pull-up
(R9) to 1V8_S3 on the SoC side of D11, sheet 29 of
https://wiki.kobol.io/helios64/files/schematics/Helios64_Schematics_Rev1.2.pdf
Armbian ships the same pinctrl; with no User1 button attached the
IRQ count stays 0 after 29 minutes of uptime.
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Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Igor Velkov <iav@iav.lv>
To: sashiko-reviews@lists.linux.dev
Cc: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: Add buttons to Kobol Helios64
Date: Wed, 30 Sep 2026 03:23:07 +0000 [thread overview]
Message-ID: <20260930032307.4ab95783e5ff@iav.lv> (raw)
In-Reply-To: <20260930030034.3099C1F000FF@smtp.kernel.org>
On Wed, Sep 30, 2026 at 03:00:34AM +0000, sashiko-bot@kernel.org wrote:
> Since the user1 button GPIO (RK_PA3) is registered in gpio-keys as
> GPIO_ACTIVE_LOW to generate edge interrupts, does disabling the internal pull-up
> with &pcfg_pull_none leave the pin floating?
Not floating: GPIO0_A3 (USR1_SWITCH#) has an external 4.75k pull-up
(R9) to 1V8_S3 on the SoC side of D11, sheet 29 of
https://wiki.kobol.io/helios64/files/schematics/Helios64_Schematics_Rev1.2.pdf
Armbian ships the same pinctrl; with no User1 button attached the
IRQ count stays 0 after 29 minutes of uptime.
next prev parent reply other threads:[~2026-09-30 3:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 2:52 [PATCH] arm64: dts: rockchip: Add buttons to Kobol Helios64 Igor Velkov via B4 Relay
2026-09-30 2:52 ` Igor Velkov via B4 Relay
2026-09-30 2:52 ` Igor Velkov
2026-09-30 3:00 ` sashiko-bot
2026-09-30 3:23 ` Igor Velkov [this message]
2026-09-30 3:23 ` Igor Velkov
2026-10-04 21:17 ` Heiko Stuebner
2026-10-04 21:17 ` Heiko Stuebner
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