From: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
To: dri-devel@lists.freedesktop.org
Cc: oded.gabbay@gmail.com, jeff.hugo@oss.qualcomm.com,
karol.wachowski@linux.intel.com, lizhi.hou@amd.com,
dawid.osuchowski@linux.intel.com,
Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
Subject: [PATCH] accel/ivpu: Drop MTL interrupt clear-with-zero workaround
Date: Wed, 30 Sep 2026 18:03:48 +0200 [thread overview]
Message-ID: <20260930160348.1562800-1-andrzej.kacprowski@linux.intel.com> (raw)
Early MTL steppings needed a runtime check for BTRS interrupt status
registers that cleared by writing 0 instead of the usual write-1-to-clear
flow.
Those pre-production steppings are no longer supported. Remove the
workaround flag, probe helper, and conditional IRQ clear path, and always
clear handled MTL BTRS interrupt status bits by writing the interrupt
status value.
Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
---
drivers/accel/ivpu/ivpu_drv.h | 1 -
drivers/accel/ivpu/ivpu_hw.c | 4 ----
drivers/accel/ivpu/ivpu_hw_btrs.c | 24 +-----------------------
drivers/accel/ivpu/ivpu_hw_btrs.h | 1 -
4 files changed, 1 insertion(+), 29 deletions(-)
diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
index 86d7c9966cac..210f723cf251 100644
--- a/drivers/accel/ivpu/ivpu_drv.h
+++ b/drivers/accel/ivpu/ivpu_drv.h
@@ -110,7 +110,6 @@
struct ivpu_wa_table {
bool punit_disabled;
bool clear_runtime_mem;
- bool interrupt_clear_with_0;
bool disable_clock_relinquish;
bool wp0_during_power_up;
bool disable_d0i2;
diff --git a/drivers/accel/ivpu/ivpu_hw.c b/drivers/accel/ivpu/ivpu_hw.c
index 647dc045c231..c039eee501ae 100644
--- a/drivers/accel/ivpu/ivpu_hw.c
+++ b/drivers/accel/ivpu/ivpu_hw.c
@@ -67,9 +67,6 @@ static void wa_init(struct ivpu_device *vdev)
vdev->wa.punit_disabled = false;
vdev->wa.clear_runtime_mem = false;
- if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL)
- vdev->wa.interrupt_clear_with_0 = ivpu_hw_btrs_irqs_clear_with_0_mtl(vdev);
-
if ((ivpu_device_id(vdev) == PCI_DEVICE_ID_LNL &&
ivpu_revision(vdev) < IVPU_HW_IP_REV_LNL_B0) ||
(ivpu_device_id(vdev) == PCI_DEVICE_ID_NVL &&
@@ -90,7 +87,6 @@ static void wa_init(struct ivpu_device *vdev)
IVPU_PRINT_WA(punit_disabled);
IVPU_PRINT_WA(clear_runtime_mem);
- IVPU_PRINT_WA(interrupt_clear_with_0);
IVPU_PRINT_WA(disable_clock_relinquish);
IVPU_PRINT_WA(wp0_during_power_up);
IVPU_PRINT_WA(disable_d0i2);
diff --git a/drivers/accel/ivpu/ivpu_hw_btrs.c b/drivers/accel/ivpu/ivpu_hw_btrs.c
index a17c829adb89..2f4f5156d62e 100644
--- a/drivers/accel/ivpu/ivpu_hw_btrs.c
+++ b/drivers/accel/ivpu/ivpu_hw_btrs.c
@@ -24,9 +24,6 @@
(REG_FLD(VPU_HW_BTRS_LNL_INTERRUPT_STAT, IMR1_ERR)) | \
(REG_FLD(VPU_HW_BTRS_LNL_INTERRUPT_STAT, SURV_ERR)))
-#define BTRS_MTL_ALL_IRQ_MASK (BTRS_MTL_IRQ_MASK | (REG_FLD(VPU_HW_BTRS_MTL_INTERRUPT_STAT, \
- FREQ_CHANGE)))
-
#define BTRS_IRQ_DISABLE_MASK ((u32)-1)
#define BTRS_LNL_ALL_IRQ_MASK ((u32)-1)
@@ -59,18 +56,6 @@
#define DCT_ENABLE 0x1
#define DCT_DISABLE 0x0
-int ivpu_hw_btrs_irqs_clear_with_0_mtl(struct ivpu_device *vdev)
-{
- REGB_WR32(VPU_HW_BTRS_MTL_INTERRUPT_STAT, BTRS_MTL_ALL_IRQ_MASK);
- if (REGB_RD32(VPU_HW_BTRS_MTL_INTERRUPT_STAT) == BTRS_MTL_ALL_IRQ_MASK) {
- /* Writing 1s does not clear the interrupt status register */
- REGB_WR32(VPU_HW_BTRS_MTL_INTERRUPT_STAT, 0x0);
- return true;
- }
-
- return false;
-}
-
static void freq_ratios_init_mtl(struct ivpu_device *vdev)
{
struct ivpu_hw_info *hw = vdev->hw;
@@ -729,14 +714,7 @@ bool ivpu_hw_btrs_irq_handler_mtl(struct ivpu_device *vdev, int irq)
}
/* This must be done after interrupts are cleared at the source. */
- if (IVPU_WA(interrupt_clear_with_0))
- /*
- * Writing 1 triggers an interrupt, so we can't perform read update write.
- * Clear local interrupt status by writing 0 to all bits.
- */
- REGB_WR32(VPU_HW_BTRS_MTL_INTERRUPT_STAT, 0x0);
- else
- REGB_WR32(VPU_HW_BTRS_MTL_INTERRUPT_STAT, status);
+ REGB_WR32(VPU_HW_BTRS_MTL_INTERRUPT_STAT, status);
if (schedule_recovery)
ivpu_pm_trigger_recovery(vdev, "Buttress IRQ");
diff --git a/drivers/accel/ivpu/ivpu_hw_btrs.h b/drivers/accel/ivpu/ivpu_hw_btrs.h
index d6343d734570..e545284fcfa2 100644
--- a/drivers/accel/ivpu/ivpu_hw_btrs.h
+++ b/drivers/accel/ivpu/ivpu_hw_btrs.h
@@ -19,7 +19,6 @@
int ivpu_hw_btrs_info_init(struct ivpu_device *vdev);
void ivpu_hw_btrs_freq_ratios_init(struct ivpu_device *vdev);
-int ivpu_hw_btrs_irqs_clear_with_0_mtl(struct ivpu_device *vdev);
int ivpu_hw_btrs_wp_drive(struct ivpu_device *vdev, bool enable);
int ivpu_hw_btrs_wait_for_clock_res_own_ack(struct ivpu_device *vdev);
int ivpu_hw_btrs_d0i3_enable(struct ivpu_device *vdev);
--
2.43.0
next reply other threads:[~2026-09-30 16:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 16:03 Andrzej Kacprowski [this message]
2026-10-01 7:44 ` [PATCH] accel/ivpu: Drop MTL interrupt clear-with-zero workaround Wachowski, Karol
2026-10-02 15:22 ` Jeff Hugo
2026-10-05 7:08 ` Wachowski, Karol
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