From: kernel test robot <lkp@intel.com>
Cc: oe-kbuild-all@lists.linux.dev
Subject: Re: coresight: etm4x: Report whether the PMU counts external output 1
Date: Fri, 2 Oct 2026 08:06:37 +0800 [thread overview]
Message-ID: <202610020831.SAJsxWUB-lkp@intel.com> (raw)
In-Reply-To: <202610020831.SAJsxWUB-lkp@intel.com>
Hi Amir,
kernel test robot noticed the following build errors:
url: https://github.com/intel-lab-lkp/linux/commits/Amir-Ayupov/coresight-Add-pmu_pulse-extout_pulse/20260930-233744
base:
patch link: https://lore.kernel.org/r/202610020831.SAJsxWUB-lkp%40intel.com
config: arm64-randconfig-1002-20261002 (https://download.01.org/0day-ci/archive/20261002/202610020831.SAJsxWUB-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20261002/202610020831.SAJsxWUB-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202610020831.SAJsxWUB-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from include/linux/bits.h:5,
from include/linux/ioport.h:14,
from include/linux/acpi.h:13,
from drivers/hwtracing/coresight/coresight-etm4x-core.c:6:
drivers/hwtracing/coresight/coresight-etm4x-core.c: In function 'etm4_pmu_has_extout1':
>> drivers/hwtracing/coresight/coresight-etm4x-core.c:1406:12: error: 'ARMV8_PMUV3_EXT_COMMON_EVENT_BASE' undeclared (first use in this function); did you mean 'ARMV8_PMU_EVTYPE_EVENT'?
ARMV8_PMUV3_EXT_COMMON_EVENT_BASE)))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/vdso/bits.h:8:34: note: in definition of macro 'BIT_ULL'
#define BIT_ULL(nr) (ULL(1) << (nr))
^~
drivers/hwtracing/coresight/coresight-etm4x-core.c:1406:12: note: each undeclared identifier is reported only once for each function it appears in
ARMV8_PMUV3_EXT_COMMON_EVENT_BASE)))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/vdso/bits.h:8:34: note: in definition of macro 'BIT_ULL'
#define BIT_ULL(nr) (ULL(1) << (nr))
^~
vim +1406 drivers/hwtracing/coresight/coresight-etm4x-core.c
1385
1386 /*
1387 * Check whether a PMU event can count external output 1 of this trace unit,
1388 * and whether the trace unit has event 1 to drive it, since event 0 is the
1389 * trace unit trigger. The PMU only reports whether an event is implemented,
1390 * not that the trace unit drives it, so also require a CPU whose manual
1391 * documents the connection.
1392 *
1393 * Must run on the CPU that owns the trace unit.
1394 */
1395 static bool etm4_pmu_has_extout1(struct etmv4_drvdata *drvdata)
1396 {
1397 int pmuver = read_pmuver();
1398
1399 if (!is_midr_in_range_list(etm4_pmu_extout1_cpus))
1400 return false;
1401
1402 /* PMCEID0_EL0[63:32] describe events 0x4000-0x401f from PMUv3p1 */
1403 if (!pmuv3_implemented(pmuver) || pmuver < ID_AA64DFR0_EL1_PMUVer_V3P1)
1404 return false;
1405 if (!(read_pmceid0() & BIT_ULL(32 + ARMV8_PMUV3_PERFCTR_TRCEXTOUT1 -
> 1406 ARMV8_PMUV3_EXT_COMMON_EVENT_BASE)))
1407 return false;
1408
1409 /* nr_event is TRCIDR0.NUMEVENT, the number of events minus one */
1410 return drvdata->nr_event >= 1;
1411 }
1412
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next parent reply other threads:[~2026-10-02 0:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 0:06 kernel test robot [this message]
-- strict thread matches above, loose matches on Subject: below --
2026-10-04 16:07 coresight: etm4x: Report whether the PMU counts external output 1 kernel test robot
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