From: <Roman.Li@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
Leo Li <sunpeng.li@amd.com>, Roman Li <roman.li@amd.com>,
Wayne Lin <wayne.lin@amd.com>,
Tom Chung <chiahsuan.chung@amd.com>,
Fangzhi Zuo <jerry.zuo@amd.com>,
Dan Wheeler <daniel.wheeler@amd.com>, Ray Wu <Ray.Wu@amd.com>,
Ivan Lipski <ivan.lipski@amd.com>, Alex Hung <alex.hung@amd.com>,
James Lin <PingLei.Lin@amd.com>,
Chenyu Chen <Chen-Yu.Chen@amd.com>,
Joshua Aberback <joshua.aberback@amd.com>,
Martin Leung <martin.leung@amd.com>
Subject: [PATCH 12/17] drm/amd/display: Revert "avoid to write signal specific for tmds"
Date: Fri, 2 Oct 2026 15:32:35 -0400 [thread overview]
Message-ID: <20261002193240.3441018-13-Roman.Li@amd.com> (raw)
In-Reply-To: <20261002193240.3441018-1-Roman.Li@amd.com>
From: Joshua Aberback <joshua.aberback@amd.com>
This reverts commit 8be7aa94fe09165047495120fa4d66a9aa5ca1e4.
The change regressed HDMI output on the TMDS-to-FRL switch.
Reviewed-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
---
drivers/gpu/drm/amd/display/dc/link/link_dpms.c | 2 --
drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c | 8 +++-----
drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h | 1 -
3 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index ec503d3541c9..0d3b65d40807 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -1909,7 +1909,6 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
write_scdc_data(
stream->link->ddc,
stream->phy_pix_clk,
- dc_is_hdmi_frl_signal(pipe_ctx->stream->signal),
(stream->timing.flags.LTE_340MCSC_SCRAMBLE != 0));
if (dc->debug.enable_hdmi_idcc) {
@@ -2450,7 +2449,6 @@ enum dc_status link_set_dpms_off(struct pipe_ctx *pipe_ctx)
write_scdc_data(
link->ddc,
165000,//vbios only handles 165Mhz.
- dc_is_hdmi_frl_signal(stream->signal),
false);
if (masked_chip_caps == AMD_EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
/* DP159, Retimer settings */
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
index 3fbfc6e2594b..db798656c8a8 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
@@ -570,7 +570,6 @@ struct ddc *get_ddc_pin(struct ddc_service *ddc_service)
void write_scdc_data(struct ddc_service *ddc_service,
uint32_t pix_clk,
- bool is_frl,
bool lte_340_scramble)
{
bool over_340_mhz = pix_clk > 340000 ? 1 : 0;
@@ -587,10 +586,9 @@ void write_scdc_data(struct ddc_service *ddc_service,
(ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite ||
!ddc_service->link->local_sink->edid_caps.scdc_present))
return;
- if (is_frl) {
- hdmi_frl_LTS_clear_Link_Setting(ddc_service);
- hdmi_frl_LTS_clear_Update_flag(ddc_service);
- }
+ hdmi_frl_LTS_clear_Link_Setting(ddc_service);
+ hdmi_frl_LTS_clear_Update_flag(ddc_service);
+
link_query_ddc_data(ddc_service, slave_address, &offset,
sizeof(offset), &sink_version, sizeof(sink_version));
if (sink_version == 1) {
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h
index 200823954fc6..fdd8a3dce97f 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h
@@ -91,7 +91,6 @@ uint32_t link_get_fixed_vs_pe_retimer_write_address(struct dc_link *link);
void write_scdc_data(
struct ddc_service *ddc_service,
uint32_t pix_clk,
- bool is_frl,
bool lte_340_scramble);
void read_scdc_data(
--
2.34.1
next prev parent reply other threads:[~2026-10-02 19:33 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 19:32 [PATCH 00/17] DC Patches October 2, 2026 Roman.Li
2026-10-02 19:32 ` [PATCH 01/17] drm/amd/display: enable shaper when programming 3DLUT Roman.Li
2026-10-02 19:32 ` [PATCH 02/17] drm/amd/display: log MCM shaper and 3D LUT mode in the DTN log Roman.Li
2026-10-02 19:32 ` [PATCH 03/17] drm/amd/display: only reprogram DRR when v_total values change Roman.Li
2026-10-02 19:32 ` [PATCH 04/17] drm/amd/display: Add HDMI RR and SCDC skips Roman.Li
2026-10-02 19:32 ` [PATCH 05/17] drm/amd/display: Set cursor_offload for all pipes for a given stream Roman.Li
2026-10-02 19:32 ` [PATCH 06/17] drm/amd/display: Refactor DMUB fast lock sequencing Roman.Li
2026-10-02 19:32 ` [PATCH 07/17] drm/amd/display: Skip link off frame count for general UI Roman.Li
2026-10-02 19:32 ` [PATCH 08/17] drm/amd/display: allow skipping link bandwidth clear Roman.Li
2026-10-02 19:32 ` [PATCH 09/17] drm/amd/display: Prepare DSC configuration before BLS execution Roman.Li
2026-10-02 19:32 ` [PATCH 10/17] drm/amd/display: Assign alt wa bit in fams2 cmd Roman.Li
2026-10-02 19:32 ` [PATCH 11/17] drm/amd/display: Update link training no timeout behaviour on HDMI Roman.Li
2026-10-02 19:32 ` Roman.Li [this message]
2026-10-02 19:32 ` [PATCH 13/17] drm/amd/display: Handle virtual link encoder Roman.Li
2026-10-02 19:32 ` [PATCH 14/17] drm/amd/display: Add dcn42b project id Roman.Li
2026-10-02 19:32 ` [PATCH 15/17] drm/amd/display: Add debug option to override low power SR latencies Roman.Li
2026-10-02 19:32 ` [PATCH 16/17] drm/amd/display: Send HDMI VRR metadata in VTEM info packet slot Roman.Li
2026-10-02 19:32 ` [PATCH 17/17] drm/amd/display: Promote DC to 3.2.401 Roman.Li
2026-10-05 13:30 ` [PATCH 00/17] DC Patches October 2, 2026 Wheeler, Daniel
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