From: <Roman.Li@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
Leo Li <sunpeng.li@amd.com>, Roman Li <roman.li@amd.com>,
Wayne Lin <wayne.lin@amd.com>,
Tom Chung <chiahsuan.chung@amd.com>,
Fangzhi Zuo <jerry.zuo@amd.com>,
Dan Wheeler <daniel.wheeler@amd.com>, Ray Wu <Ray.Wu@amd.com>,
Ivan Lipski <ivan.lipski@amd.com>, Alex Hung <alex.hung@amd.com>,
James Lin <PingLei.Lin@amd.com>,
Chenyu Chen <Chen-Yu.Chen@amd.com>,
Alvin Lee <Alvin.Lee2@amd.com>,
Austin Zheng <austin.zheng@amd.com>
Subject: [PATCH 15/17] drm/amd/display: Add debug option to override low power SR latencies
Date: Fri, 2 Oct 2026 15:32:38 -0400 [thread overview]
Message-ID: <20261002193240.3441018-16-Roman.Li@amd.com> (raw)
In-Reply-To: <20261002193240.3441018-1-Roman.Li@amd.com>
From: Alvin Lee <Alvin.Lee2@amd.com>
[Description]
- Add debug options to override low power SR latencies
- Match regular SR latency debug override
Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +
.../dcn60/dcn60_soc_and_ip_translator.c | 39 ++++++++++++++++++-
2 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 957e15e4a84c..5cd7699e3e84 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1042,6 +1042,8 @@ struct dc_virtual_addr_space_config {
struct dc_bounding_box_overrides {
unsigned int sr_exit_time_ns;
unsigned int sr_enter_plus_exit_time_ns;
+ unsigned int sr_lp_exit_time_ns;
+ unsigned int sr_lp_enter_plus_exit_time_ns;
unsigned int sr_exit_z8_time_ns;
unsigned int sr_enter_plus_exit_z8_time_ns;
unsigned int urgent_latency_ns;
diff --git a/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn60/dcn60_soc_and_ip_translator.c b/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn60/dcn60_soc_and_ip_translator.c
index f1ee2225e9b8..aef527c7584b 100644
--- a/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn60/dcn60_soc_and_ip_translator.c
+++ b/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn60/dcn60_soc_and_ip_translator.c
@@ -79,6 +79,43 @@ static void dcn60_update_soc_bb_with_values_from_dmub(struct dml2_soc_bb *soc_bb
min_alt_ch_carveout_size_mb;
}
+static void dcn60_update_soc_bb_with_values_from_software_policy(struct dml2_soc_bb *soc_bb, const struct dc *dc)
+{
+ /* set if the value is provided */
+ if (dc->bb_overrides.sr_exit_time_ns)
+ soc_bb->power_management_parameters.stutter_exit_latency_us =
+ dc->bb_overrides.sr_exit_time_ns / 1000.0;
+
+ if (dc->bb_overrides.sr_enter_plus_exit_time_ns)
+ soc_bb->power_management_parameters.stutter_enter_plus_exit_latency_us =
+ dc->bb_overrides.sr_enter_plus_exit_time_ns / 1000.0;
+
+ if (dc->bb_overrides.dram_clock_change_latency_ns)
+ soc_bb->power_management_parameters.dram_clk_change_blackout_us =
+ dc->bb_overrides.dram_clock_change_latency_ns / 1000.0;
+
+ if (dc->bb_overrides.fclk_clock_change_latency_ns)
+ soc_bb->power_management_parameters.fclk_change_blackout_us =
+ dc->bb_overrides.fclk_clock_change_latency_ns / 1000.0;
+
+ if (dc->bb_overrides.sr_exit_z8_time_ns)
+ soc_bb->power_management_parameters.z8_stutter_exit_latency_us =
+ dc->bb_overrides.sr_exit_z8_time_ns / 1000.0;
+
+ if (dc->bb_overrides.sr_enter_plus_exit_z8_time_ns)
+ soc_bb->power_management_parameters.z8_stutter_enter_plus_exit_latency_us =
+ dc->bb_overrides.sr_enter_plus_exit_z8_time_ns / 1000.0;
+
+ /* low power stutter latencies exist only on DCN6 and above */
+ if (dc->bb_overrides.sr_lp_exit_time_ns)
+ soc_bb->power_management_parameters.low_power_stutter_exit_latency_us =
+ dc->bb_overrides.sr_lp_exit_time_ns / 1000.0;
+
+ if (dc->bb_overrides.sr_lp_enter_plus_exit_time_ns)
+ soc_bb->power_management_parameters.low_power_stutter_enter_plus_exit_latency_us =
+ dc->bb_overrides.sr_lp_enter_plus_exit_time_ns / 1000.0;
+}
+
static void apply_soc_bb_updates(struct dml2_soc_bb *soc_bb, const struct dc *dc, const struct dml2_configuration_options *config)
{
/* Individual modification can be overwritten even if it was obtained by a previous function.
@@ -89,7 +126,7 @@ static void apply_soc_bb_updates(struct dml2_soc_bb *soc_bb, const struct dc *dc
dcn60_update_soc_bb_with_values_from_dmub(soc_bb, config);
dcn401_update_soc_bb_with_values_from_clk_mgr(soc_bb, dc, config);
dcn401_update_soc_bb_with_values_from_vbios(soc_bb, dc);
- dcn401_update_soc_bb_with_values_from_software_policy(soc_bb, dc);
+ dcn60_update_soc_bb_with_values_from_software_policy(soc_bb, dc);
}
static void dcn60_get_soc_bb(struct dml2_soc_bb *soc_bb, const struct dc *dc, const struct dml2_configuration_options *config)
--
2.34.1
next prev parent reply other threads:[~2026-10-02 19:33 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 19:32 [PATCH 00/17] DC Patches October 2, 2026 Roman.Li
2026-10-02 19:32 ` [PATCH 01/17] drm/amd/display: enable shaper when programming 3DLUT Roman.Li
2026-10-02 19:32 ` [PATCH 02/17] drm/amd/display: log MCM shaper and 3D LUT mode in the DTN log Roman.Li
2026-10-02 19:32 ` [PATCH 03/17] drm/amd/display: only reprogram DRR when v_total values change Roman.Li
2026-10-20 0:37 ` Bruno
2026-10-02 19:32 ` [PATCH 04/17] drm/amd/display: Add HDMI RR and SCDC skips Roman.Li
2026-10-02 19:32 ` [PATCH 05/17] drm/amd/display: Set cursor_offload for all pipes for a given stream Roman.Li
2026-10-02 19:32 ` [PATCH 06/17] drm/amd/display: Refactor DMUB fast lock sequencing Roman.Li
2026-10-20 13:22 ` Melissa Wen
2026-10-02 19:32 ` [PATCH 07/17] drm/amd/display: Skip link off frame count for general UI Roman.Li
2026-10-02 19:32 ` [PATCH 08/17] drm/amd/display: allow skipping link bandwidth clear Roman.Li
2026-10-02 19:32 ` [PATCH 09/17] drm/amd/display: Prepare DSC configuration before BLS execution Roman.Li
2026-10-02 19:32 ` [PATCH 10/17] drm/amd/display: Assign alt wa bit in fams2 cmd Roman.Li
2026-10-02 19:32 ` [PATCH 11/17] drm/amd/display: Update link training no timeout behaviour on HDMI Roman.Li
2026-10-02 19:32 ` [PATCH 12/17] drm/amd/display: Revert "avoid to write signal specific for tmds" Roman.Li
2026-10-02 19:32 ` [PATCH 13/17] drm/amd/display: Handle virtual link encoder Roman.Li
2026-10-02 19:32 ` [PATCH 14/17] drm/amd/display: Add dcn42b project id Roman.Li
2026-10-02 19:32 ` Roman.Li [this message]
2026-10-02 19:32 ` [PATCH 16/17] drm/amd/display: Send HDMI VRR metadata in VTEM info packet slot Roman.Li
2026-10-02 19:32 ` [PATCH 17/17] drm/amd/display: Promote DC to 3.2.401 Roman.Li
2026-10-05 13:30 ` [PATCH 00/17] DC Patches October 2, 2026 Wheeler, Daniel
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