From: sashiko-bot@kernel.org
To: "David Zhang" <yidong.zhang@amd.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH V2 14/20] accel/amdxdna: Implement AIE4 command packet building and submission
Date: Tue, 06 Oct 2026 04:41:02 +0000 [thread overview]
Message-ID: <20261006044102.838041F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20261006042230.547807-15-yidong.zhang@amd.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Critical] accel/amdxdna: TOCTOU out-of-bounds read/write in amdxdna_cmd_get_payload()
- [High] accel/amdxdna: chained sub-command BOs bypass fence attachment
--
commit c176cc9653a37bd631df8131c299b9255f903027
Author: David Zhang <yidong.zhang@amd.com>
accel/amdxdna: Implement AIE4 command packet building and submission
This commit implements kernel-mode command submission and hardware queue
packet assembly for AIE4. It introduces aie4_cmd_submit() to validate
incoming command buffers, lock reservations, and dispatch to the hardware
queue while tracking job completions.
> diff --git a/drivers/accel/amdxdna/aie4_ctx.c b/drivers/accel/amdxdna/aie4_ctx.c
> --- a/drivers/accel/amdxdna/aie4_ctx.c
> +++ b/drivers/accel/amdxdna/aie4_ctx.c
[ ... ]
> @@ -731,21 +731,21 @@ static int submit_one_cmd(struct amdxdna_hwctx *hwctx,
> struct amdxdna_gem_obj *cmd_abo, bool last_of_chain,
> u64 *seq)
> {
> struct amdxdna_hwctx_priv *priv = hwctx->priv;
> struct amdxdna_dev *xdna = hwctx->client->xdna;
> struct amdxdna_cmd_start_dpu *dpu;
> struct host_queue_packet *pkt;
> u64 slot_idx;
> u16 chained;
> int ret;
>
> ret = validate_cmd_abo(xdna, cmd_abo, &chained);
> if (ret)
> return ret;
>
> dpu = amdxdna_cmd_get_payload(cmd_abo, NULL);
[Severity: Critical]
Is there a TOCTOU race window here between validation and payload retrieval?
Userspace can concurrently modify cmd_abo (which is a mapped BO) between
the bounds checks in validate_cmd_abo() and this call to
amdxdna_cmd_get_payload().
When the size argument is passed as NULL, amdxdna_cmd_get_payload() skips
its internal size bounds checks and computes the pointer offset directly
from the potentially modified header (AMDXDNA_CMD_EXTRA_CU_MASK).
This could allow it to return a pointer significantly out of bounds,
leading to an out-of-bounds read when dpu is subsequently accessed, or
potentially leaking arbitrary kernel memory to the hardware queue.
[ ... ]
> @@ -911,21 +911,21 @@ static int submit_job_cmds(struct amdxdna_hwctx *hwctx,
> struct amdxdna_sched_job *job, u32 op)
> {
[ ... ]
> /* Validate all sub-command BOs and payloads before dispatching packets. */
> for (i = 0; i < ccnt; i++) {
> u32 boh = (u32)(payload->data[i]);
>
> job->aie4_cmd_bos[i] = amdxdna_gem_get_obj(hwctx->client, boh, AMDXDNA_BO_SHARE);
> if (!job->aie4_cmd_bos[i]) {
> XDNA_ERR(xdna, "Failed to find cmd BO %u at index %u", boh, i);
> ret = -ENOENT;
> goto err_put_bos;
> }
[Severity: High]
Does this skip dma_resv fence attachment and mapping checks for sub-command
BOs?
Userspace can submit an ERT_CMD_CHAIN job with sub-command handles in the
payload that are omitted from the ioctl's top-level args->bos array.
Because these sub-command BOs are fetched dynamically here from user handles,
their reservations aren't locked and map_invalid is never checked before
dispatch.
[ ... ]
> @@ -1050,15 +1050,15 @@ int aie4_cmd_submit(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job,
[ ... ]
> job->out_fence = dma_fence_get(job->fence);
> for (i = 0; i < job->bo_cnt; i++)
> dma_resv_add_fence(job->bos[i]->resv, job->out_fence, DMA_RESV_USAGE_WRITE);
[Severity: High]
Are the dynamically fetched sub-command BOs missing their execution fences?
The execution fences are exclusively attached to BOs present in the top-level
job->bos array.
Since the dynamically fetched sub-command BOs in job->aie4_cmd_bos bypass this
fence attachment, hardware DMA can occur on BOs without a corresponding
dma_resv execution fence.
This might lead the memory manager to consider these BOs idle, potentially
reclaiming, migrating, or unmapping their pages while the device is actively
writing to them.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261006042230.547807-1-yidong.zhang@amd.com?part=14
next prev parent reply other threads:[~2026-10-06 4:41 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-06 4:22 [PATCH V2 00/20] accel/amdxdna: Kernel submission and PM for AIE4 David Zhang
2026-10-06 4:22 ` [PATCH V2 01/20] accel/amdxdna: Rename NPU3 firmware files David Zhang
2026-10-06 4:22 ` [PATCH V2 02/20] accel/amdxdna: Remove mmap for doorbell David Zhang
2026-10-06 4:22 ` [PATCH V2 03/20] accel/amdxdna: Add CERT firmware version support David Zhang
2026-10-06 4:22 ` [PATCH V2 04/20] accel/amdxdna: Upgrade firmware version to 6.0 David Zhang
2026-10-06 4:22 ` [PATCH V2 05/20] accel/amdxdna: Add NPU3 classic device support David Zhang
2026-10-06 4:22 ` [PATCH V2 06/20] accel/amdxdna: Add AIE version query to aie4_get_info David Zhang
2026-10-06 4:22 ` [PATCH V2 07/20] accel/amdxdna: Add get and set power_mode for AIE4 David Zhang
2026-10-06 4:22 ` [PATCH V2 08/20] accel/amdxdna: Add clock, DPM frequency, and resource info queries " David Zhang
2026-10-06 4:22 ` [PATCH V2 09/20] accel/amdxdna: Add context switch hysteresis with debugfs control David Zhang
2026-10-06 4:35 ` sashiko-bot
2026-10-06 4:22 ` [PATCH V2 10/20] accel/amdxdna: Refactor AIE4 hardware initialization sequence David Zhang
2026-10-06 4:22 ` [PATCH V2 11/20] accel/amdxdna: Decouple AIE4 doorbell and MSI-X notify transport hooks David Zhang
2026-10-06 4:22 ` [PATCH V2 12/20] accel/amdxdna: Implement AIE4 kernel queue lifecycle and memory layout David Zhang
2026-10-06 4:22 ` [PATCH V2 13/20] accel/amdxdna: Prepare for AIE4 command submission David Zhang
2026-10-06 4:35 ` sashiko-bot
2026-10-06 4:22 ` [PATCH V2 14/20] accel/amdxdna: Implement AIE4 command packet building and submission David Zhang
2026-10-06 4:41 ` sashiko-bot [this message]
2026-10-06 7:12 ` Eva Crystal
2026-10-07 22:54 ` Zhang, Yidong (David)
2026-10-06 4:22 ` [PATCH V2 15/20] accel/amdxdna: Make hmm_invalidate common for AIE2 and AIE4 David Zhang
2026-10-06 4:22 ` [PATCH V2 16/20] accel/amdxdna: Finalize runtime PM before acquiring dev_lock on removal David Zhang
2026-10-06 7:13 ` Eva Crystal
2026-10-06 17:01 ` Lizhi Hou
2026-10-07 1:18 ` Eva Crystal
2026-10-06 4:22 ` [PATCH V2 17/20] accel/amdxdna: Implement AIE4 suspend and resume David Zhang
2026-10-06 4:22 ` [PATCH V2 18/20] accel/amdxdna: Link SR-IOV VFs for power management sequencing David Zhang
2026-10-06 4:35 ` sashiko-bot
2026-10-06 4:22 ` [PATCH V2 19/20] accel/amdxdna: Implement runtime suspend and resume support David Zhang
2026-10-06 4:43 ` sashiko-bot
2026-10-06 4:22 ` [PATCH V2 20/20] accel/amdxdna: Enable AIE4 firmware logging to DRAM David Zhang
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