From: Ali Rouhi <arouhi@sitime.com>
To: "netdev-bot+sashiko@kernel.org" <netdev-bot+sashiko@kernel.org>
Cc: Jiri Pirko <jiri@resnulli.us>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Ivan Vecera <ivecera@redhat.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Carolina Jubran <cjubran@nvidia.com>,
Oleg Zadorozhnyi <Oleg.Zadorozhnyi@devoxsoftware.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next v11 13/13] dpll: sit9531x: model the inter-PLL sync net as a pair of pins
Date: Fri, 9 Oct 2026 18:23:30 +0000 [thread overview]
Message-ID: <20261009182323.76166-11-arouhi@sitime.com> (raw)
In-Reply-To: <179116260977.434549.11247923823182031360@kernel.org>
On Mon, 5 Oct 2026, netdev-bot+sashiko@kernel.org wrote:
Replies inline, in the order of the summary list.
> [Severity: Medium]
> Will this report STANDBY even when no PLL drives the net?
>
> [...]
>
> Should the destination pin report NO_SIGNAL when intsync_src < 0?
Fixed: a destination pin whose net no PLL drives reports NO_SIGNAL, as an
external input that lost its clock does, and is not active. The poll's
change check goes through the same helper.
The test is not intsync_src < 0 on its own. A source the driver enabled,
or whose configuration its scan found already in place, says the net is
driven; a source found only partly configured does not. Past that, a
loaded profile can drive the net with a configuration of its own, so a
PLL the device feeds from the net and holds locked also counts as the net
carrying a signal.
> [Severity: Medium]
> If the request fails but this re-scan moves intsync_src, what sends the
> pin change notification?
>
> [...]
>
> Without the same handling here, won't subscribers keep the stale SYNCOUT
> state?
Fixed: the source setter takes whether this PLL owns the net before and
after the request and sends a pin-change notification when a failed
request moved it, which is what the output state setter already did.
> [Severity: Medium]
> If only this last step fails, should restore_global still set the global
> bit again?
>
> [...]
>
> The EXT page then holds no enable pattern, so detect reports no owner.
> The global enable stays asserted, and the driver has no owner on record
> that would ever clear it.
Fixed, both halves. A failure of the final per-PLL latch no longer
restores the global enable, since the net is not configured at that
point. The rollback of a failed enable uses a variant that does not
restore it either, so an enable that failed cannot leave a global bit no
PLL owns.
> [Severity: Medium]
> What happens to the cached owner if this rollback also fails?
>
> [...]
>
> Isn't this the case the setter's comment says it has to prevent ("a cache
> that wrongly says nobody drives the net would let a second PLL be
> configured to drive it")?
Fixed: when the scan after a failed enable fails too, the requesting PLL
is recorded as a partial owner, so a retry re-runs the enable instead of
being refused as busy while the configuration sits half in place.
> [Severity: Medium]
> Does this write need a page-0 small update after it?
>
> [...]
>
> Later, an unrelated priority-table change on any PLL ends in
> sit9531x_prio_prg_commit(), which also writes SIT9531X_REG_GLOBAL_UPDATE.
> Could that latch the pending bit and turn inter-PLL sync back on over a
> half-written EXT page, without anyone requesting it?
Fixed: the restore write is followed by the page-0 small update and its
settle, as every other write to that register is.
> [Severity: Low]
> Once this runs, is there any way to tell a half-configured source from a
> fully connected one?
>
> [...]
>
> It returns success without running the enable sequence again. Does the
> configuration ever get completed in that case?
That is what this revision changed: the probe-time scan records a partly
configured source as partial, the source pin reports it disconnected, and
a connect on it re-runs the enable rather than returning early.
> [Severity: Low]
> Should INTSYNC ownership also be detected again on resume?
>
> [...]
>
> - A's SYNCOUT pin still reports CONNECTED.
> - A CONNECTED on A returns success without programming anything.
> - A CONNECTED on another PLL fails with -EBUSY.
> - A's INTSYNC destination pin is forced to DISCONNECTED.
Fixed: resume re-detects the net's owner and reads every output's mute
state back from the part before the poll and the interrupt are
re-enabled, and marks an output whose read failed for a read-through.
next prev parent reply other threads:[~2026-10-09 18:31 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 23:37 [PATCH net-next v11 00/13] dpll: add SiTime SiT9531x DPLL clock driver Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 01/13] dt-bindings: dpll: allow hex unit addresses on output pins Ali Rouhi
2026-10-02 8:32 ` Krzysztof Kozlowski
2026-09-30 23:37 ` [PATCH net-next v11 02/13] dt-bindings: vendor-prefixes: add SiTime Corporation Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 03/13] dt-bindings: dpll: add SiTime SiT95316 clock generator Ali Rouhi
2026-10-05 1:09 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-10-06 3:22 ` Rob Herring (Arm)
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 04/13] dpll: add basic SiTime SiT9531x support Ali Rouhi
2026-10-05 1:09 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 05/13] dpll: sit9531x: read DPLL types and pin properties from system firmware Ali Rouhi
2026-10-05 1:09 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 06/13] dpll: sit9531x: register DPLL devices and pins Ali Rouhi
2026-10-05 1:09 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 07/13] dpll: sit9531x: implement input pin state on a DPLL Ali Rouhi
2026-10-05 1:10 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 08/13] dpll: sit9531x: add support to get and set priority on input pins Ali Rouhi
2026-10-05 1:10 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 09/13] dpll: sit9531x: add support to get and set frequency on pins Ali Rouhi
2026-10-05 1:10 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 10/13] dpll: sit9531x: implement output pin state on a DPLL Ali Rouhi
2026-10-05 1:10 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 12/13] dpll: sit9531x: add support to get phase offset on the connected input pin Ali Rouhi
2026-10-05 1:10 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 11/13] dpll: sit9531x: add support to adjust output phase Ali Rouhi
2026-10-05 1:10 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi
2026-09-30 23:37 ` [PATCH net-next v11 13/13] dpll: sit9531x: model the inter-PLL sync net as a pair of pins Ali Rouhi
2026-10-02 9:14 ` sashiko-bot
2026-10-05 1:10 ` netdev-bot+sashiko
2026-10-09 18:23 ` Ali Rouhi [this message]
2026-10-07 2:10 ` [PATCH net-next v11 00/13] dpll: add SiTime SiT9531x DPLL clock driver patchwork-bot+netdevbpf
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