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From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Kane Chen" <kane_chen@aspeedtech.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v1 3/9] hw/misc/aspeed_scu: Add AST1080 A0 silicon revision definition
Date: Thu, 15 Oct 2026 06:36:29 +0000	[thread overview]
Message-ID: <20261015063625.186708-4-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20261015063625.186708-1-jamin_lin@aspeedtech.com>

Add a new silicon revision constant AST1080_A0_SILICON_REV for the
AST1080 SoC. This allows the SCU model and related SoC layers to
identify and handle AST1080 A0 revision properly in the same way as
other Aspeed SoC families.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 include/hw/misc/aspeed_scu.h | 1 +
 hw/misc/aspeed_scu.c         | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h
index 6482038f12..a7014e43f2 100644
--- a/include/hw/misc/aspeed_scu.h
+++ b/include/hw/misc/aspeed_scu.h
@@ -52,6 +52,7 @@ struct Aspeed2700SCUState {
 #define AST1030_A1_SILICON_REV   0x80010000U
 #define AST1060_A2_SILICON_REV   0xA0030000U
 #define AST1040_A0_SILICON_REV   0x80000000U
+#define AST1080_A0_SILICON_REV   0xA0000100U
 #define AST2700_A1_SILICON_REV   0x06010103U
 #define AST2700_A2_SILICON_REV   0x06020103U
 
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 77f9af2ae5..df26dd0ef4 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -572,6 +572,7 @@ static uint32_t aspeed_silicon_revs[] = {
     AST2700_A1_SILICON_REV,
     AST2700_A2_SILICON_REV,
     AST1040_A0_SILICON_REV,
+    AST1080_A0_SILICON_REV,
 };
 
 bool is_supported_silicon_rev(uint32_t silicon_rev)
-- 
2.53.0


  parent reply	other threads:[~2026-10-15  6:37 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-15  6:36 [PATCH v1 0/9] hw/arm/aspeed: Add AST1080 SoC and EVB support Jamin Lin
2026-10-15  6:36 ` [PATCH v1 1/9] hw/arm/aspeed_ast1040: Add common init function for AST1040/AST1080 SoCs Jamin Lin
2026-10-15  6:36 ` [PATCH v1 2/9] hw/arm/aspeed_ast1040: Add common realize " Jamin Lin
2026-10-15  6:36 ` Jamin Lin [this message]
2026-10-15  6:36 ` [PATCH v1 4/9] hw/arm/aspeed_ast1040: Add AST1080 SoC support Jamin Lin
2026-10-15  6:36 ` [PATCH v1 5/9] hw/arm/aspeed_ast1040: Add AST1080 QSPI filters as unimplemented device Jamin Lin
2026-10-15  6:36 ` [PATCH v1 6/9] hw/arm/aspeed_ast1040: Add AST1080 I2C filter as an " Jamin Lin
2026-10-15  6:36 ` [PATCH v1 7/9] hw/arm/aspeed_ast1040_evb: Add AST1080 EVB machine support Jamin Lin
2026-10-15  6:36 ` [PATCH v1 8/9] tests/functional/arm/aspeed: Add AST1080 test with ASPEED MCU FW Hub v01.00 Jamin Lin
2026-10-15  6:36 ` [PATCH v1 9/9] docs/system/arm/aspeed: Add AST1080 Platform Root of Trust evaluation board Jamin Lin

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