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From: Masami Hiramatsu (Google) <mhiramat@kernel.org>
To: Xiaofeng Yuan <yuanxiaofeng@eswincomputing.com>
Cc: Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Nam Cao <namcao@linutronix.de>,
	Naveen N Rao <naveen@kernel.org>,
	"David S . Miller" <davem@davemloft.net>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-trace-kernel@vger.kernel.org
Subject: Re: [PATCH v5 0/2] riscv: kprobes: reject probes inside LR/SC sequences
Date: Thu, 15 Oct 2026 22:10:32 +0900	[thread overview]
Message-ID: <20261015131034.7F52E1F000C4@smtp.kernel.org> (raw)
In-Reply-To: <20261014094415.374-1-yuanxiaofeng@eswincomputing.com>

On Wed, 14 Oct 2026 17:44:13 +0800, Xiaofeng Yuan <yuanxiaofeng@eswincomputing.com> wrote:
> A breakpoint trap taken in the middle of an LR/SC sequence clears the
> load reservation, so an SC following the probed instruction always fails
> and the enclosing retry loop re-enters the breakpoint, livelocking the
> CPU.  This series makes the RISC-V kprobes implementation reject probes
> placed on an LR/SC instruction or between them, following arm64's
> approach for its equivalent exclusive load/store instructions.
>

Please do NOT reply new version against the previous thread.
It is not easy to find a new version in the message list.

Thanks,

-- 
Masami Hiramatsu (Google) <mhiramat@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Masami Hiramatsu (Google) <mhiramat@kernel.org>
To: Xiaofeng Yuan <yuanxiaofeng@eswincomputing.com>
Cc: Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Nam Cao <namcao@linutronix.de>,
	Naveen N Rao <naveen@kernel.org>,
	"David S . Miller" <davem@davemloft.net>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-trace-kernel@vger.kernel.org
Subject: Re: [PATCH v5 0/2] riscv: kprobes: reject probes inside LR/SC sequences
Date: Thu, 15 Oct 2026 22:10:32 +0900	[thread overview]
Message-ID: <20261015131034.7F52E1F000C4@smtp.kernel.org> (raw)
In-Reply-To: <20261014094415.374-1-yuanxiaofeng@eswincomputing.com>

On Wed, 14 Oct 2026 17:44:13 +0800, Xiaofeng Yuan <yuanxiaofeng@eswincomputing.com> wrote:
> A breakpoint trap taken in the middle of an LR/SC sequence clears the
> load reservation, so an SC following the probed instruction always fails
> and the enclosing retry loop re-enters the breakpoint, livelocking the
> CPU.  This series makes the RISC-V kprobes implementation reject probes
> placed on an LR/SC instruction or between them, following arm64's
> approach for its equivalent exclusive load/store instructions.
>

Please do NOT reply new version against the previous thread.
It is not easy to find a new version in the message list.

Thanks,

-- 
Masami Hiramatsu (Google) <mhiramat@kernel.org>

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2026-10-15 13:10 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28  9:12 [PATCH v4 0/2] riscv: kprobes: reject probes inside LR/SC sequences Xiaofeng Yuan
2026-08-28  9:12 ` [PATCH v4 1/2] riscv: probes: reject kprobes " Xiaofeng Yuan
2026-09-22 13:37   ` Nam Cao
2026-08-28  9:12 ` [PATCH v4 2/2] riscv: kprobes: add KUnit test for LR/SC sequence rejection Xiaofeng Yuan
2026-09-22 13:46   ` Nam Cao
2026-09-20  8:02 ` [PATCH v4 0/2] riscv: kprobes: reject probes inside LR/SC sequences Xiaofeng Yuan
2026-09-22 15:40 ` Nam Cao
2026-09-22 15:40   ` Nam Cao
2026-10-14  9:44 ` [PATCH v5 " Xiaofeng Yuan
2026-10-14  9:44   ` Xiaofeng Yuan
2026-10-15 13:10   ` Masami Hiramatsu [this message]
2026-10-15 13:10     ` Masami Hiramatsu
2026-10-14  9:44 ` [PATCH v5 1/2] " Xiaofeng Yuan
2026-10-14  9:44   ` Xiaofeng Yuan
2026-10-15 13:19   ` Masami Hiramatsu
2026-10-15 13:19     ` Masami Hiramatsu
2026-10-14  9:44 ` [PATCH v5 2/2] riscv: kprobes: add KUnit test for LR/SC sequence rejection Xiaofeng Yuan
2026-10-14  9:44   ` Xiaofeng Yuan
2026-10-14  9:54   ` sashiko-bot
2026-10-15 13:22     ` Masami Hiramatsu

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