From: Matthew Auld <matthew.auld@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>,
Tejas Upadhyay <tejas.upadhyay@intel.com>
Subject: [PATCH v2 2/3] drm/xe: revamp hw reserved PAT index checking
Date: Thu, 15 Oct 2026 16:45:56 +0100 [thread overview]
Message-ID: <20261015154553.483229-7-matthew.auld@intel.com> (raw)
In-Reply-To: <20261015154553.483229-5-matthew.auld@intel.com>
This came up recently, where the current code uses the following to
check for hw reserved/invalid:
if (XE_IOCTL_DBG(xe, !coh_mode))
This works, but is actually confusing since coh_mode being zero is valid
from the spec pov, but here coh_mode is some driver defined value and
not the value from the spec.
To avoid any confusion, revamp this to just to pat.valid directly.
v2 (Tejas):
- Update the kernel-doc for get_coh_mode() to reflect the updated
behavior.
Assisted-by: LLM
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
drivers/gpu/drm/xe/xe_pat.c | 8 ++++++++
drivers/gpu/drm/xe/xe_pat.h | 11 ++++++++++-
drivers/gpu/drm/xe/xe_vm.c | 10 +++-------
drivers/gpu/drm/xe/xe_vm_madvise.c | 8 ++------
4 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
index d1ba2325d9e2..d239693b803b 100644
--- a/drivers/gpu/drm/xe/xe_pat.c
+++ b/drivers/gpu/drm/xe/xe_pat.c
@@ -295,9 +295,17 @@ static const struct xe_pat_table_entry xe3p_lpg_pat_table[] = {
[31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
};
+bool xe_pat_index_is_valid(struct xe_device *xe, u16 pat_index)
+{
+ WARN_ON(pat_index >= xe->pat.n_entries);
+ return xe->pat.table[pat_index].valid;
+}
+
u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index)
{
WARN_ON(pat_index >= xe->pat.n_entries);
+ WARN_ON(!xe->pat.table[pat_index].coh_mode ||
+ xe->pat.table[pat_index].coh_mode > XE_COH_2WAY);
return xe->pat.table[pat_index].coh_mode;
}
diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
index 6398c3ab4805..f6b0fac2000a 100644
--- a/drivers/gpu/drm/xe/xe_pat.h
+++ b/drivers/gpu/drm/xe/xe_pat.h
@@ -56,9 +56,18 @@ void xe_pat_init(struct xe_gt *gt);
int xe_pat_dump(struct xe_gt *gt, struct drm_printer *p);
int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p);
+/**
+ * xe_pat_index_is_valid - Check whether the given pat_index is valid.
+ * @xe: xe device
+ * @pat_index: The pat_index to query
+ *
+ * Return: true if the pat_index entry is valid, false if reserved.
+ */
+bool xe_pat_index_is_valid(struct xe_device *xe, u16 pat_index);
+
/**
* xe_pat_index_get_coh_mode - Extract the coherency mode for the given
- * pat_index.
+ * pat_index. Index must be valid for the hw.
* @xe: xe device
* @pat_index: The pat_index to query
*/
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 095f762bbb6f..320bcb7013d2 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3811,17 +3811,13 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
pat_index = array_index_nospec(pat_index, xe->pat.n_entries);
(*bind_ops)[i].pat_index = pat_index;
- coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
- comp_en = xe_pat_index_get_comp_en(xe, pat_index);
- if (XE_IOCTL_DBG(xe, !coh_mode)) { /* hw reserved */
+ if (XE_IOCTL_DBG(xe, !xe_pat_index_is_valid(xe, pat_index))) {
err = -EINVAL;
goto free_bind_ops;
}
- if (XE_WARN_ON(coh_mode > XE_COH_2WAY)) {
- err = -EINVAL;
- goto free_bind_ops;
- }
+ coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
+ comp_en = xe_pat_index_get_comp_en(xe, pat_index);
if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) ||
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
index 5c7aefc641ee..f2c70657460c 100644
--- a/drivers/gpu/drm/xe/xe_vm_madvise.c
+++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
@@ -393,17 +393,13 @@ static bool madvise_args_are_sane(struct xe_device *xe, const struct drm_xe_madv
break;
case DRM_XE_MEM_RANGE_ATTR_PAT:
{
- u16 pat_index, coh_mode;
+ u16 pat_index;
if (XE_IOCTL_DBG(xe, args->pat_index.val >= xe->pat.n_entries))
return false;
pat_index = array_index_nospec(args->pat_index.val, xe->pat.n_entries);
- coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
- if (XE_IOCTL_DBG(xe, !coh_mode))
- return false;
-
- if (XE_WARN_ON(coh_mode > XE_COH_2WAY))
+ if (XE_IOCTL_DBG(xe, !xe_pat_index_is_valid(xe, pat_index)))
return false;
if (XE_IOCTL_DBG(xe, args->pat_index.pad))
--
2.56.0
next prev parent reply other threads:[~2026-10-15 15:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 15:45 [PATCH v2 0/3] Improve hw reserved PAT checking Matthew Auld
2026-10-15 15:45 ` [PATCH v2 1/3] drm/xe/pat: initialise pat.valid everywhere Matthew Auld
2026-10-15 15:45 ` Matthew Auld [this message]
2026-10-15 16:01 ` [PATCH v2 2/3] drm/xe: revamp hw reserved PAT index checking sashiko-bot
2026-10-15 15:45 ` [PATCH v2 3/3] drm/xe/pat: always check is_valid() when querying an index Matthew Auld
2026-10-15 16:12 ` sashiko-bot
2026-10-15 15:54 ` ✓ CI.KUnit: success for Improve hw reserved PAT checking (rev2) Patchwork
2026-10-15 20:15 ` ✓ Xe.CI.BAT: " Patchwork
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