* [frank-w-bpi-r2-4.14:7.3-rsslro2 15/15] drivers/net/ethernet/mediatek/mtk_eth_soc.c:3006:31: error: 'const struct <anonymous>' has no member named 'lro_alt_timer'; did you mean 'lro_alt_dbg'?
@ 2026-10-15 10:06 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2026-10-15 10:06 UTC (permalink / raw)
To: Frank Wunderlich; +Cc: oe-kbuild-all
tree: https://github.com/frank-w/BPI-R2-4.14 7.3-rsslro2
head: 0327d4826547afd9459f4696200a87542fa2fc41
commit: 15df9bebad7152de5ed4925c2ae7c654f6c80176 [15/15] Fix HW LRO uninit sequence.
config: arc-allyesconfig (https://download.01.org/0day-ci/archive/20261015/202610151712.S0KxpHHo-lkp@intel.com/config)
compiler: arc-linux-gcc (GCC) 16.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20261015/202610151712.S0KxpHHo-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202610151712.S0KxpHHo-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/net/ethernet/mediatek/mtk_eth_soc.c: In function 'mtk_hwlro_rx_init':
>> drivers/net/ethernet/mediatek/mtk_eth_soc.c:3006:31: error: 'const struct <anonymous>' has no member named 'lro_alt_timer'; did you mean 'lro_alt_dbg'?
3006 | reg_map->pdma.lro_alt_timer);
| ^~~~~~~~~~~~~
| lro_alt_dbg
drivers/net/ethernet/mediatek/mtk_eth_soc.c: In function 'mtk_probe':
drivers/net/ethernet/mediatek/mtk_eth_soc.c:5885:1: warning: label 'err_unreg_netdev' defined but not used [-Wunused-label]
5885 | err_unreg_netdev:
| ^~~~~~~~~~~~~~~~
vim +3006 drivers/net/ethernet/mediatek/mtk_eth_soc.c
2956
2957 static int mtk_hwlro_rx_init(struct mtk_eth *eth)
2958 {
2959 u32 ring_ctrl_dw1 = 0, ring_ctrl_dw2 = 0, ring_ctrl_dw3 = 0;
2960 const struct mtk_reg_map *reg_map = eth->soc->reg_map;
2961 const struct mtk_soc_data *soc = eth->soc;
2962 u32 lro_ctrl_dw0 = 0, lro_ctrl_dw3 = 0;
2963 int i, val;
2964
2965 /* set LRO rings to auto-learn modes */
2966 ring_ctrl_dw2 |= MTK_RING_AUTO_LERAN_MODE;
2967
2968 /* validate LRO ring */
2969 ring_ctrl_dw2 |= MTK_RING_VLD;
2970
2971 /* set AGE timer (unit: 20us) */
2972 ring_ctrl_dw2 |= MTK_RING_AGE_TIME_H;
2973 ring_ctrl_dw1 |= MTK_RING_AGE_TIME_L;
2974
2975 /* set max AGG timer (unit: 20us) */
2976 ring_ctrl_dw2 |= MTK_RING_MAX_AGG_TIME;
2977
2978 /* set max LRO AGG count */
2979 ring_ctrl_dw2 |= MTK_RING_MAX_AGG_CNT_L;
2980 ring_ctrl_dw3 |= MTK_RING_MAX_AGG_CNT_H;
2981
2982 for (i = 1; i <= MTK_HW_LRO_RING_NUM(eth); i++) {
2983 mtk_w32(eth, ring_ctrl_dw1, MTK_LRO_CTRL_DW1_CFG(reg_map, i));
2984 mtk_w32(eth, ring_ctrl_dw2, MTK_LRO_CTRL_DW2_CFG(reg_map, i));
2985 mtk_w32(eth, ring_ctrl_dw3, MTK_LRO_CTRL_DW3_CFG(reg_map, i));
2986 }
2987
2988 /* IPv4 checksum update enable */
2989 lro_ctrl_dw0 |= MTK_L3_CKS_UPD_EN(eth);
2990
2991 /* switch priority comparison to packet count mode */
2992 lro_ctrl_dw0 |= MTK_LRO_ALT_PKT_CNT_MODE;
2993
2994 /* enable L4 PSH flag check */
2995 if (mtk_is_netsys_v3_or_greater(eth))
2996 lro_ctrl_dw0 |= MTK_LRO_L4_CTRL_PSH_EN;
2997
2998 /* bandwidth threshold setting */
2999 mtk_w32(eth, MTK_HW_LRO_BW_THRE, MTK_PDMA_LRO_CTRL_DW2(reg_map));
3000
3001 /* auto-learn score delta setting */
3002 mtk_w32(eth, MTK_HW_LRO_REPLACE_DELTA, MTK_PDMA_LRO_ALT_SCORE_DELTA(reg_map));
3003
3004 /* set refresh timer for altering flows to 1 sec. (unit: 20us) */
3005 mtk_w32(eth, (MTK_HW_LRO_TIMER_UNIT << 16) | MTK_HW_LRO_REFRESH_TIME,
> 3006 reg_map->pdma.lro_alt_timer);
3007
3008 if (mtk_is_netsys_v3_or_greater(eth)) {
3009 val = mtk_r32(eth, reg_map->pdma.rx_cfg);
3010 mtk_w32(eth, val | ((MTK_PDMA_LRO_SDL + MTK_MAX_RX_LENGTH) <<
3011 MTK_RX_CFG_SDL_OFFSET), reg_map->pdma.rx_cfg);
3012
3013 lro_ctrl_dw0 |= MTK_PDMA_LRO_SDL << MTK_CTRL_DW0_SDL_OFFSET;
3014
3015 /* enable cpu reason black list */
3016 lro_ctrl_dw0 |= MTK_LRO_CRSN_BNW(eth);
3017
3018 /* no use PPE cpu reason */
3019 mtk_w32(eth, 0xffffffff, MTK_PDMA_LRO_CTRL_DW1(reg_map));
3020 } else {
3021 /* set HW LRO mode & the max aggregation count for rx packets */
3022 lro_ctrl_dw3 |= MTK_ADMA_MODE | (MTK_HW_LRO_MAX_AGG_CNT & 0xff);
3023 }
3024
3025 /* enable max 4-depth VLAN support including switch special tag */
3026 lro_ctrl_dw3 |= MTK_LRO_VLAN_VID_CMP_DEPTH | MTK_LRO_VLAN_EN;
3027
3028 /* the minimal remaining room of SDL0 in RXD for lro aggregation */
3029 lro_ctrl_dw3 |= MTK_LRO_MIN_RXD_SDL;
3030
3031 /* enable HW LRO */
3032 lro_ctrl_dw0 |= MTK_LRO_EN;
3033
3034 mtk_w32(eth, lro_ctrl_dw3, MTK_PDMA_LRO_CTRL_DW3(reg_map));
3035 mtk_w32(eth, lro_ctrl_dw0, MTK_PDMA_LRO_CTRL_DW0(reg_map));
3036
3037 if (mtk_is_netsys_v2_or_greater(eth)) {
3038 i = (soc->rx.desc_size == sizeof(struct mtk_rx_dma_v2)) ? 1 : 0;
3039 mtk_m32(eth, MTK_RX_DONE_INT(eth, MTK_HW_LRO_RING(eth, i)),
3040 MTK_RX_DONE_INT(eth, MTK_HW_LRO_RING(eth, i)), reg_map->pdma.int_grp);
3041 mtk_m32(eth, MTK_RX_DONE_INT(eth, MTK_HW_LRO_RING(eth, i + 1)),
3042 MTK_RX_DONE_INT(eth, MTK_HW_LRO_RING(eth, i + 1)),
3043 reg_map->pdma.int_grp + 0x4);
3044 mtk_m32(eth, MTK_RX_DONE_INT(eth, MTK_HW_LRO_RING(eth, i + 2)),
3045 MTK_RX_DONE_INT(eth, MTK_HW_LRO_RING(eth, i + 2)), reg_map->pdma.int_grp3);
3046 }
3047
3048 return 0;
3049 }
3050
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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2026-10-15 10:06 [frank-w-bpi-r2-4.14:7.3-rsslro2 15/15] drivers/net/ethernet/mediatek/mtk_eth_soc.c:3006:31: error: 'const struct <anonymous>' has no member named 'lro_alt_timer'; did you mean 'lro_alt_dbg'? kernel test robot
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