* [PATCH] dt-bindings: display: Convert hisilicon, hi6220-dsi to DT schema
@ 2026-10-16 22:53 ` Rob Herring (Arm)
0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring (Arm) @ 2026-10-16 22:53 UTC (permalink / raw)
To: Xinliang Liu, Sumit Semwal, Yongqin Liu, John Stultz,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter, Krzysztof Kozlowski, Conor Dooley
Cc: Xinliang Liu, dri-devel, devicetree, linux-kernel
Convert the hisilicon,hi6220-dsi binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/display/hisilicon/dw-dsi.txt | 72 -------------------
.../hisilicon/hisilicon,hi6220-dsi.yaml | 68 ++++++++++++++++++
2 files changed, 68 insertions(+), 72 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml
diff --git a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
deleted file mode 100644
index d270bfe4e4e0..000000000000
--- a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
+++ /dev/null
@@ -1,72 +0,0 @@
-Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
-
-A DSI Host Controller resides in the middle of display controller and external
-HDMI converter or panel.
-
-Required properties:
-- compatible: value should be "hisilicon,hi6220-dsi".
-- reg: physical base address and length of dsi controller's registers.
-- clocks: contains APB clock phandle + clock-specifier pair.
-- clock-names: should be "pclk".
-- ports: contains DSI controller input and output sub port.
- The input port connects to ADE output port with the reg value "0".
- The output port with the reg value "1", it could connect to panel or
- any other bridge endpoints.
- See Documentation/devicetree/bindings/graph.txt for more device graph info.
-
-A example of HiKey board hi6220 SoC and board specific DT entry:
-Example:
-
-SoC specific:
- dsi: dsi@f4107800 {
- compatible = "hisilicon,hi6220-dsi";
- reg = <0x0 0xf4107800 0x0 0x100>;
- clocks = <&media_ctrl HI6220_DSI_PCLK>;
- clock-names = "pclk";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* 0 for input port */
- port@0 {
- reg = <0>;
- dsi_in: endpoint {
- remote-endpoint = <&ade_out>;
- };
- };
- };
- };
-
-
-Board specific:
- &dsi {
- status = "ok";
-
- ports {
- /* 1 for output port */
- port@1 {
- reg = <1>;
-
- dsi_out0: endpoint@0 {
- remote-endpoint = <&adv7533_in>;
- };
- };
- };
- };
-
- &i2c2 {
- ...
-
- adv7533: adv7533@39 {
- ...
-
- port {
- adv7533_in: endpoint {
- remote-endpoint = <&dsi_out0>;
- };
- };
- };
- };
-
diff --git a/Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml b/Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml
new file mode 100644
index 000000000000..868ab185a71a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/hisilicon/hisilicon,hi6220-dsi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon DesignWare DSI Host Controller
+
+maintainers:
+ - Xinliang Liu <z.liuxinliang@hisilicon.com>
+
+properties:
+ compatible:
+ const: hisilicon,hi6220-dsi
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: pclk
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ description: Input port, connects to ADE output endpoint.
+ $ref: /schemas/graph.yaml#/properties/port
+
+ port@1:
+ description: Output port, connects to panel or bridge endpoints.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/hi6220-clock.h>
+
+ dsi@f4107800 {
+ compatible = "hisilicon,hi6220-dsi";
+ reg = <0xf4107800 0x100>;
+ clocks = <&media_ctrl HI6220_DSI_PCLK>;
+ clock-names = "pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi_in: endpoint {
+ remote-endpoint = <&ade_out>;
+ };
+ };
+ };
+ };
--
2.53.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] dt-bindings: display: Convert hisilicon,hi6220-dsi to DT schema
@ 2026-10-16 22:53 ` Rob Herring (Arm)
0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring (Arm) @ 2026-10-16 22:53 UTC (permalink / raw)
To: Xinliang Liu, Sumit Semwal, Yongqin Liu, John Stultz,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter, Krzysztof Kozlowski, Conor Dooley
Cc: Xinliang Liu, dri-devel, devicetree, linux-kernel
Convert the hisilicon,hi6220-dsi binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/display/hisilicon/dw-dsi.txt | 72 -------------------
.../hisilicon/hisilicon,hi6220-dsi.yaml | 68 ++++++++++++++++++
2 files changed, 68 insertions(+), 72 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml
diff --git a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
deleted file mode 100644
index d270bfe4e4e0..000000000000
--- a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
+++ /dev/null
@@ -1,72 +0,0 @@
-Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
-
-A DSI Host Controller resides in the middle of display controller and external
-HDMI converter or panel.
-
-Required properties:
-- compatible: value should be "hisilicon,hi6220-dsi".
-- reg: physical base address and length of dsi controller's registers.
-- clocks: contains APB clock phandle + clock-specifier pair.
-- clock-names: should be "pclk".
-- ports: contains DSI controller input and output sub port.
- The input port connects to ADE output port with the reg value "0".
- The output port with the reg value "1", it could connect to panel or
- any other bridge endpoints.
- See Documentation/devicetree/bindings/graph.txt for more device graph info.
-
-A example of HiKey board hi6220 SoC and board specific DT entry:
-Example:
-
-SoC specific:
- dsi: dsi@f4107800 {
- compatible = "hisilicon,hi6220-dsi";
- reg = <0x0 0xf4107800 0x0 0x100>;
- clocks = <&media_ctrl HI6220_DSI_PCLK>;
- clock-names = "pclk";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* 0 for input port */
- port@0 {
- reg = <0>;
- dsi_in: endpoint {
- remote-endpoint = <&ade_out>;
- };
- };
- };
- };
-
-
-Board specific:
- &dsi {
- status = "ok";
-
- ports {
- /* 1 for output port */
- port@1 {
- reg = <1>;
-
- dsi_out0: endpoint@0 {
- remote-endpoint = <&adv7533_in>;
- };
- };
- };
- };
-
- &i2c2 {
- ...
-
- adv7533: adv7533@39 {
- ...
-
- port {
- adv7533_in: endpoint {
- remote-endpoint = <&dsi_out0>;
- };
- };
- };
- };
-
diff --git a/Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml b/Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml
new file mode 100644
index 000000000000..868ab185a71a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/hisilicon/hisilicon,hi6220-dsi.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/hisilicon/hisilicon,hi6220-dsi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon DesignWare DSI Host Controller
+
+maintainers:
+ - Xinliang Liu <z.liuxinliang@hisilicon.com>
+
+properties:
+ compatible:
+ const: hisilicon,hi6220-dsi
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: pclk
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ description: Input port, connects to ADE output endpoint.
+ $ref: /schemas/graph.yaml#/properties/port
+
+ port@1:
+ description: Output port, connects to panel or bridge endpoints.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/hi6220-clock.h>
+
+ dsi@f4107800 {
+ compatible = "hisilicon,hi6220-dsi";
+ reg = <0xf4107800 0x100>;
+ clocks = <&media_ctrl HI6220_DSI_PCLK>;
+ clock-names = "pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi_in: endpoint {
+ remote-endpoint = <&ade_out>;
+ };
+ };
+ };
+ };
--
2.53.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
end of thread, other threads:[~2026-10-16 22:53 UTC | newest]
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2026-10-16 22:53 ` [PATCH] dt-bindings: display: Convert hisilicon,hi6220-dsi " Rob Herring (Arm)
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