From: Jesse Zhang <Jesse.Zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Alexander.Deucher@amd.com>,
Christian Koenig <christian.koenig@amd.com>,
<lijo.lazar@amd.com>, <Mario.Novales@amd.com>,
<Manu.Rastogi@amd.com>, <Jiongyu.Zhu@amd.com>,
Jesse Zhang <Jesse.Zhang@amd.com>
Subject: [PATCH v2 13/15] drm/amdgpu: add a debug_mask bit to disable the engine reset
Date: Thu, 22 Oct 2026 16:19:53 +0800 [thread overview]
Message-ID: <20261022082011.331462-13-Jesse.Zhang@amd.com> (raw)
In-Reply-To: <20261022082011.331462-1-Jesse.Zhang@amd.com>
Add amdgpu.debug_mask=0x4000 to keep the IPs from reporting
AMDGPU_RESET_TYPE_PER_ENGINE, eg. to test the recovery without the
engine reset.
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index da99fa2f1b87..69ad6be01ef3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -951,6 +951,7 @@ struct amdgpu_device {
bool debug_enable_ce_cs;
bool debug_hibernation_thaw_resume_gpu;
bool debug_disable_ip_block_soft_reset;
+ bool debug_disable_engine_reset;
/* Protection for the following isolation structure */
struct mutex enforce_isolation_mutex;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 3e5634de077f..43d3e7b7ef03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -150,6 +150,7 @@ enum AMDGPU_DEBUG_MASK {
AMDGPU_DEBUG_HIBERNATION_THAW_RESUME_GPU = BIT(11),
AMDGPU_DEBUG_DISABLE_IP_BLOCK_SOFT_RESET = BIT(12),
AMDGPU_DEBUG_SDMA_RB_CMD = BIT(13),
+ AMDGPU_DEBUG_DISABLE_ENGINE_RESET = BIT(14),
};
unsigned int amdgpu_vram_limit = UINT_MAX;
@@ -2341,6 +2342,11 @@ static void amdgpu_init_debug_options(struct amdgpu_device *adev)
adev->debug_disable_ip_block_soft_reset = true;
}
+ if (amdgpu_debug_mask & AMDGPU_DEBUG_DISABLE_ENGINE_RESET) {
+ pr_info("debug: engine reset disabled\n");
+ adev->debug_disable_engine_reset = true;
+ }
+
if (amdgpu_debug_mask & AMDGPU_DEBUG_SDMA_RB_CMD) {
pr_info("debug: enable SDMA RB command switch\n");
adev->sdma.sdma_debug = true;
--
2.50.1
next prev parent reply other threads:[~2026-10-22 8:21 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-22 8:19 [PATCH v2 01/15] drm/amdgpu/gfx: add a reset_engine callback Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 02/15] drm/amdgpu/gfx12: add a gfx engine reset Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 03/15] drm/amdgpu/gfx11: " Jesse Zhang
2026-10-25 17:10 ` Timur Kristóf
2026-10-26 8:35 ` Zhang, Jesse(Jie)
2026-10-26 23:51 ` Timur Kristóf
2026-10-27 9:19 ` Zhang, Jesse(Jie)
2026-10-22 8:19 ` [PATCH v2 04/15] drm/amdgpu/gfx: add callbacks to read and restore the ring state of a gfx queue Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 05/15] drm/amdgpu/gfx12: " Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 06/15] drm/amdgpu/gfx11: " Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 07/15] drm/amdgpu/userq: add a helper to signal the fences of a queue up to a point Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 08/15] drm/amdgpu/userq: add helpers to keep the user queues of one engine across a reset Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 09/15] drm/amdgpu/gfx: add a gfx engine reset helper Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 10/15] drm/amdgpu/gfx: reset the gfx engine when a kernel gfx queue reset fails Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 11/15] drm/amdgpu/userq: reset the gfx engine when a gfx user " Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 12/15] drm/amdgpu: show the engine reset in the reset masks Jesse Zhang
2026-10-22 8:19 ` Jesse Zhang [this message]
2026-10-22 8:19 ` [PATCH v2 14/15] drm/amdgpu/gfx12: enable the gfx engine reset Jesse Zhang
2026-10-22 8:19 ` [PATCH v2 15/15] drm/amdgpu/gfx11: " Jesse Zhang
2026-10-25 16:48 ` [PATCH v2 01/15] drm/amdgpu/gfx: add a reset_engine callback Timur Kristóf
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