From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Pedro Barbuda <pbarbuda@microsoft.com>,
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,
Peter Maydell <peter.maydell@linaro.org>,
Mohamed Mediouni <mohamed@unpredictable.fr>
Subject: [PATCH v2 17/18] whpx: i386: save/restore pending interruption/events
Date: Tue, 27 Oct 2026 16:57:36 +0100 [thread overview]
Message-ID: <20261027155737.59271-18-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20261027155737.59271-1-mohamed@unpredictable.fr>
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
target/i386/whpx/whpx-all.c | 106 ++++++++++++++++++++++++++++++++++--
1 file changed, 102 insertions(+), 4 deletions(-)
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index d2cd8e8001..1447c777d3 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -121,10 +121,11 @@ static const WHV_REGISTER_NAME whpx_register_names[] = {
WHvX64RegisterDr2,
WHvX64RegisterDr3,
WHvX64RegisterDr6,
- WHvX64RegisterDr7
+ WHvX64RegisterDr7,
+ WHvRegisterPendingInterruption,
+ WHvRegisterPendingEvent,
/* Interrupt / Event Registers */
/*
- * WHvRegisterPendingInterruption,
* WHvRegisterInterruptState,
* WHvRegisterPendingEvent0,
* WHvRegisterPendingEvent1
@@ -694,7 +695,47 @@ void whpx_set_registers(CPUState *cpu, WHPXStateLevel level)
assert(whpx_register_names[idx] == WHvX64RegisterDr7);
vcxt.values[idx++].Reg64 = env->dr[7];
- /* Interrupt / Event Registers - Skipped */
+ /* Interrupt / Event Registers */
+
+ assert(whpx_register_names[idx] == WHvRegisterPendingInterruption);
+ if (!whpx_irqchip_in_kernel() &&
+ env->exception_pending) {
+ vcxt.values[idx].PendingInterruption.InterruptionPending = 1;
+ vcxt.values[idx].PendingInterruption.InterruptionVector = env->exception_nr;
+ vcxt.values[idx].PendingInterruption.DeliverErrorCode = env->has_error_code;
+ vcxt.values[idx].PendingInterruption.ErrorCode = env->error_code;
+ if (env->exception_is_int) {
+ vcxt.values[idx].PendingInterruption.InterruptionType = WHvX64PendingInterrupt;
+ } else if (env->nmi_pending) {
+ vcxt.values[idx].PendingInterruption.InterruptionType = WHvX64PendingNmi;
+ } else {
+ vcxt.values[idx].PendingInterruption.InterruptionType = WHvX64PendingException;
+ }
+ }
+ idx++;
+
+ assert(whpx_register_names[idx] == WHvRegisterPendingEvent);
+ if (whpx_irqchip_in_kernel() &&
+ env->exception_pending) {
+ if (!env->exception_is_int) {
+ vcxt.values[idx].ExceptionEvent.EventPending = 1;
+ vcxt.values[idx].ExceptionEvent.EventType =
+ WHvX64PendingEventException;
+ vcxt.values[idx].ExceptionEvent.Vector = env->exception_nr;
+ vcxt.values[idx].ExceptionEvent.DeliverErrorCode
+ = env->has_error_code;
+ vcxt.values[idx].ExceptionEvent.ErrorCode = env->error_code;
+ vcxt.values[idx].ExceptionEvent.ExceptionParameter =
+ env->exception_payload;
+ } else if (vcxt.values[idx].ExtIntEvent.EventType
+ == WHvX64PendingEventExtInt) {
+ vcxt.values[idx].ExtIntEvent.EventPending = 1;
+ vcxt.values[idx].ExtIntEvent.Vector = env->exception_nr;
+ } else {
+ abort();
+ }
+ }
+ idx++;
assert(idx == RTL_NUMBER_OF(whpx_register_names));
}
@@ -1091,7 +1132,64 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)
assert(whpx_register_names[idx] == WHvX64RegisterDr7);
env->dr[7] = vcxt.values[idx++].Reg64;
- /* Interrupt / Event Registers - Skipped */
+ /* Interrupt / Event Registers */
+
+ assert(whpx_register_names[idx] == WHvRegisterPendingInterruption);
+ if (!whpx_irqchip_in_kernel() &&
+ vcxt.values[idx].PendingInterruption.InterruptionPending) {
+ env->exception_pending = 1;
+ env->exception_nr =
+ vcxt.values[idx].PendingInterruption.InterruptionVector;
+ env->has_error_code =
+ vcxt.values[idx].PendingInterruption.DeliverErrorCode;
+ env->error_code =
+ vcxt.values[idx].PendingInterruption.ErrorCode;
+ if (vcxt.values[idx].PendingInterruption.InterruptionType
+ == WHvX64PendingInterrupt) {
+ env->exception_is_int = 1;
+ env->nmi_pending = 0;
+ } else if (vcxt.values[idx].PendingInterruption.InterruptionType
+ == WHvX64PendingNmi) {
+ env->exception_is_int = 0;
+ env->nmi_pending = 1;
+ } else if (vcxt.values[idx].PendingInterruption.InterruptionType
+ == WHvX64PendingException) {
+ env->exception_is_int = 0;
+ env->nmi_pending = 0;
+ } else {
+ abort();
+ }
+ }
+ idx++;
+
+ assert(whpx_register_names[idx] == WHvRegisterPendingEvent);
+ if (whpx_irqchip_in_kernel() &&
+ vcxt.values[idx].ExceptionEvent.EventPending) {
+ if (vcxt.values[idx].ExceptionEvent.EventType
+ == WHvX64PendingEventException) {
+ env->exception_pending = 1;
+ env->exception_nr =
+ vcxt.values[idx].ExceptionEvent.Vector;
+ env->has_error_code =
+ vcxt.values[idx].ExceptionEvent.DeliverErrorCode;
+ env->error_code =
+ vcxt.values[idx].ExceptionEvent.ErrorCode;
+ env->exception_payload =
+ vcxt.values[idx].ExceptionEvent.ExceptionParameter;
+ env->exception_is_int = 0;
+ env->nmi_pending = 0;
+ } else if (vcxt.values[idx].ExtIntEvent.EventType
+ == WHvX64PendingEventExtInt) {
+ env->exception_pending = 1;
+ env->exception_is_int = 1;
+ env->nmi_pending = 0;
+ env->exception_nr =
+ vcxt.values[idx].ExtIntEvent.Vector;
+ } else {
+ abort();
+ }
+ }
+ idx++;
assert(idx == RTL_NUMBER_OF(whpx_register_names));
--
2.54.0 (Apple Git-157)
next prev parent reply other threads:[~2026-10-27 15:59 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-27 15:57 [PATCH v2 00/18] whpx: i386: updates for QEMU 11.2 Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 01/18] target/i386/whpx: fix VMX capability MSR values Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 02/18] target/i386/whpx: whpx_get_xsave_state error handling Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 03/18] whpx: i386: get APIC state before VM save Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 04/18] whpx: i386: fix TPR encodings for local APIC Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 05/18] whpx: i386: save/restore xss Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 06/18] whpx: i386: make nested virtualisation init failure non-fatal Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 07/18] whpx: i386: allow migration for restricted scenarios Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 08/18] whpx: i386: avoid updating hflags for vmexits Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 09/18] target/i386/whpx: handle processor reset Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 10/18] target/arm/whpx: " Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 11/18] whpx: apic: migrate APIC implementation to new interface Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 12/18] whpx: i386: forward the dynamic EBX of CPUID[0xD] sub-leaves 0 and 1, not 1 and 2 Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 13/18] whpx: i386: do not require ProcessorFeaturesBanks on legacy Windows Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 14/18] whpx: i386: fall back to xAPIC when the MSR exit bitmap is unavailable Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 15/18] multi-target: restrict whpx-accel-*-cpu to matching target Mohamed Mediouni
2026-10-27 15:57 ` [PATCH v2 16/18] whpx: i386: also save debug registers Mohamed Mediouni
2026-10-27 15:57 ` Mohamed Mediouni [this message]
2026-10-27 15:57 ` [PATCH v2 18/18] whpx: docs: update for experimental VM save/restore support Mohamed Mediouni
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