[PATCH v1 0/6] riscv: dts: spacemit: Improve K1 SPL support

[PATCH v1 0/6] riscv: dts: spacemit: Improve K1 SPL support

[Anand Moon]

This series improves U-Boot support for SpacemiT K1-based boards by
consolidating common device tree configuration and enabling GPIO and
pinctrl support during SPL initialization.

It also improves the SpacemiT SDHCI driver's voltage-switching
diagnostics and handling of missing pinctrl states, making SD card
initialization more robust across board configurations.

This series builds on the upstream changes proposed here:
[1] https://lore.kernel.org/all/20261024092558.143621-1-alan.tseng.cs@gmail.com/

The SpacemiT SPL uses the P1 PMIC to initialize the regulator
framework and enable the SD card and eMMC interfaces. Since boards
may use different device tree node names for vmmc-supply and
vqmmc-supply, the regulator configuration must be handled
appropriately for each board.

This series used above series to marks the nodes required during early
initialization with bootph-pre-ram, including SoC clocks, UART, boot media,
I2C buses, EEPROM, PMIC rails, and SPI NOR flash. This ensures that the
required devices are available during SPL execution.

Additionally, the series moves the I2C8-related nodes required for
regulator configuration into the respective board device trees.
This avoids duplicated board-specific settings in the shared
spacemit-k1-u-boot.dtsi and keeps the common K1 configuration minimal
and easier to maintain.

Tested on the Banana Pi BPI-F3 board.

Thanks,
Anand

Anand Moon (6):
  riscv: dts: spacemit: Clean Up K1 U-Boot Device Tree for SPL
    Initialization
  mmc: spacemit_sdhci: Improve voltage switching diagnostics
  mmc: spacemit_sdhci: Handle missing pinctrl states
  gpio: spacemit: Add SPL support for K1 GPIO driver
  pinctrl: spacemit: Add SPL support for K1 pinctrl driver
  configs: spacemit_k1: Enable SPL GPIO and pinctrl support

 arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi     | 121 ------------------
 arch/riscv/dts/spacemit-k1-binman.dtsi        |  29 +++++
 ...ro-u-boot.dtsi => spacemit-k1-u-boot.dtsi} |  80 +++++-------
 configs/spacemit_k1_defconfig                 |  20 ++-
 drivers/gpio/Kconfig                          |   7 +
 drivers/mmc/spacemit_sdhci.c                  | 118 ++++++++++++-----
 drivers/pinctrl/spacemit/Kconfig              |   8 ++
 7 files changed, 174 insertions(+), 209 deletions(-)
 delete mode 100644 arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi
 create mode 100644 arch/riscv/dts/spacemit-k1-binman.dtsi
 rename arch/riscv/dts/{k1-musepi-pro-u-boot.dtsi => spacemit-k1-u-boot.dtsi} (66%)


base-commit: 03e45557e1f38a39a0c80fe30483130ff376cf92
-- 
2.56.0

[PATCH v1 1/6] riscv: dts: spacemit: Clean Up K1 U-Boot Device Tree for SPL Initialization

[Anand Moon]

Consolidate common SpacemiT K1 U-Boot device tree configuration into
spacemit-k1-u-boot.dtsi, replacing the MusePi Pro and Banana Pi F3
specific overlays with a shared K1 configuration.

Separate the Binman layout and DDR firmware packaging into
spacemit-k1-binman.dtsi, keeping image generation independent of
board-specific bring-up.

Keep common clock, UART, I2C, GPIO, and pinctrl settings in the shared
DTSI to support SPL initialization and reduce duplicated board-specific
configuration.

Move the I2C8 regulator configuration to dts/upstream so regulators
can be mapped by name to the corresponding nodes in the board device
trees.

These changes provide a cleaner foundation for migrating peripheral
configuration to the upstream device trees while minimizing duplicated
settings across SpacemiT K1 boards.

Cc: Dave Klotz <DaveWK225@protonmail.com>
Cc: Eric Chung <eric.chung@riscstar.com>
Cc: Hung-Chun Tseng <alan.tseng.cs@gmail.com>
Cc: E Shattow <e@freeshell.de>
Cc: Yixun Lan <dlan@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi     | 121 ------------------
 arch/riscv/dts/spacemit-k1-binman.dtsi        |  29 +++++
 ...ro-u-boot.dtsi => spacemit-k1-u-boot.dtsi} |  80 +++++-------
 3 files changed, 59 insertions(+), 171 deletions(-)
 delete mode 100644 arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi
 create mode 100644 arch/riscv/dts/spacemit-k1-binman.dtsi
 rename arch/riscv/dts/{k1-musepi-pro-u-boot.dtsi => spacemit-k1-u-boot.dtsi} (66%)

diff --git a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi
deleted file mode 100644
index 3077cdee55d..00000000000
--- a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi
+++ /dev/null
@@ -1,121 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright (C) 2026 RISCstar Ltd.
- */
-
-#include "binman.dtsi"
-
-/ {
-	memory@0 {
-		device_type = "memory";
-		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
-	};
-};
-
-&uart0 {
-	bootph-pre-ram;
-};
-
-&osc_32k {
-	bootph-pre-ram;
-};
-
-&vctcxo_1m {
-	bootph-pre-ram;
-};
-
-&vctcxo_3m {
-	bootph-pre-ram;
-};
-
-&vctcxo_24m {
-	bootph-pre-ram;
-};
-
-&syscon_mpmu {
-	bootph-pre-ram;
-};
-
-&pll {
-	bootph-pre-ram;
-};
-
-&syscon_apmu {
-	bootph-pre-ram;
-};
-
-&syscon_apbc {
-	bootph-pre-ram;
-};
-
-&i2c2 {
-	bootph-pre-ram;
-
-	eeprom@50 {
-		bootph-pre-ram;
-	};
-};
-
-/*
- * The kernel pmic@41 nodes use the standard regulator-* properties only;
- * U-Boot's regulator framework looks up suppliers by `regulator-name`.
- * Carry the U-Boot-specific names (vdd_core / vdd_1v8 / vdd_1v8_mmc) here
- * so SPL can program the bucks that DDR training depends on.
- */
-&i2c8 {
-	bootph-pre-ram;
-
-	pmic@41 {
-		bootph-pre-ram;
-
-		regulators {
-			buck1 {
-				regulator-name = "vdd_core";
-				bootph-pre-ram;
-			};
-
-			buck3 {
-				regulator-name = "vdd_1v8";
-				bootph-pre-ram;
-			};
-
-			aldo1 {
-				regulator-name = "vdd_1v8_mmc";
-				bootph-pre-ram;
-			};
-		};
-	};
-};
-
-&emmc {
-	bootph-pre-ram;
-	max-frequency = <204800000>;
-};
-
-&sdhci0 {
-	bootph-pre-ram;
-	max-frequency = <204800000>;
-};
-
-&binman {
-	u-boot-spl-ddr {
-		type = "section";
-		filename = "u-boot-spl-ddr.bin";
-		pad-byte = <0xff>;
-
-		u-boot-spl {
-		};
-
-		ddr-fw {
-			type = "blob";
-			filename = "ddr_fw.bin";
-			align = <64>;
-		};
-
-		u-boot-any {
-			type = "section";
-			size = <0>;
-			offset = <0>;
-		};
-	};
-};
diff --git a/arch/riscv/dts/spacemit-k1-binman.dtsi b/arch/riscv/dts/spacemit-k1-binman.dtsi
new file mode 100644
index 00000000000..2ff6bd2cc43
--- /dev/null
+++ b/arch/riscv/dts/spacemit-k1-binman.dtsi
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright (C) 2026 RISCstar Ltd.
+ */
+
+#include "binman.dtsi"
+
+&binman {
+	u-boot-spl-ddr {
+		type = "section";
+		filename = "u-boot-spl-ddr.bin";
+		pad-byte = <0xff>;
+
+		u-boot-spl {
+		};
+
+		ddr-fw {
+			type = "blob";
+			filename = "ddr_fw.bin";
+			align = <64>;
+		};
+
+		u-boot-any {
+			type = "section";
+			size = <0>;
+			offset = <0>;
+		};
+	};
+};
diff --git a/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi b/arch/riscv/dts/spacemit-k1-u-boot.dtsi
similarity index 66%
rename from arch/riscv/dts/k1-musepi-pro-u-boot.dtsi
rename to arch/riscv/dts/spacemit-k1-u-boot.dtsi
index d6299c96949..94107da3e5f 100644
--- a/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi
+++ b/arch/riscv/dts/spacemit-k1-u-boot.dtsi
@@ -4,12 +4,13 @@
  */
 
 #include <dt-bindings/clock/spacemit,k1-syscon.h>
-#include "binman.dtsi"
 
 / {
 	aliases {
 		console = &uart0;
 		serial0 = &uart0;
+		mmc0 = &emmc;
+		mmc1 = &sdhci0;
 	};
 
 	chosen {
@@ -83,77 +84,56 @@
 	};
 };
 
-&i2c8 {
+&qspi {
 	bootph-pre-ram;
 	status = "okay";
 
-	pmic@41 {
+	flash@0 {
+		reg = <0>;
+		spi-max-frequency = <50000000>;
 		bootph-pre-ram;
-		compatible = "spacemit,p1";
-		reg = <0x41>;
-		interrupts = <64>;
 		status = "okay";
-
-		regulators {
-			buck1 {
-				bootph-pre-ram;
-				regulator-name = "vdd_core";
-			};
-
-			buck3_1v8: buck3 {
-				bootph-pre-ram;
-				regulator-name = "vdd_1v8";
-			};
-
-			aldo1 {
-				bootph-pre-ram;
-				regulator-name = "vdd_1v8_mmc";
-			};
-
-		};
 	};
 };
 
-&qspi {
+&qspi_cfg {
 	bootph-pre-ram;
-	status = "okay";
-
-	flash@0 {
-		bootph-pre-ram;
-		status = "okay";
-	};
 };
 
 &emmc {
+	compatible = "spacemit,k1-sdhci";
 	bootph-pre-ram;
 	max-frequency = <204800000>;
+	status = "okay";
 };
 
 &sdhci0 {
+	compatible = "spacemit,k1-sdhci";
 	bootph-pre-ram;
-	cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+	pinctrl-names = "default", "uhs";
 	max-frequency = <204800000>;
+	pinctrl-0 = <&mmc1_cfg>;
+	pinctrl-1 = <&mmc1_uhs_cfg>;
+	status = "okay";
 };
 
-&binman {
-	u-boot-spl-ddr {
-		type = "section";
-		filename = "u-boot-spl-ddr.bin";
-		pad-byte = <0xff>;
+&pinctrl {
+	bootph-pre-ram;
+	status = "okay";
+};
 
-		u-boot-spl {
-		};
+&gpio {
+	bootph-pre-ram;
+	status = "okay";
+};
 
-		ddr-fw {
-			type = "blob";
-			filename = "ddr_fw.bin";
-			align = <64>;
-		};
+&mmc1_cfg {
+	bootph-pre-ram;
+};
 
-		u-boot-any {
-			type = "section";
-			size = <0>;
-			offset = <0>;
-		};
-	};
+&mmc1_uhs_cfg {
+	bootph-pre-ram;
 };
+
+/* Keep the existing binman layout and DDR firmware section. */
+#include "spacemit-k1-binman.dtsi"
-- 
2.56.0

[PATCH v1 2/6] mmc: spacemit_sdhci: Improve voltage switching diagnostics

[Anand Moon]

Improve error reporting when setting or enabling the VQMMC
regulator fails.

Refactor voltage handling to determine the target signal voltage
before updating the regulator, and report failures when the
SDHCI voltage-switch bit does not reflect the requested state.

Keep the SDHCI host-control voltage-bit handling specific to SD
devices, while allowing the VQMMC regulator to be configured
for other MMC device types.

Cc: Dave Klotz <DaveWK225@protonmail.com>
Cc: Eric Chung <eric.chung@riscstar.com>
Cc: Hung-Chun Tseng <alan.tseng.cs@gmail.com>
Cc: E Shattow <e@freeshell.de>
Cc: Yixun Lan <dlan@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 drivers/mmc/spacemit_sdhci.c | 85 ++++++++++++++++++++++--------------
 1 file changed, 53 insertions(+), 32 deletions(-)

diff --git a/drivers/mmc/spacemit_sdhci.c b/drivers/mmc/spacemit_sdhci.c
index f5578f38bdd..836201ce83c 100644
--- a/drivers/mmc/spacemit_sdhci.c
+++ b/drivers/mmc/spacemit_sdhci.c
@@ -222,15 +222,26 @@ static int spacemit_sdhci_set_vqmmc_voltage(struct mmc *mmc, int voltage)
 #if CONFIG_IS_ENABLED(DM_REGULATOR)
 	int ret;
 
-	if (!mmc->vqmmc_supply)
+	/*
+	 * eMMC VCCQ is fixed at 1.8V on the BPI-F3.
+	 * Do not attempt to switch its VQMMC regulator.
+	 */
+	if (!IS_SD(mmc) || !mmc->vqmmc_supply)
 		return 0;
 
 	ret = regulator_set_value(mmc->vqmmc_supply, voltage);
-	if (ret)
+	if (ret) {
+		log_err("%s: failed to set VQMMC to %d uV: %d\n",
+			mmc->dev->name, voltage, ret);
 		return ret;
+	}
+
 	ret = regulator_set_enable_if_allowed(mmc->vqmmc_supply, true);
-	if (ret)
+	if (ret) {
+		log_err("%s: failed to enable VQMMC: %d\n",
+			mmc->dev->name, ret);
 		return ret;
+	}
 #endif
 	return 0;
 }
@@ -239,44 +250,54 @@ static void spacemit_sdhci_set_voltage(struct sdhci_host *host)
 {
 	if (IS_ENABLED(CONFIG_MMC_IO_VOLTAGE)) {
 		struct mmc *mmc = host->mmc;
+		bool to_180, ok;
+		int voltage_uv, ret;
 		u32 ctrl;
 
-		ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-
 		switch (mmc->signal_voltage) {
 		case MMC_SIGNAL_VOLTAGE_330:
-		case MMC_SIGNAL_VOLTAGE_180: {
-			bool to_180 = mmc->signal_voltage ==
-				      MMC_SIGNAL_VOLTAGE_180;
-			bool ok;
-			int voltage_mv = to_180 ? 1800000 : 3300000;
-
-			if (spacemit_sdhci_set_vqmmc_voltage(mmc, voltage_mv))
-				return;
-			if (!IS_SD(mmc))
-				return;
-			if (to_180)
-				ctrl |= SDHCI_CTRL_VDD_180;
-			else
-				ctrl &= ~SDHCI_CTRL_VDD_180;
-			sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
-
-			mdelay(5);
-
-			ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-			ok = !!(ctrl & SDHCI_CTRL_VDD_180) == to_180;
-			if (ok)
-				return;
-
-			log_err("%d.%dV regulator output not stable\n",
-				voltage_mv / 1000000,
-				(voltage_mv / 100000) % 10);
+			to_180 = false;
+			voltage_uv = 3300000;
+			break;
+		case MMC_SIGNAL_VOLTAGE_180:
+			to_180 = true;
+			voltage_uv = 1800000;
 			break;
-		}
 		default:
 			/* No signal voltage switch required */
 			return;
 		}
+
+		ret = spacemit_sdhci_set_vqmmc_voltage(mmc, voltage_uv);
+		if (ret) {
+			log_err("%s: VQMMC switch to %d uV failed: %d\n",
+				mmc->dev->name, voltage_uv, ret);
+			return;
+		}
+
+		/*
+		 * Non-SD devices may not use the SD Host Control 2
+		 * voltage-switch bit. Keep their handling separate.
+		 */
+		if (!IS_SD(mmc))
+			return;
+
+		ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+
+		if (to_180)
+			ctrl |= SDHCI_CTRL_VDD_180;
+		else
+			ctrl &= ~SDHCI_CTRL_VDD_180;
+
+		sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
+		mdelay(5);
+
+		ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+		ok = !!(ctrl & SDHCI_CTRL_VDD_180) == to_180;
+		if (!ok) {
+			log_err("%s: SDHCI voltage bit did not switch to %d uV\n",
+				mmc->dev->name, voltage_uv);
+		}
 	}
 }
 
-- 
2.56.0

[PATCH v1 3/6] mmc: spacemit_sdhci: Handle missing pinctrl states

[Anand Moon]

Check for available pinctrl states before selecting them in the
SpacemiT SDHCI driver.

Skip pinctrl selection when the device does not define a default
state, allowing eMMC configurations without pinctrl properties
to work without spurious pinctrl errors.

Select the UHS pinctrl state only when it is defined, and log
errors when pinctrl state selection fails.

Cc: Dave Klotz <DaveWK225@protonmail.com>
Cc: Eric Chung <eric.chung@riscstar.com>
Cc: Hung-Chun Tseng <alan.tseng.cs@gmail.com>
Cc: E Shattow <e@freeshell.de>
Cc: Yixun Lan <dlan@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 drivers/mmc/spacemit_sdhci.c | 33 ++++++++++++++++++++++++++++++---
 1 file changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/spacemit_sdhci.c b/drivers/mmc/spacemit_sdhci.c
index 836201ce83c..668555b94e1 100644
--- a/drivers/mmc/spacemit_sdhci.c
+++ b/drivers/mmc/spacemit_sdhci.c
@@ -355,10 +355,27 @@ static int spacemit_sdhci_get_b_max(struct udevice *dev, void *dst,
 	return mmc->cfg->b_max;
 }
 
+static bool spacemit_sdhci_has_pinctrl_state(struct udevice *dev,
+					     const char *state_name)
+{
+	char propname[20];
+	int state;
+
+	state = dev_read_stringlist_search(dev, "pinctrl-names",
+					   state_name);
+	if (state < 0)
+		return false;
+
+	snprintf(propname, sizeof(propname), "pinctrl-%d", state);
+
+	return !!dev_read_prop(dev, propname, NULL);
+}
+
 static void spacemit_sdhci_set_control_reg(struct sdhci_host *host)
 {
 	struct mmc *mmc = host->mmc;
 	u32 reg;
+	int ret;
 
 	spacemit_sdhci_set_voltage(host);
 
@@ -383,16 +400,26 @@ static void spacemit_sdhci_set_control_reg(struct sdhci_host *host)
 	sdhci_writel(host, reg, SPACEMIT_SDHC_TX_CFG_REG);
 
 	/* Set pinctrl state based on selected timing mode */
-	if (IS_ENABLED(CONFIG_PINCTRL)) {
+	if (IS_ENABLED(CONFIG_PINCTRL) &&
+	    spacemit_sdhci_has_pinctrl_state(mmc->dev, "default")) {
 		switch (mmc->selected_mode) {
 		case UHS_SDR12:
 		case UHS_SDR25:
 		case UHS_SDR50:
 		case UHS_SDR104:
-			pinctrl_select_state(mmc->dev, "uhs");
+			if (spacemit_sdhci_has_pinctrl_state(mmc->dev, "uhs")) {
+				ret = pinctrl_select_state(mmc->dev, "uhs");
+				if (ret)
+					log_err("SDHCI %s: uhs pinctrl selection failed: %d\n",
+						mmc->dev->name, ret);
+			}
 			break;
+
 		default:
-			pinctrl_select_state(mmc->dev, "default");
+			ret = pinctrl_select_state(mmc->dev, "default");
+			if (ret)
+				log_err("SDHCI %s: default pinctrl selection failed: %d\n",
+					mmc->dev->name, ret);
 			break;
 		}
 	}
-- 
2.56.0

[PATCH v1 4/6] gpio: spacemit: Add SPL support for K1 GPIO driver

[Anand Moon]

Add SPL_SPACEMIT_GPIO to enable the SpacemiT K1 GPIO driver
during SPL initialization.

Depend on SPL_DM_GPIO and TARGET_SPACEMIT_K1, and select
SPACEMIT_GPIO to reuse the existing driver implementation.

This allows SPL to access GPIOs required for early board
initialization.

Cc: Dave Klotz <DaveWK225@protonmail.com>
Cc: Eric Chung <eric.chung@riscstar.com>
Cc: Hung-Chun Tseng <alan.tseng.cs@gmail.com>
Cc: E Shattow <e@freeshell.de>
Cc: Yixun Lan <dlan@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 drivers/gpio/Kconfig | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 7f12e39dad8..3be6a9e54fa 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -457,6 +457,13 @@ config SPACEMIT_GPIO
 	  arranged into a number of banks (different for each SoC type) each
 	  with 32 GPIOs.
 
+config SPL_SPACEMIT_GPIO
+	bool "Spacemit K1 GPIO driver in SPL"
+	 depends on SPL_DM_GPIO && TARGET_SPACEMIT_K1
+	 select SPACEMIT_GPIO
+	 help
+	   Enable the Spacemit K1 GPIO driver in SPL.
+	   This allows SPL to configure GPIOs during early board initialization.
 
 config SUNXI_GPIO
 	bool "Allwinner GPIO driver"
-- 
2.56.0

[PATCH v1 5/6] pinctrl: spacemit: Add SPL support for K1 pinctrl driver

[Anand Moon]

Add `SPL_PINCTRL_SPACEMIT_K1` to enable the SpacemiT K1
pinctrl driver during SPL initialization.

Depend on `SPL_PINCTRL`, `SPL_DM`, and `PINCTRL_GENERIC`,
and select `PINCTRL_SPACEMIT_K1` to reuse the existing
driver implementation.

This allows SPL to configure pin multiplexing for early
board initialization.

Cc: Dave Klotz <DaveWK225@protonmail.com>
Cc: Eric Chung <eric.chung@riscstar.com>
Cc: Hung-Chun Tseng <alan.tseng.cs@gmail.com>
Cc: E Shattow <e@freeshell.de>
Cc: Yixun Lan <dlan@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 drivers/pinctrl/spacemit/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/pinctrl/spacemit/Kconfig b/drivers/pinctrl/spacemit/Kconfig
index 87cba336923..5770e4865d9 100644
--- a/drivers/pinctrl/spacemit/Kconfig
+++ b/drivers/pinctrl/spacemit/Kconfig
@@ -7,3 +7,11 @@ config PINCTRL_SPACEMIT_K1
 	  The driver is controlled by a device tree node which contains both
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
+
+config SPL_PINCTRL_SPACEMIT_K1
+	bool "Spacemit K1 pinctrl driver in SPL"
+	depends on SPL_PINCTRL && SPL_DM && PINCTRL_GENERIC
+	select PINCTRL_SPACEMIT_K1
+	help
+	  Enable the Spacemit K1 pinctrl driver in SPL.
+	  This allows SPL to configure pinctrl during early board initialization.
-- 
2.56.0

[PATCH v1 6/6] configs: spacemit_k1: Enable SPL GPIO and pinctrl support

[Anand Moon]

Enable GPIO and pinctrl support in SPL for SpacemiT K1 boards
to support early board initialization and SD card boot.

Enable SPL MMC I/O voltage switching and configure the shared
K1 U-Boot device tree include for the supported boards.

Also enable MTD and SPI NOR partition support with the default
flash partition layout.

Configure a 2 MiB SPL simple malloc buffer for early allocations.
Enable regulator commands, SPL GPIO and pinctrl support, and
SPL MMC I/O voltage switching.

Cc: Dave Klotz <DaveWK225@protonmail.com>
Cc: Eric Chung <eric.chung@riscstar.com>
Cc: Hung-Chun Tseng <alan.tseng.cs@gmail.com>
Cc: E Shattow <e@freeshell.de>
Cc: Yixun Lan <dlan@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 configs/spacemit_k1_defconfig | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/configs/spacemit_k1_defconfig b/configs/spacemit_k1_defconfig
index 8ee9baa13b7..04b5ec4f700 100644
--- a/configs/spacemit_k1_defconfig
+++ b/configs/spacemit_k1_defconfig
@@ -3,10 +3,10 @@ CONFIG_SYS_MALLOC_LEN=0x1000000
 CONFIG_SYS_MALLOC_F_LEN=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1200000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="spacemit/k1-musepi-pro"
+CONFIG_DEFAULT_DEVICE_TREE="spacemit/k1-bananapi-f3"
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_MMC=y
 CONFIG_SPL_STACK_R_ADDR=0xc00000
@@ -63,10 +63,12 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_EXT4=y
+CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_FAT=y
 CONFIG_EFI_PARTITION=y
 CONFIG_OF_UPSTREAM=y
-CONFIG_OF_LIST="spacemit/k1-bananapi-f3 spacemit/k1-musepi-pro"
+CONFIG_DEVICE_TREE_INCLUDES="spacemit-k1-u-boot.dtsi"
+CONFIG_OF_LIST="spacemit/k1-bananapi-f3 spacemit/k1-musepi-pro spacemit/k1-milkv-jupiter"
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -117,3 +119,15 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_SPL_LIB_RATIONAL=y
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_DM_GPIO=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_SPACEMIT_GPIO=y
+CONFIG_SPL_PINCTRL_SPACEMIT_K1=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_CMD_MTD=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
+CONFIG_MTDPARTS_DEFAULT="spi0.0:128k(bootinfo),512k(fsbl),64k(env),1024k(esos),384k(opensbi),-(uboot)"
-- 
2.56.0