[RFC v1 0/3] drm/i915/vrr: HDMI 2.1 VRR support

[Alan Stead <alan.stead@intel.com>]

Variable Refresh Rate is currently only enabled for DP/eDP. This series
enables it on HDMI 2.1 sinks that advertise a VRR range in the HDMI Forum
VSDB, for display version 20+.

HDMI 2.1 VRR is signalled to the sink with a Video Timing Extended
Metadata (VTEM) packet sent through the HDMI EMP registers. The VRR
timing generator programming already in the driver is reused as is. The
series adds:

 1. The EMP transmission line for HDMI: send the EMPs on the 2nd line of
    the V. Blank instead of the start of the VSYNC pulse used for the DP
    AS SDP.
 2. The VTEM packet, written when VRR is enabled and disabled.
 3. Enabling VRR (and the vrr_capable property) on HDMI, using the VRR
    range that the DRM core now parses into display_info.hdmi.vrr_cap.

The patches are ordered so that HDMI VRR stays disabled until the last
one.

Testing: related implementations have been exercised on a WCL
(display version 30) board with an HDMI 2.1 VRR monitor advertising
48-120 Hz. With VRR enabled, measured vblank intervals were
approximately 20.83 ms (48 Hz) at idle and 16.67 ms (60 Hz) during
verified atomic page flipping. Fullscreen glmark2 under GNOME Wayland
also enabled VRR, with intervals predominantly at 60 Hz and occasional
longer intervals up to 20.83 ms. VTEM enable/disable programming was
observed in the driver logs.

Alan Stead (3):
  drm/i915/dip: Send HDMI EMPs early in V. Blank when VRR is in range
  drm/i915/dip: Send the HDMI 2.1 VTEM when VRR is enabled
  drm/i915/vrr: Allow VRR on HDMI 2.1 sinks

 drivers/gpu/drm/i915/display/intel_dip.c      | 94 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dip.h      |  2 +
 drivers/gpu/drm/i915/display/intel_dip_regs.h | 17 ++++
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  8 ++
 drivers/gpu/drm/i915/display/intel_vrr.c      | 58 ++++++++++--
 5 files changed, 170 insertions(+), 9 deletions(-)

-- 
2.53.0