[RFC v1 1/3] drm/i915/dip: Send HDMI EMPs early in V. Blank when VRR is in range

[Alan Stead <alan.stead@intel.com>]

EMP_AS_SDP_TL defines the line, counted back from the next V. Active, on
which HDMI 2.1 Extended Metadata Packets (EMPs) and DP Adaptive Sync SDPs
are sent. It is always programmed to the start of the VSYNC pulse, which
is right for the DP AS SDP, but HDMI 2.1 expects EMPs (such as the VTEM
used to signal VRR) within the first half of V. Blank.

When VRR is in range on an HDMI output, send the EMPs on the 2nd line of
the V. Blank instead, keeping the line within the SCL + guardband region
as required by the hardware. Nothing changes for DP/eDP or for HDMI
outputs where VRR is not in range.

HDMI VRR is not enabled by the driver yet, so this has no effect until
the following patches.

Signed-off-by: Alan Stead <alan.stead@intel.com>
Assisted-by: LLM
---
 drivers/gpu/drm/i915/display/intel_dip.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
index f447150ff7bc..831881e6c15e 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.c
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -19,6 +19,25 @@ static int intel_dip_get_as_sdp_transmission_line(const struct intel_crtc_state
 	if (!HAS_EMP_AS_SDP_TL(display))
 		return 0;
 
+	/*
+	 * HDMI 2.1 expects the EMPs (such as the VTEM used for VRR) within
+	 * the first half of V. Blank, so send them on the 2nd line of the
+	 * V. Blank rather than at the start of the VSYNC pulse. The line
+	 * must also stay within the SCL + guardband region.
+	 */
+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&
+	    crtc_state->vrr.in_range) {
+		const struct drm_display_mode *mode = &crtc_state->hw.adjusted_mode;
+		int max_tl = crtc_state->set_context_latency +
+			crtc_state->vrr.guardband - 1;
+		int tl = mode->crtc_vtotal - mode->crtc_vdisplay - 1;
+
+		if (max_tl > 0)
+			tl = min(tl, max_tl);
+
+		return tl;
+	}
+
 	/*
 	 * EMP_AS_SDP_TL defines the T1 position as the default AS SDP
 	 * Transmission Line, which corresponds to the start of the
-- 
2.53.0