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From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Mohamed Mediouni <mohamed@unpredictable.fr>,
	Pedro Barbuda <pbarbuda@microsoft.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,
	Doug Cook <dcook@microsoft.com>
Subject: [PULL 01/13] target/i386/whpx: fix VMX capability MSR values
Date: Sun,  8 Nov 2026 02:53:51 -0700	[thread overview]
Message-ID: <20261108095403.70813-2-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20261108095403.70813-1-mohamed@unpredictable.fr>

From: Doug Cook <dcook@microsoft.com>

whpx_get_supported_msr_feature() had two bugs in how it reports the
VMX control MSRs:

- MSR_IA32_VMX_TRUE_PINBASED_CTLS and MSR_IA32_VMX_TRUE_PROCBASED_CTLS
  were queried using the non-TRUE capability codes
  (WHvCapabilityCodeVmxPinbasedCtls and WHvCapabilityCodeVmxProcbasedCtls).

- For PROCBASED_CTLS2 and the four TRUE_* control MSRs, the raw
  allowed-0/allowed-1 pair was returned. The feature-word code expects
  only the bits that may be 1 but are not required to be 1. Apply the
  same transformation as kvm_arch_get_supported_msr_feature();
  make_vmx_msr_value() adds the must-be-one bits back afterwards.

As a result, with +vmx QEMU treated many VMX features the host does
support (secondary controls, EPT, VPID, MSR bitmaps, ...) as missing,
warned about each of them, and dropped them from the CPU model. The
guest itself reads the VMX MSRs from the hypervisor, not from QEMU,
so this did not change what the guest saw.

Signed-off-by: Doug Cook <dcook@microsoft.com>
Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
 target/i386/whpx/whpx-all.c | 29 +++++++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index 113f79afb9..1386affa9c 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -1452,10 +1452,10 @@ uint64_t whpx_get_supported_msr_feature(uint32_t index)
         cap = WHvCapabilityCodeVmxEptVpidCap;
         break;
     case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
-        cap = WHvCapabilityCodeVmxPinbasedCtls;
+        cap = WHvCapabilityCodeVmxTruePinbasedCtls;
         break;
     case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
-        cap = WHvCapabilityCodeVmxProcbasedCtls;
+        cap = WHvCapabilityCodeVmxTrueProcbasedCtls;
         break;
     case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
         cap = WHvCapabilityCodeVmxTrueEntryCtls;
@@ -1474,6 +1474,31 @@ uint64_t whpx_get_supported_msr_feature(uint32_t index)
         if (FAILED(hr)) {
             return 0;
         }
+
+        switch (index) {
+        case MSR_IA32_VMX_PROCBASED_CTLS2:
+        case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
+        case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
+        case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
+        case MSR_IA32_VMX_TRUE_EXIT_CTLS: {
+            /*
+             * These MSRs hold the allowed-0 settings in the low half and the
+             * allowed-1 settings in the high half.  QEMU's feature words want
+             * only the bits that can be one but do not have to be one, so
+             * apply the same transformation as
+             * kvm_arch_get_supported_msr_feature(); make_vmx_msr_value()
+             * restores the must-be-one bits later.
+             */
+            uint32_t must_be_one = (uint32_t)val;
+            uint32_t can_be_one = (uint32_t)(val >> 32);
+
+            val = can_be_one & ~must_be_one;
+            break;
+        }
+        default:
+            break;
+        }
+
         return val;
     }
     return 0;
-- 
2.54.0 (Apple Git-157)



  reply	other threads:[~2026-11-08  9:55 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-08  9:53 [PULL 00/13] Whpx fix 0 patches Mohamed Mediouni
2026-11-08  9:53 ` Mohamed Mediouni [this message]
2026-11-08  9:53 ` [PULL 02/13] target/i386/whpx: whpx_get_xsave_state error handling Mohamed Mediouni
2026-11-08  9:53 ` [PULL 03/13] whpx: i386: get APIC state before VM save Mohamed Mediouni
2026-11-08  9:53 ` [PULL 04/13] whpx: i386: fix TPR encodings for local APIC Mohamed Mediouni
2026-11-08  9:53 ` [PULL 05/13] whpx: i386: save/restore xss Mohamed Mediouni
2026-11-08  9:53 ` [PULL 06/13] whpx: i386: make nested virtualisation init failure non-fatal Mohamed Mediouni
2026-11-08  9:53 ` [PULL 07/13] whpx: i386: avoid updating hflags for vmexits Mohamed Mediouni
2026-11-08  9:53 ` [PULL 08/13] target/i386/whpx: handle processor reset Mohamed Mediouni
2026-11-08  9:53 ` [PULL 09/13] target/arm/whpx: " Mohamed Mediouni
2026-11-08  9:54 ` [PULL 10/13] whpx: i386: forward the dynamic EBX of CPUID[0xD] sub-leaves 0 and 1, not 1 and 2 Mohamed Mediouni
2026-11-08  9:54 ` [PULL 11/13] whpx: i386: do not require ProcessorFeaturesBanks on legacy Windows Mohamed Mediouni
2026-11-08  9:54 ` [PULL 12/13] whpx: i386: fall back to xAPIC when the MSR exit bitmap is unavailable Mohamed Mediouni
2026-11-08  9:54 ` [PULL 13/13] whpx: i386: also save debug registers Mohamed Mediouni
2026-11-08 19:01 ` [PULL 00/13] Whpx fix 0 patches Alex Bennée
2026-11-09  0:41   ` Mohamed Mediouni
  -- strict thread matches above, loose matches on Subject: below --
2026-11-09  0:40 [PULL 00/13] whpx: QEMU 11.2 pull request Mohamed Mediouni
2026-11-09  0:40 ` [PULL 01/13] target/i386/whpx: fix VMX capability MSR values Mohamed Mediouni

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