From: Eric DeVolder <eric_devolder@yahoo.com>
To: qemu-devel@nongnu.org
Cc: Eric DeVolder <eric_devolder@yahoo.com>
Subject: [PATCH 1/2] target/ppc: Let mtmsr set MSR[ME] on 32-bit PowerPC
Date: Tue, 10 Nov 2026 10:44:42 -0600 [thread overview]
Message-ID: <20261110164443.488899-1-eric_devolder@yahoo.com> (raw)
In-Reply-To: 20261110164443.488899-1-eric_devolder.ref@yahoo.com
On the 32-bit processors (601, 603, 604, 750, 74xx) mtmsr does set ME,
and permits machine checks, otherwise machine check ends in a checkstop.
Signed-off-by: Eric DeVolder <eric_devolder@yahoo.com>
---
target/ppc/translate.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 06ed2adf10..808f913aa2 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4282,8 +4282,12 @@ static void gen_mtmsr(DisasContext *ctx)
mask &= (1ULL << MSR_RI) | (1ULL << MSR_EE);
} else {
if (likely(!(ctx->insns_flags2 & PPC2_PPE42))) {
- /* mtmsr does not alter S, ME, or LE */
- mask &= ~((1ULL << MSR_LE) | (1ULL << MSR_ME) | (1ULL << MSR_S));
+ /* mtmsr does not alter S or LE */
+ mask &= ~((1ULL << MSR_LE) | (1ULL << MSR_S));
+ /* nor ME, on the 64-bit server processors; the 6xx can */
+ if (is_book3s_arch2x(ctx)) {
+ mask &= ~(1ULL << MSR_ME);
+ }
}
/*
--
2.53.0
next parent reply other threads:[~2026-11-10 16:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20261110164443.488899-1-eric_devolder.ref@yahoo.com>
2026-11-10 16:44 ` Eric DeVolder [this message]
2026-11-10 16:44 ` [PATCH 2/2] target/ppc: Raise a machine check on a failed bus access on 6xx Eric DeVolder
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