* [PATCH 1/2] target/ppc: Let mtmsr set MSR[ME] on 32-bit PowerPC [not found] <20261110164443.488899-1-eric_devolder.ref@yahoo.com> @ 2026-11-10 16:44 ` Eric DeVolder 2026-11-10 16:44 ` [PATCH 2/2] target/ppc: Raise a machine check on a failed bus access on 6xx Eric DeVolder 0 siblings, 1 reply; 2+ messages in thread From: Eric DeVolder @ 2026-11-10 16:44 UTC (permalink / raw) To: qemu-devel; +Cc: Eric DeVolder On the 32-bit processors (601, 603, 604, 750, 74xx) mtmsr does set ME, and permits machine checks, otherwise machine check ends in a checkstop. Signed-off-by: Eric DeVolder <eric_devolder@yahoo.com> --- target/ppc/translate.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 06ed2adf10..808f913aa2 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4282,8 +4282,12 @@ static void gen_mtmsr(DisasContext *ctx) mask &= (1ULL << MSR_RI) | (1ULL << MSR_EE); } else { if (likely(!(ctx->insns_flags2 & PPC2_PPE42))) { - /* mtmsr does not alter S, ME, or LE */ - mask &= ~((1ULL << MSR_LE) | (1ULL << MSR_ME) | (1ULL << MSR_S)); + /* mtmsr does not alter S or LE */ + mask &= ~((1ULL << MSR_LE) | (1ULL << MSR_S)); + /* nor ME, on the 64-bit server processors; the 6xx can */ + if (is_book3s_arch2x(ctx)) { + mask &= ~(1ULL << MSR_ME); + } } /* -- 2.53.0 ^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH 2/2] target/ppc: Raise a machine check on a failed bus access on 6xx 2026-11-10 16:44 ` [PATCH 1/2] target/ppc: Let mtmsr set MSR[ME] on 32-bit PowerPC Eric DeVolder @ 2026-11-10 16:44 ` Eric DeVolder 0 siblings, 0 replies; 2+ messages in thread From: Eric DeVolder @ 2026-11-10 16:44 UTC (permalink / raw) To: qemu-devel; +Cc: Eric DeVolder For 6XX, enable ppc_cpu_do_transaction_failed() to take the machine check. Signed-off-by: Eric DeVolder <eric_devolder@yahoo.com> --- target/ppc/tcg-excp_helper.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index b04f07a637..29fd1d371d 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -297,6 +297,12 @@ void ppc_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, } break; #endif + case POWERPC_EXCP_6xx: + /* + * A bus error (TEA) takes a machine check, if MSR[ME] is set. The + * 603 and 604 have no DAR or DSISR update for it. + */ + break; default: /* * TODO: Check behaviour for other CPUs, for now do nothing. -- 2.53.0 ^ permalink raw reply related [flat|nested] 2+ messages in thread
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[not found] <20261110164443.488899-1-eric_devolder.ref@yahoo.com>
2026-11-10 16:44 ` [PATCH 1/2] target/ppc: Let mtmsr set MSR[ME] on 32-bit PowerPC Eric DeVolder
2026-11-10 16:44 ` [PATCH 2/2] target/ppc: Raise a machine check on a failed bus access on 6xx Eric DeVolder
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