[PATCH v2 00/35] Add Engicam MicroGEA-STM32MP257D-RMM board support

[PATCH v2 00/35] Add Engicam MicroGEA-STM32MP257D-RMM board support

[Dario Binacchi]

This series adds support for the Engicam MicroGEA-STM32MP257D-RMM
board, with its RGB and LVDS displays and the FWU A/B update.

The first patches pick the board devicetrees, merged for Linux v7.4,
from devicetree-rebasing. They can be dropped if dts/upstream is synced
with v7.4-dts first. Then come the fixes, the refactors moving the
STM32MP2 environment and FWU support to the SoC code, and the board
support. The displays are described by the upstream overlays, which a
new option applies to the U-Boot devicetree at build time. The
bootph-all properties of the board have been sent to Linux [1].

Tested on the board, booting from the SD card and from the eMMC.

[1] https://lore.kernel.org/all/20261107141353.2228391-1-dario.binacchi@amarulasolutions.com/

Changes in v2:
- Take the original patch from the ST downstream tree, keeping
  Gabriel's authorship
- New patch
- Add Reviewed-by tag
- Add Reviewed-by tag
- New patch
- Simplify the comments
- Apply the upstream display overlays to the U-Boot devicetree instead
  of describing the displays in the -u-boot.dtsi file
- Do not leave the LTDC RGB pins configured with the LVDS display
- Drop a redundant comment

Dario Binacchi (34):
  dt-bindings: arm: stm32: support Engicam MicroGEA-STM32MP257D-RMM
    board
  arm64: dts: st: add power-domains to sdmmc1 on stm32mp231
  arm64: dts: st: add power-domains to sdmmc1 on stm32mp251
  arm64: dts: st: add SDMMC2 support on stm32mp25
  arm64: dts: st: add CAN1 support on stm32mp25
  arm64: dts: st: add i2c1 pins for stm32mp25
  arm64: dts: st: add ltdc pins for stm32mp25
  arm64: dts: st: add can1 pins for stm32mp25
  arm64: dts: st: add pwm2/pwm4 pins for stm32mp25
  arm64: dts: st: add sai1 pins for stm32mp25
  arm64: dts: st: add sdmmc2 pins for stm32mp25
  arm64: dts: st: add spi1 pins for stm32mp25
  arm64: dts: st: add usart1 pins for stm32mp25
  arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM
  arm64: dts: st: support Engicam MicroGEA-STM32MP257D-RMM board
  arm64: dts: st: move Engicam MicroGEA-STM32MP257D-RMM display to an
    overlay
  arm64: dts: st: add Engicam MicroGEA-STM32MP257D-RMM LVDS display
    overlay
  arm: stm32mp: stm32mp2: fix off by one in mmc_get_boot()
  video: stm32: lvds: fix NULL pointer dereference on missing
    data-mapping
  spi: stm32: ignore the cs-gpios polarity flags
  video: stm32: ltdc: fall back to a panel when no bridge is connected
  video: stm32: ltdc: stop looking for the panel once found
  arm: stm32mp: stm32mp2: move boot device environment helpers to SoC
    code
  splash: make splash_video_logo_load() available to boards
  arm: stm32mp: move FWU multi-bank support to SoC code
  configs: stm32mp25: move FWU A/B boot environment to common settings
  video: simple_panel: add Ampire AM-1280800W8TZQW-T00H panel
  video: stm32: ltdc: select the pixel clock source on STM32MP25
  boot: extension: allow longer overlay file names
  dts: support applying DT overlays to the control DT with OF_UPSTREAM
  board: engicam: stm32mp2: add MicroGEA-STM32MP257D-RMM board
  board: engicam: stm32mp2: add splash screen
  board: engicam: stm32mp2: support FWU A/B bank bootup
  board: engicam: stm32mp2: enable simple framebuffer for the splash
    screen

Gabriel Fernandez (1):
  clk: stm32: fix set_rate propagation for parent clocks

 ...m32mp257d-engicam-microgea-rmm-u-boot.dtsi |  38 ++
 arch/arm/mach-stm32mp/Kconfig.25x             |  17 +
 arch/arm/mach-stm32mp/Makefile                |   1 +
 .../arm/mach-stm32mp/fwu.c                    |   0
 arch/arm/mach-stm32mp/stm32mp2/Makefile       |   1 +
 arch/arm/mach-stm32mp/stm32mp2/env.c          |  82 +++++
 board/engicam/stm32mp2/Kconfig                |  12 +
 board/engicam/stm32mp2/MAINTAINERS            |   7 +
 board/engicam/stm32mp2/Makefile               |   7 +
 board/engicam/stm32mp2/microgea-stm32mp2.env  |  13 +
 board/engicam/stm32mp2/stm32mp2.c             | 340 ++++++++++++++++++
 board/st/common/Makefile                      |   1 -
 board/st/stm32mp2/stm32mp2.c                  |  71 +---
 common/splash.c                               |   4 +-
 configs/stm32mp25-microgea-rmm_defconfig      | 129 +++++++
 drivers/clk/stm32/clk-stm32-core.c            |  11 +-
 drivers/spi/stm32_spi.c                       |   9 +-
 drivers/video/simple_panel.c                  |  19 +
 drivers/video/stm32/stm32_ltdc.c              |  71 +++-
 drivers/video/stm32/stm32_lvds.c              |   4 +-
 dts/Kconfig                                   |  10 +
 dts/Makefile                                  |   2 +
 dts/upstream/Bindings/arm/stm32/stm32.yaml    |   7 +
 dts/upstream/src/arm64/st/stm32mp231.dtsi     |   1 +
 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 328 +++++++++++++++++
 dts/upstream/src/arm64/st/stm32mp251.dtsi     |  17 +
 dts/upstream/src/arm64/st/stm32mp253.dtsi     |  16 +
 .../arm64/st/stm32mp257-engicam-microgea.dtsi |  63 ++++
 ...gea-rmm-overlay-am-1280800w8tzqw-t00h.dtso |  67 ++++
 ...icrogea-rmm-overlay-rk050hr345-ct106a.dtso |  68 ++++
 .../st/stm32mp257d-engicam-microgea-rmm.dts   | 275 ++++++++++++++
 include/configs/stm32mp25_common.h            |  20 ++
 include/configs/stm32mp25_st_common.h         |  15 -
 include/extension_board.h                     |   2 +-
 include/splash.h                              |   9 +
 scripts/Makefile.dts                          |   7 +
 36 files changed, 1637 insertions(+), 107 deletions(-)
 create mode 100644 arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
 rename board/st/common/stm32mp_fwu.c => arch/arm/mach-stm32mp/fwu.c (100%)
 create mode 100644 arch/arm/mach-stm32mp/stm32mp2/env.c
 create mode 100644 board/engicam/stm32mp2/Kconfig
 create mode 100644 board/engicam/stm32mp2/MAINTAINERS
 create mode 100644 board/engicam/stm32mp2/Makefile
 create mode 100644 board/engicam/stm32mp2/microgea-stm32mp2.env
 create mode 100644 board/engicam/stm32mp2/stm32mp2.c
 create mode 100644 configs/stm32mp25-microgea-rmm_defconfig
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257-engicam-microgea.dtsi
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts

---
base-commit: feb8913982e4462c01fd914271f92254a25dc101
branch: engicam-microgea-stm32mp257-rmm

-- 
2.43.0

[PATCH v2 01/35] dt-bindings: arm: stm32: support Engicam MicroGEA-STM32MP257D-RMM board

[Dario Binacchi]

Add devicetree bindings for Engicam MicroGEA-STM32MP257D-RMM board based
on the Engicam MicroGEA-STM32MP257 SoM (System-on-Module).

The use of an enum for a single element is justified by the future
addition of other boards based on the same SoM.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: c673bc61ca926f664905c63f1455c7f95858a437 ]

(cherry picked from commit 6655c9d906a8aea1727ddf748c0e8ea05216d56e)
---

(no changes since v1)

 dts/upstream/Bindings/arm/stm32/stm32.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/dts/upstream/Bindings/arm/stm32/stm32.yaml b/dts/upstream/Bindings/arm/stm32/stm32.yaml
index c6af3a46364f..58a639f098b6 100644
--- a/dts/upstream/Bindings/arm/stm32/stm32.yaml
+++ b/dts/upstream/Bindings/arm/stm32/stm32.yaml
@@ -196,6 +196,13 @@ properties:
           - const: ultratronik,stm32mp157c-ultra-fly-sbc
           - const: st,stm32mp157
 
+      - description: Engicam MicroGEA STM32MP257 SoM based Boards
+        items:
+          - enum:
+              - engicam,microgea-stm32mp257d-rmm
+          - const: engicam,microgea-stm32mp257
+          - const: st,stm32mp257
+
       - description: ST STM32MP257 based Boards
         items:
           - enum:
-- 
2.43.0

[PATCH v2 02/35] arm64: dts: st: add power-domains to sdmmc1 on stm32mp231

[Dario Binacchi]

The sdmmc1 node was introduced early in the SoC bring-up before power
domains were systematically mapped. Add the missing power-domains
property to align it with the rest of the peripheral nodes.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: d92944ee1693b20c71215c3ad1a1661f05e85108 ]

(cherry picked from commit 38e8d79eac568b36a01076a5dba1e85676eab895)
---

(no changes since v1)

 dts/upstream/src/arm64/st/stm32mp231.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp231.dtsi b/dts/upstream/src/arm64/st/stm32mp231.dtsi
index 9e1d240888ff..0feb8943efae 100644
--- a/dts/upstream/src/arm64/st/stm32mp231.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp231.dtsi
@@ -727,6 +727,7 @@
 				cap-mmc-highspeed;
 				max-frequency = <120000000>;
 				access-controllers = <&rifsc 76>;
+				power-domains = <&cluster_pd>;
 				status = "disabled";
 			};
 
-- 
2.43.0

[PATCH v2 03/35] arm64: dts: st: add power-domains to sdmmc1 on stm32mp251

[Dario Binacchi]

The sdmmc1 node was introduced early in the SoC bring-up before power
domains were systematically mapped. Add the missing power-domains
property to align it with the rest of the peripheral nodes.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 4f454e51290d072fef58eca653c65dc1fa8c7d70 ]

(cherry picked from commit 188b75b85a9f6dd4dc25cc4d6b7298d01ebf5efa)
---

(no changes since v1)

 dts/upstream/src/arm64/st/stm32mp251.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp251.dtsi b/dts/upstream/src/arm64/st/stm32mp251.dtsi
index 9c63fdb5a885..ae36d703532c 100644
--- a/dts/upstream/src/arm64/st/stm32mp251.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp251.dtsi
@@ -1664,6 +1664,7 @@
 				cap-mmc-highspeed;
 				max-frequency = <120000000>;
 				access-controllers = <&rifsc 76>;
+				power-domains = <&CLUSTER_PD>;
 				status = "disabled";
 			};
 
-- 
2.43.0

[PATCH v2 04/35] arm64: dts: st: add SDMMC2 support on stm32mp25

[Dario Binacchi]

The SDMMC2 controller supports SD cards, eMMC memories and SDIO devices.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 513410ae43bc77b240091eecf3cdeb6eb5b6b83d ]

(cherry picked from commit e7e96ebb4e18e0041a6674b0382730dbdc845838)
---

(no changes since v1)

 dts/upstream/src/arm64/st/stm32mp251.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp251.dtsi b/dts/upstream/src/arm64/st/stm32mp251.dtsi
index ae36d703532c..44938c036e30 100644
--- a/dts/upstream/src/arm64/st/stm32mp251.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp251.dtsi
@@ -1668,6 +1668,22 @@
 				status = "disabled";
 			};
 
+			sdmmc2: mmc@48230000 {
+				compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
+				arm,primecell-periphid = <0x00353180>;
+				reg = <0x48230000 0x400>, <0x44230800 0x8>;
+				interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&rcc CK_KER_SDMMC2>;
+				clock-names = "apb_pclk";
+				resets = <&rcc SDMMC2_R>;
+				cap-sd-highspeed;
+				cap-mmc-highspeed;
+				max-frequency = <120000000>;
+				access-controllers = <&rifsc 77>;
+				power-domains = <&CLUSTER_PD>;
+				status = "disabled";
+			};
+
 			ethernet1: ethernet@482c0000 {
 				compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";
 				reg = <0x482c0000 0x4000>;
-- 
2.43.0

[PATCH v2 05/35] arm64: dts: st: add CAN1 support on stm32mp25

[Dario Binacchi]

The controller is compliant with ISO 11898-1: 2015 (CAN protocol
specification version 2.0 part A, B) and CAN FD protocol specification
version 1.0.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-6-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 7e62731fba26a58f975815add1e3146eaaaaa9c2 ]

(cherry picked from commit 3de3ce4cd1862224d78cc8da29550dab9feeb43f)
---

(no changes since v1)

 dts/upstream/src/arm64/st/stm32mp253.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp253.dtsi b/dts/upstream/src/arm64/st/stm32mp253.dtsi
index eeceb086252b..7e82f01fdc10 100644
--- a/dts/upstream/src/arm64/st/stm32mp253.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp253.dtsi
@@ -43,6 +43,22 @@
 };
 
 &rifsc {
+	m_can1: can@402d0000 {
+		compatible = "bosch,m_can";
+		reg = <0x402d0000 0x400>, <0x40310000 0xd50>;
+		reg-names = "m_can", "message_ram";
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "int0", "int1";
+		clocks = <&rcc CK_BUS_FDCAN>, <&rcc CK_KER_FDCAN>;
+		clock-names = "hclk", "cclk";
+		resets = <&rcc FDCAN_R>;
+		bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
+		access-controllers = <&rifsc 56>;
+		power-domains = <&CLUSTER_PD>;
+		status = "disabled";
+	};
+
 	ethernet2: ethernet@482d0000 {
 		compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";
 		reg = <0x482d0000 0x4000>;
-- 
2.43.0

[PATCH v2 06/35] arm64: dts: st: add i2c1 pins for stm32mp25

[Dario Binacchi]

Add the i2c1 pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-7-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 650d83cab19ea1acd3c1a17583d91efcd1688a7c ]

(cherry picked from commit 7cac3c4a9f9b57c8e7d4c1430991f0df3b0883b9)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index 456ece7f8ebc..db485b9ed904 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -203,6 +203,25 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	i2c1_pins_a: i2c1-0 {
+		pins {
+			pinmux = <STM32_PINMUX('G', 13, AF9)>, /* I2C1_SCL */
+				 <STM32_PINMUX('A', 2, AF10)>; /* I2C1_SDA */
+			bias-disable;
+			drive-open-drain;
+			slew-rate = <0>;
+		};
+	};
+
+	/omit-if-no-ref/
+	i2c1_sleep_pins_a: i2c1-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* I2C1_SCL */
+				 <STM32_PINMUX('A', 2, ANALOG)>; /* I2C1_SDA */
+		};
+	};
+
 	/omit-if-no-ref/
 	i2c2_pins_a: i2c2-0 {
 		pins {
-- 
2.43.0

[PATCH v2 07/35] arm64: dts: st: add ltdc pins for stm32mp25

[Dario Binacchi]

Add the LTDC pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-8-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 0183a9f7ba2de9fc9c1e0ee53e4cc7b049e69181 ]

(cherry picked from commit 24128ab8c8a3c29003deb325424d39d31ee08165)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 71 +++++++++++++++++++
 1 file changed, 71 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index db485b9ed904..50f454630cf2 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -260,6 +260,77 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	ltdc_pins_a: ltdc-0 {
+		pins {
+			pinmux = <STM32_PINMUX('C',  6, AF14)>, /* LCD_CLK */
+				 <STM32_PINMUX('G',  2, AF13)>, /* LCD_HSYNC */
+				 <STM32_PINMUX('G',  1, AF13)>, /* LCD_VSYNC */
+				 <STM32_PINMUX('C',  5, AF14)>, /* LCD_DE */
+				 <STM32_PINMUX('H',  4, AF10)>, /* LCD_R0 */
+				 <STM32_PINMUX('F',  7, AF13)>, /* LCD_R1 */
+				 <STM32_PINMUX('C', 11, AF13)>, /* LCD_R2 */
+				 <STM32_PINMUX('A',  1, AF11)>, /* LCD_R3 */
+				 <STM32_PINMUX('B', 15, AF13)>, /* LCD_R4 */
+				 <STM32_PINMUX('G',  3, AF13)>, /* LCD_R5 */
+				 <STM32_PINMUX('A', 10, AF12)>, /* LCD_R6 */
+				 <STM32_PINMUX('G',  7, AF13)>, /* LCD_R7 */
+				 <STM32_PINMUX('F',  8, AF13)>, /* LCD_G0 */
+				 <STM32_PINMUX('H',  5, AF10)>, /* LCD_G1 */
+				 <STM32_PINMUX('C',  9, AF13)>, /* LCD_G2 */
+				 <STM32_PINMUX('C', 10, AF13)>, /* LCD_G3 */
+				 <STM32_PINMUX('A',  6, AF10)>, /* LCD_G4 */
+				 <STM32_PINMUX('G', 11, AF13)>, /* LCD_G5 */
+				 <STM32_PINMUX('G', 12, AF13)>, /* LCD_G6 */
+				 <STM32_PINMUX('A',  9, AF12)>, /* LCD_G7 */
+				 <STM32_PINMUX('F',  6, AF13)>, /* LCD_B0 */
+				 <STM32_PINMUX('A',  3, AF11)>, /* LCD_B1 */
+				 <STM32_PINMUX('G', 15, AF13)>, /* LCD_B2 */
+				 <STM32_PINMUX('I',  0, AF13)>, /* LCD_B3 */
+				 <STM32_PINMUX('I',  1, AF13)>, /* LCD_B4 */
+				 <STM32_PINMUX('A',  7, AF10)>, /* LCD_B5 */
+				 <STM32_PINMUX('F',  5, AF13)>, /* LCD_B6 */
+				 <STM32_PINMUX('I',  4, AF13)>; /* LCD_B7 */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <1>;
+		};
+	};
+
+	/omit-if-no-ref/
+	ltdc_sleep_pins_a: ltdc-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('C',  6, ANALOG)>, /* LCD_CLK */
+				 <STM32_PINMUX('G',  2, ANALOG)>, /* LCD_HSYNC */
+				 <STM32_PINMUX('G',  1, ANALOG)>, /* LCD_VSYNC */
+				 <STM32_PINMUX('C',  5, ANALOG)>, /* LCD_DE */
+				 <STM32_PINMUX('H',  4, ANALOG)>, /* LCD_R0 */
+				 <STM32_PINMUX('F',  7, ANALOG)>, /* LCD_R1 */
+				 <STM32_PINMUX('C', 11, ANALOG)>, /* LCD_R2 */
+				 <STM32_PINMUX('A',  1, ANALOG)>, /* LCD_R3 */
+				 <STM32_PINMUX('B', 15, ANALOG)>, /* LCD_R4 */
+				 <STM32_PINMUX('G',  3, ANALOG)>, /* LCD_R5 */
+				 <STM32_PINMUX('A', 10, ANALOG)>, /* LCD_R6 */
+				 <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_R7 */
+				 <STM32_PINMUX('F',  8, ANALOG)>, /* LCD_G0 */
+				 <STM32_PINMUX('H',  5, ANALOG)>, /* LCD_G1 */
+				 <STM32_PINMUX('C',  9, ANALOG)>, /* LCD_G2 */
+				 <STM32_PINMUX('C', 10, ANALOG)>, /* LCD_G3 */
+				 <STM32_PINMUX('A',  6, ANALOG)>, /* LCD_G4 */
+				 <STM32_PINMUX('G', 11, ANALOG)>, /* LCD_G5 */
+				 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_G6 */
+				 <STM32_PINMUX('A',  9, ANALOG)>, /* LCD_G7 */
+				 <STM32_PINMUX('F',  6, ANALOG)>, /* LCD_B0 */
+				 <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B1 */
+				 <STM32_PINMUX('G', 15, ANALOG)>, /* LCD_B2 */
+				 <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_B3 */
+				 <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_B4 */
+				 <STM32_PINMUX('A',  7, ANALOG)>, /* LCD_B5 */
+				 <STM32_PINMUX('F',  5, ANALOG)>, /* LCD_B6 */
+				 <STM32_PINMUX('I',  4, ANALOG)>; /* LCD_B7 */
+		};
+	};
+
 	/omit-if-no-ref/
 	ospi_port1_clk_pins_a: ospi-port1-clk-0 {
 		pins {
-- 
2.43.0

[PATCH v2 08/35] arm64: dts: st: add can1 pins for stm32mp25

[Dario Binacchi]

Add the can1 pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-9-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: b9efa6d3c580feeb4af6204457ce3ebf351b2af4 ]

(cherry picked from commit e9b8701fc994a04a4dcd15598de7bbd9d81ecfe9)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index 50f454630cf2..6482dd47e977 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -331,6 +331,28 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	m_can1_pins_a: m-can1-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('B', 9, AF7)>; /* CAN1_TX */
+			slew-rate = <1>;
+			drive-push-pull;
+			bias-disable;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('B', 11, AF7)>; /* CAN1_RX */
+			bias-disable;
+		};
+	};
+
+	/omit-if-no-ref/
+	m_can1_sleep_pins_a: m-can1-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* CAN1_TX */
+				 <STM32_PINMUX('B', 11, ANALOG)>; /* CAN1_RX */
+		};
+	};
+
 	/omit-if-no-ref/
 	ospi_port1_clk_pins_a: ospi-port1-clk-0 {
 		pins {
-- 
2.43.0

[PATCH v2 09/35] arm64: dts: st: add pwm2/pwm4 pins for stm32mp25

[Dario Binacchi]

Add the pwm2 and pwm4 pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-10-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 3c7876c003f01223e111444a93d5861d86d8022c ]

(cherry picked from commit 1d936c8ac7bcd3a7d8aa42ca88f8fbaaf3e63194)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index 6482dd47e977..695c9d771853 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -433,6 +433,23 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	pwm2_pins_a: pwm2-0 {
+		pins {
+			pinmux = <STM32_PINMUX('I', 7, AF7)>; /* TIM2_CH1 */
+			bias-pull-down;
+			drive-push-pull;
+			slew-rate = <0>;
+		};
+	};
+
+	/omit-if-no-ref/
+	pwm2_sleep_pins_a: pwm2-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('I', 7, ANALOG)>; /* TIM2_CH1 */
+		};
+	};
+
 	/omit-if-no-ref/
 	pwm3_pins_a: pwm3-0 {
 		pins {
@@ -450,6 +467,23 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	pwm4_pins_a: pwm4-0 {
+		pins {
+			pinmux = <STM32_PINMUX('A', 12, AF7)>; /* TIM4_CH1 */
+			bias-pull-down;
+			drive-push-pull;
+			slew-rate = <0>;
+		};
+	};
+
+	/omit-if-no-ref/
+	pwm4_sleep_pins_a: pwm4-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('A', 12, ANALOG)>; /* TIM4_CH1 */
+		};
+	};
+
 	/omit-if-no-ref/
 	pwm8_pins_a: pwm8-0 {
 		pins {
-- 
2.43.0

[PATCH v2 10/35] arm64: dts: st: add sai1 pins for stm32mp25

[Dario Binacchi]

Add the sai1 pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com>
Link: https://lore.kernel.org/r/20260820091652.43541-11-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: ec9e6b832ff186db9fe4a8c9e57ed120669229d7 ]

(cherry picked from commit efe29427df55d919eb9bbb319e6f4acdfd14f4bf)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index 695c9d771853..002fbc724b9d 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -520,6 +520,51 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	sai1a_pins_a: sai1a-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('D', 9, AF3)>, /* SAI1_SD_A */
+				 <STM32_PINMUX('D', 8, AF3)>, /* SAI1_FS_A */
+				 <STM32_PINMUX('D', 10, AF3)>; /* SAI1_SCK_A */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <1>;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('D', 11, AF3)>; /* SAI1_MCLK_A */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <2>;
+		};
+	};
+
+	/omit-if-no-ref/
+	sai1a_sleep_pins_a: sai1a-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('D', 9, ANALOG)>, /* SAI1_SD_A */
+				 <STM32_PINMUX('D', 8, ANALOG)>, /* SAI1_FS_A */
+				 <STM32_PINMUX('D', 10, ANALOG)>, /* SAI1_SCK_A */
+				 <STM32_PINMUX('D', 11, ANALOG)>; /* SAI1_MCLK_A */
+		};
+	};
+
+	/omit-if-no-ref/
+	sai1b_pins_a: sai1b-0 {
+		pins {
+			pinmux = <STM32_PINMUX('D', 4, AF4)>; /* SAI1_SD_B */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <0>;
+		};
+	};
+
+	/omit-if-no-ref/
+	sai1b_sleep_pins_a: sai1b-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('D', 4, ANALOG)>; /* SAI1_SD_B */
+		};
+	};
+
 	/omit-if-no-ref/
 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
 		pins1 {
-- 
2.43.0

[PATCH v2 11/35] arm64: dts: st: add sdmmc2 pins for stm32mp25

[Dario Binacchi]

Add the sdmmc2 pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-12-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 17d813da16896a7ced144acf41bf7edc419a9fe5 ]

(cherry picked from commit 9bf2959090b5831f7ac2caf05aa880768def9f32)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 80 +++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index 002fbc724b9d..c816a6aece47 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -622,6 +622,86 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */
+				 <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */
+				 <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */
+				 <STM32_PINMUX('E', 12, AF12)>, /* SDMMC2_D3 */
+				 <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */
+			slew-rate = <1>;
+			drive-push-pull;
+			bias-pull-up;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */
+			slew-rate = <2>;
+			drive-push-pull;
+			bias-disable;
+		};
+	};
+
+	/omit-if-no-ref/
+	sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */
+				 <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */
+				 <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */
+				 <STM32_PINMUX('E', 12, AF12)>; /* SDMMC2_D3 */
+			slew-rate = <1>;
+			drive-push-pull;
+			bias-pull-up;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */
+			slew-rate = <2>;
+			drive-push-pull;
+			bias-disable;
+		};
+		pins3 {
+			pinmux = <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */
+			slew-rate = <1>;
+			drive-open-drain;
+			bias-pull-up;
+		};
+	};
+
+	/omit-if-no-ref/
+	sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('E', 13, ANALOG)>, /* SDMMC2_D0 */
+				 <STM32_PINMUX('E', 11, ANALOG)>, /* SDMMC2_D1 */
+				 <STM32_PINMUX('E', 8, ANALOG)>, /* SDMMC2_D2 */
+				 <STM32_PINMUX('E', 12, ANALOG)>, /* SDMMC2_D3 */
+				 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC2_CK */
+				 <STM32_PINMUX('E', 15, ANALOG)>; /* SDMMC2_CMD */
+		};
+	};
+
+	/omit-if-no-ref/
+	sdmmc2_d47_pins_a: sdmmc2-d47-0 {
+		pins {
+			pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */
+				 <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */
+				 <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */
+				 <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */
+			slew-rate = <1>;
+			drive-push-pull;
+			bias-pull-up;
+		};
+	};
+
+	/omit-if-no-ref/
+	sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('E', 10, ANALOG)>, /* SDMMC2_D4 */
+				 <STM32_PINMUX('E', 9, ANALOG)>, /* SDMMC2_D5 */
+				 <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC2_D6 */
+				 <STM32_PINMUX('E', 7, ANALOG)>; /* SDMMC2_D7 */
+		};
+	};
+
 	/omit-if-no-ref/
 	spi3_pins_a: spi3-0 {
 		pins1 {
-- 
2.43.0

[PATCH v2 12/35] arm64: dts: st: add spi1 pins for stm32mp25

[Dario Binacchi]

Add the spi1 pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-13-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 4759748985fe4d4c25c87edeeca4b96dfa47a280 ]

(cherry picked from commit fdfa69e2fb0f024e72ddf590f82468e63ef9bd76)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index c816a6aece47..4e570e2e5157 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -702,6 +702,30 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	spi1_pins_a: spi1-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('G', 6, AF3)>, /* SPI1_SCK */
+				 <STM32_PINMUX('I', 5, AF3)>; /* SPI1_MOSI */
+			drive-push-pull;
+			bias-disable;
+			slew-rate = <1>;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('F', 12, AF3)>; /* SPI1_MISO */
+			bias-disable;
+		};
+	};
+
+	/omit-if-no-ref/
+	spi1_sleep_pins_a: spi1-sleep-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('G', 6, ANALOG)>, /* SPI1_SCK */
+				 <STM32_PINMUX('I', 5, ANALOG)>, /* SPI1_MOSI */
+				 <STM32_PINMUX('F', 12, ANALOG)>; /* SPI1_MISO */
+		};
+	};
+
 	/omit-if-no-ref/
 	spi3_pins_a: spi3-0 {
 		pins1 {
-- 
2.43.0

[PATCH v2 13/35] arm64: dts: st: add usart1 pins for stm32mp25

[Dario Binacchi]

Add the usart1 pins used on MicroGEA-STM32MP257D-RMM board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-14-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 2bb7d85d7a644e20b7b9097a966acec8edd5c7cf ]

(cherry picked from commit 99b28029f7153bab8e870e9510470d21f6722f76)
---

(no changes since v1)

 .../src/arm64/st/stm32mp25-pinctrl.dtsi       | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
index 4e570e2e5157..d515e44832d7 100644
--- a/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
+++ b/dts/upstream/src/arm64/st/stm32mp25-pinctrl.dtsi
@@ -766,6 +766,39 @@
 		};
 	};
 
+	/omit-if-no-ref/
+	usart1_pins_b: usart1-1 {
+		pins1 {
+			pinmux = <STM32_PINMUX('B', 8, AF6)>; /* USART1_TX */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <0>;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('B', 10, AF6)>; /* USART1_RX */
+			bias-disable;
+		};
+	};
+
+	/omit-if-no-ref/
+	usart1_idle_pins_b: usart1-idle-1 {
+		pins1 {
+			pinmux = <STM32_PINMUX('B', 8, ANALOG)>; /* USART1_TX */
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('B', 10, AF6)>; /* USART1_RX */
+			bias-disable;
+		};
+	};
+
+	/omit-if-no-ref/
+	usart1_sleep_pins_b: usart1-sleep-1 {
+		pins {
+			pinmux = <STM32_PINMUX('B', 8, ANALOG)>, /* USART1_TX */
+				 <STM32_PINMUX('B', 10, ANALOG)>; /* USART1_RX */
+		};
+	};
+
 	/omit-if-no-ref/
 	usart2_pins_a: usart2-0 {
 		pins1 {
-- 
2.43.0

[PATCH v2 14/35] arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM

[Dario Binacchi]

Support Engicam MicroGEA-STM32MP257 SoM with:

 - 8 GB eMMC Flash
 - 2 GB LPDDR4 DRAM

The SoM also provides an Ethernet MAC, but Ethernet support is not
enabled at this stage due to a known silicon limitation documented in
[1].

This corresponds to section 2.21.2 ("ETH1 RMII mode could have CRC
errors"), where CRC errors may occur in ETH1 RMII direct mode when
directly connected to I/Os.

The workaround requires use of the Ethernet switch (ETHSW), which
introduces additional DT bindings and topology complexity. This is
intended to be addressed in a separate patch series.

[1] https://www.st.com/resource/en/errata_sheet/es0598-stm32mp23xx25xx-device-errata-stmicroelectronics.pdf

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-15-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: c5ce8d7bcc787c8aa4896629c14fe7b837c78ec6 ]

(cherry picked from commit 64dbd1de4f75d254211eae12b8ed6318d2e830e4)
---

(no changes since v1)

 .../arm64/st/stm32mp257-engicam-microgea.dtsi | 63 +++++++++++++++++++
 1 file changed, 63 insertions(+)
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257-engicam-microgea.dtsi

diff --git a/dts/upstream/src/arm64/st/stm32mp257-engicam-microgea.dtsi b/dts/upstream/src/arm64/st/stm32mp257-engicam-microgea.dtsi
new file mode 100644
index 000000000000..5b4287e86def
--- /dev/null
+++ b/dts/upstream/src/arm64/st/stm32mp257-engicam-microgea.dtsi
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ * Copyright (C) 2026 Engicam srl
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/regulator/st,stm32mp25-regulator.h>
+#include "stm32mp257.dtsi"
+#include "stm32mp25-pinctrl.dtsi"
+#include "stm32mp25xxai-pinctrl.dtsi"
+
+/ {
+	model = "Engicam MicroGEA STM32MP257 SoM";
+	compatible = "engicam,microgea-stm32mp257", "st,stm32mp257";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x0 0x80000000>;
+	};
+};
+
+&scmi_regu {
+	scmi_vddio1: regulator@0 {
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+	scmi_vddcore: regulator@b {
+		reg = <VOLTD_SCMI_STPMIC2_BUCK2>;
+		regulator-name = "vddcore";
+	};
+	scmi_v1v8: regulator@e {
+		reg = <VOLTD_SCMI_STPMIC2_BUCK5>;
+		regulator-name = "v1v8";
+	};
+	scmi_v3v3: regulator@10 {
+		reg = <VOLTD_SCMI_STPMIC2_BUCK7>;
+		regulator-name = "v3v3";
+	};
+	scmi_vdd3v3_usb: regulator@14 {
+		reg = <VOLTD_SCMI_STPMIC2_LDO4>;
+		regulator-name = "vdd3v3_usb";
+	};
+};
+
+/* eMMC */
+&sdmmc2 {
+	pinctrl-names = "default", "opendrain", "sleep";
+	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
+	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
+	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
+	non-removable;
+	no-sd;
+	no-sdio;
+	st,neg-edge;
+	bus-width = <8>;
+	vmmc-supply = <&scmi_v3v3>;
+	vqmmc-supply = <&scmi_vddio2>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	status = "okay";
+};
-- 
2.43.0

[PATCH v2 15/35] arm64: dts: st: support Engicam MicroGEA-STM32MP257D-RMM board

[Dario Binacchi]

Support for Engicam MicroGEA-STM32MP257D-RMM board with:

 - 8 GB eMMC Flash
 - 2 GB LPDDR4 DRAM
 - CAN
 - LEDs
 - LCD panel with touchscreen
 - Micro SD card connector
 - Audio codec
 - Buzzer

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260820091652.43541-16-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: bc7b07bda4e0dbb70c8cac0532691c39602390b8 ]

(cherry picked from commit 435db86022032d69ff48f5e0aae57169d700b02f)
---

(no changes since v1)

 .../st/stm32mp257d-engicam-microgea-rmm.dts   | 319 ++++++++++++++++++
 1 file changed, 319 insertions(+)
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts

diff --git a/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
new file mode 100644
index 000000000000..f5af0913bf1b
--- /dev/null
+++ b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ * Copyright (C) 2026 Engicam srl
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+#include "stm32mp257-engicam-microgea.dtsi"
+
+/ {
+	model = "Engicam MicroGEA STM32MP257D RMM Board";
+	compatible = "engicam,microgea-stm32mp257d-rmm",
+		     "engicam,microgea-stm32mp257", "st,stm32mp257";
+
+	aliases {
+		mmc0 = &sdmmc1;
+		mmc1 = &sdmmc2;
+		serial0 = &usart2;
+		serial1 = &usart1;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <0 100>;
+		num-interpolated-steps = <100>;
+		default-brightness-level = <85>;
+		pwms = <&pwm2 0 100000 0>;
+	};
+
+	buzzer {
+		compatible = "pwm-beeper";
+		pwms = <&pwm4 0 1000000 0>;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		framebuffer {
+			compatible = "simple-framebuffer";
+			clocks = <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>;
+			lcd-supply = <&reg_3v3>;
+			status = "disabled";
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			gpios = <&gpioh 2 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			status = "okay";
+		};
+
+		led-1 {
+			gpios = <&gpioh 6 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			status = "okay";
+		};
+	};
+
+	mclk: clock-mclk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+	};
+
+	reg_1v8: regulator-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
+	reg_3v3: regulator-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	reg_ext_pwr: regulator-ext-pwr {
+		compatible = "regulator-fixed";
+		regulator-name = "ext-pwr";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpiog 0 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+
+	sound {
+		compatible = "audio-graph-card";
+		label = "STM32MP25-RMM";
+		widgets = "Headphone", "Headphone Jack",
+			  "Microphone", "Microphone Jack";
+		routing = "Headphone Jack", "HP_OUT",
+			  "MIC_IN", "Microphone Jack",
+			  "Microphone Jack", "Mic Bias";
+		dais = <&sai1a_port &sai1b_port>;
+		status = "okay";
+	};
+};
+
+&arm_wdt {
+	timeout-sec = <32>;
+	status = "okay";
+};
+
+&i2c1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&i2c1_pins_a>;
+	pinctrl-1 = <&i2c1_sleep_pins_a>;
+	i2c-scl-rising-time-ns = <185>;
+	i2c-scl-falling-time-ns = <20>;
+	status = "okay";
+	/* spare dmas for other usage */
+	/delete-property/dmas;
+	/delete-property/dma-names;
+
+	touchscreen@38 {
+		compatible = "edt,edt-ft5306";
+		reg = <0x38>;
+		interrupt-parent = <&gpiob>;
+		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+		reset-gpios = <&gpiod 1 GPIO_ACTIVE_LOW>;
+		touchscreen-size-x = <480>;
+		touchscreen-size-y = <854>;
+	};
+};
+
+&i2c2 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&i2c2_pins_a>;
+	pinctrl-1 = <&i2c2_sleep_pins_a>;
+	i2c-scl-rising-time-ns = <185>;
+	i2c-scl-falling-time-ns = <20>;
+	status = "okay";
+	/* spare dmas for other usage */
+	/delete-property/dmas;
+	/delete-property/dma-names;
+
+	sgtl5000: codec@a {
+		compatible = "fsl,sgtl5000";
+		reg = <0x0a>;
+		#sound-dai-cells = <0>;
+		clocks = <&mclk>;
+
+		VDDA-supply = <&reg_3v3>;
+		VDDIO-supply = <&reg_3v3>;
+		VDDD-supply = <&reg_1v8>;
+
+		sgtl5000_port: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			sgtl5000_tx_endpoint: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&sai1a_endpoint>;
+				frame-master = <&sgtl5000_tx_endpoint>;
+				bitclock-master = <&sgtl5000_tx_endpoint>;
+			};
+
+			sgtl5000_rx_endpoint: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&sai1b_endpoint>;
+				frame-master = <&sgtl5000_rx_endpoint>;
+				bitclock-master = <&sgtl5000_rx_endpoint>;
+			};
+		};
+	};
+};
+
+&ltdc {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&ltdc_pins_a>;
+	pinctrl-1 = <&ltdc_sleep_pins_a>;
+	status = "okay";
+
+	port {
+		ltdc_out: endpoint {
+			remote-endpoint = <&panel_in>;
+		};
+	};
+};
+
+&m_can1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&m_can1_pins_a>;
+	pinctrl-1 = <&m_can1_sleep_pins_a>;
+	status = "okay";
+};
+
+&sai1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sai1a_pins_a>, <&sai1b_pins_a>;
+	pinctrl-1 = <&sai1a_sleep_pins_a>, <&sai1b_sleep_pins_a>;
+	status = "okay";
+};
+
+&sai1a {
+	dma-names = "tx";
+	status = "okay";
+
+	sai1a_port: port {
+		sai1a_endpoint: endpoint {
+			remote-endpoint = <&sgtl5000_tx_endpoint>;
+			dai-format = "i2s";
+			mclk-fs = <512>;
+		};
+	};
+};
+
+&sai1b {
+	dma-names = "rx";
+	st,sync = <&sai1a 2>;
+	clocks = <&rcc CK_KER_SAI1>;
+	clock-names = "sai_ck";
+	status = "okay";
+
+	sai1b_port: port {
+		sai1b_endpoint: endpoint {
+			remote-endpoint = <&sgtl5000_rx_endpoint>;
+			dai-format = "i2s";
+			mclk-fs = <512>;
+		};
+	};
+};
+
+/* MicroSD */
+&sdmmc1 {
+	pinctrl-names = "default", "opendrain", "sleep";
+	pinctrl-0 = <&sdmmc1_b4_pins_a>;
+	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
+	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
+	broken-cd;
+	disable-wp;
+	st,neg-edge;
+	bus-width = <4>;
+	vmmc-supply = <&scmi_v3v3>;
+	vqmmc-supply = <&scmi_vddio1>;
+	no-1-8-v;
+	status = "okay";
+};
+
+&spi1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&spi1_pins_a>;
+	pinctrl-1 = <&spi1_sleep_pins_a>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cs-gpios = <&gpioh 8 GPIO_ACTIVE_LOW>, <&gpioh 3 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	display: display@0 {
+		compatible = "rocktech,rk050hr345-ct106a", "ilitek,ili9806e";
+		reg = <0>;
+		vdd-supply = <&reg_3v3>;
+		spi-max-frequency = <10000000>;
+		reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
+		backlight = <&backlight>;
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&ltdc_out>;
+			};
+		};
+	};
+};
+
+&timers2 {
+	status = "okay";
+
+	pwm2: pwm {
+		pinctrl-0 = <&pwm2_pins_a>;
+		pinctrl-1 = <&pwm2_sleep_pins_a>;
+		pinctrl-names = "default", "sleep";
+		status = "okay";
+	};
+};
+
+&timers4 {
+	status = "okay";
+
+	pwm4: pwm {
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&pwm4_pins_a>;
+		pinctrl-1 = <&pwm4_sleep_pins_a>;
+		status = "okay";
+	};
+};
+
+&usart1 {
+	pinctrl-names = "default", "idle", "sleep";
+	pinctrl-0 = <&usart1_pins_b>;
+	pinctrl-1 = <&usart1_idle_pins_b>;
+	pinctrl-2 = <&usart1_sleep_pins_b>;
+	/delete-property/ dmas;
+	/delete-property/ dma-names;
+	status = "okay";
+};
+
+&usart2 {
+	pinctrl-names = "default", "idle", "sleep";
+	pinctrl-0 = <&usart2_pins_a>;
+	pinctrl-1 = <&usart2_idle_pins_a>;
+	pinctrl-2 = <&usart2_sleep_pins_a>;
+	/delete-property/ dmas;
+	/delete-property/ dma-names;
+	status = "okay";
+};
-- 
2.43.0

[PATCH v2 16/35] arm64: dts: st: move Engicam MicroGEA-STM32MP257D-RMM display to an overlay

[Dario Binacchi]

The board is fitted with different displays depending on the product
variant. Keep in the board dts only what is common to all variants and
move the RK050HR345-CT106A RGB panel and its touchscreen to an overlay.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260923155333.610134-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: c82d6c52a2514b0a5a7968b6fed8ff212b80e5e1 ]

(cherry picked from commit 8fbbd1cc0edb754a6653ec4af418e02887cb3bdb)
---

(no changes since v1)

 ...icrogea-rmm-overlay-rk050hr345-ct106a.dtso | 68 +++++++++++++++++++
 .../st/stm32mp257d-engicam-microgea-rmm.dts   | 46 +------------
 2 files changed, 69 insertions(+), 45 deletions(-)
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso

diff --git a/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso
new file mode 100644
index 000000000000..f89641bdb23b
--- /dev/null
+++ b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ * Copyright (C) 2026 Engicam srl
+ *
+ * Rocktech RK050HR345-CT106A 5" 480x854 RGB panel with EDT FT5306
+ * I2C touchscreen controller.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&i2c1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&i2c1_pins_a>;
+	pinctrl-1 = <&i2c1_sleep_pins_a>;
+	i2c-scl-rising-time-ns = <185>;
+	i2c-scl-falling-time-ns = <20>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	touchscreen@38 {
+		compatible = "edt,edt-ft5306";
+		reg = <0x38>;
+		interrupt-parent = <&gpiob>;
+		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+		reset-gpios = <&gpiod 1 GPIO_ACTIVE_LOW>;
+		touchscreen-size-x = <480>;
+		touchscreen-size-y = <854>;
+	};
+};
+
+&ltdc {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&ltdc_pins_a>;
+	pinctrl-1 = <&ltdc_sleep_pins_a>;
+	status = "okay";
+
+	port {
+		ltdc_out: endpoint {
+			remote-endpoint = <&panel_in>;
+		};
+	};
+};
+
+&spi1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	display@0 {
+		compatible = "rocktech,rk050hr345-ct106a", "ilitek,ili9806e";
+		reg = <0>;
+		vdd-supply = <&reg_3v3>;
+		spi-max-frequency = <10000000>;
+		reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
+		backlight = <&backlight>;
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&ltdc_out>;
+			};
+		};
+	};
+};
diff --git a/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
index f5af0913bf1b..faedddc2c914 100644
--- a/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
+++ b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
@@ -116,25 +116,9 @@
 };
 
 &i2c1 {
-	pinctrl-names = "default", "sleep";
-	pinctrl-0 = <&i2c1_pins_a>;
-	pinctrl-1 = <&i2c1_sleep_pins_a>;
-	i2c-scl-rising-time-ns = <185>;
-	i2c-scl-falling-time-ns = <20>;
-	status = "okay";
-	/* spare dmas for other usage */
+	/* dt overlays don't support /delete-property/ */
 	/delete-property/dmas;
 	/delete-property/dma-names;
-
-	touchscreen@38 {
-		compatible = "edt,edt-ft5306";
-		reg = <0x38>;
-		interrupt-parent = <&gpiob>;
-		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
-		reset-gpios = <&gpiod 1 GPIO_ACTIVE_LOW>;
-		touchscreen-size-x = <480>;
-		touchscreen-size-y = <854>;
-	};
 };
 
 &i2c2 {
@@ -179,19 +163,6 @@
 	};
 };
 
-&ltdc {
-	pinctrl-names = "default", "sleep";
-	pinctrl-0 = <&ltdc_pins_a>;
-	pinctrl-1 = <&ltdc_sleep_pins_a>;
-	status = "okay";
-
-	port {
-		ltdc_out: endpoint {
-			remote-endpoint = <&panel_in>;
-		};
-	};
-};
-
 &m_can1 {
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&m_can1_pins_a>;
@@ -259,21 +230,6 @@
 	#size-cells = <0>;
 	cs-gpios = <&gpioh 8 GPIO_ACTIVE_LOW>, <&gpioh 3 GPIO_ACTIVE_HIGH>;
 	status = "okay";
-
-	display: display@0 {
-		compatible = "rocktech,rk050hr345-ct106a", "ilitek,ili9806e";
-		reg = <0>;
-		vdd-supply = <&reg_3v3>;
-		spi-max-frequency = <10000000>;
-		reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
-		backlight = <&backlight>;
-
-		port {
-			panel_in: endpoint {
-				remote-endpoint = <&ltdc_out>;
-			};
-		};
-	};
 };
 
 &timers2 {
-- 
2.43.0

[PATCH v2 17/35] arm64: dts: st: add Engicam MicroGEA-STM32MP257D-RMM LVDS display overlay

[Dario Binacchi]

Add an overlay for the variant fitted with the AM-1280800W8TZQW-T00H
10.1" 1280x800 LVDS panel. Its touchscreen is connected over USB, so
there is no touchscreen node.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20260923155333.610134-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

[ upstream commit: 29ee49c0f82fffb8b0eed14b4ef3ff19ab89f455 ]

(cherry picked from commit 535f863022c1f9491a2d224023f5a6e3419ebc6f)
---

(no changes since v1)

 ...gea-rmm-overlay-am-1280800w8tzqw-t00h.dtso | 67 +++++++++++++++++++
 .../st/stm32mp257d-engicam-microgea-rmm.dts   |  2 +-
 2 files changed, 68 insertions(+), 1 deletion(-)
 create mode 100644 dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso

diff --git a/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso
new file mode 100644
index 000000000000..7655c1bf56b1
--- /dev/null
+++ b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ * Copyright (C) 2026 Engicam srl
+ *
+ * Ampire AM-1280800W8TZQW-T00H 10.1" 1280x800 LVDS panel. Its touchscreen
+ * controller is connected over USB.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/st,stm32mp25-rcc.h>
+
+&{/} {
+	panel-lvds {
+		compatible = "ampire,am-1280800w8tzqw-t00h";
+		backlight = <&backlight>;
+		power-supply = <&reg_3v3>;
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&lvds_out>;
+			};
+		};
+	};
+};
+
+&framebuffer {
+	clocks = <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>,
+		 <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>;
+};
+
+&ltdc {
+	status = "okay";
+
+	port {
+		ltdc_out: endpoint {
+			remote-endpoint = <&lvds_in>;
+		};
+	};
+};
+
+&lvds {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			lvds_in: endpoint {
+				remote-endpoint = <&ltdc_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			lvds_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
diff --git a/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
index faedddc2c914..96b7cb6b5bc1 100644
--- a/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
+++ b/dts/upstream/src/arm64/st/stm32mp257d-engicam-microgea-rmm.dts
@@ -43,7 +43,7 @@
 		#size-cells = <2>;
 		ranges;
 
-		framebuffer {
+		framebuffer: framebuffer {
 			compatible = "simple-framebuffer";
 			clocks = <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>;
 			lcd-supply = <&reg_3v3>;
-- 
2.43.0

[PATCH v2 18/35] arm: stm32mp: stm32mp2: fix off by one in mmc_get_boot()

[Dario Binacchi]

The > comparison needs to be changed to >= to prevent an out of bounds
read of the sdmmc_addr[] array.

Fixes: a3be0ccc4746 ("board: st: stm32mp2: add mmc_get_env_dev()")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 board/st/stm32mp2/stm32mp2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c
index 7bc7d2a608fd..f2575339b990 100644
--- a/board/st/stm32mp2/stm32mp2.c
+++ b/board/st/stm32mp2/stm32mp2.c
@@ -132,7 +132,7 @@ int mmc_get_boot(void)
 		STM32_SDMMC3_BASE
 	};
 
-	if (instance > ARRAY_SIZE(sdmmc_addr))
+	if (instance >= ARRAY_SIZE(sdmmc_addr))
 		return 0;
 
 	/* search associated sdmmc node in devicetree */
-- 
2.43.0

[PATCH v2 19/35] video: stm32: lvds: fix NULL pointer dereference on missing data-mapping

[Dario Binacchi]

The "data-mapping" property is only required by the panel-lvds binding,
so ofnode_read_string() may return NULL. Avoid a NULL pointer
dereference in this case by falling back to the VESA mapping, as for any
value other than "jeida-24".

Fixes: 16cfbbbe2b51 ("video: stm32: STM32 driver support for LVDS")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 drivers/video/stm32/stm32_lvds.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/video/stm32/stm32_lvds.c b/drivers/video/stm32/stm32_lvds.c
index bf1393c9e872..a16331296388 100644
--- a/drivers/video/stm32/stm32_lvds.c
+++ b/drivers/video/stm32/stm32_lvds.c
@@ -614,9 +614,7 @@ static int stm32_lvds_of_to_plat(struct udevice *dev)
 	}
 
 	data_mapping = ofnode_read_string(dev_ofnode(plat->panel), "data-mapping");
-	if (!strcmp(data_mapping, "vesa-24"))
-		priv->bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG;
-	else if (!strcmp(data_mapping, "jeida-24"))
+	if (data_mapping && !strcmp(data_mapping, "jeida-24"))
 		priv->bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
 	else
 		priv->bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG;
-- 
2.43.0

[PATCH v2 20/35] clk: stm32: fix set_rate propagation for parent clocks

[Dario Binacchi]

From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

Use the generic clk framework set_rate path in the STM32 RCC wrapper
so CLK_SET_RATE_PARENT can propagate rate changes to parent clocks
when the leaf clock does not implement set_rate directly.

This is the case of the STM32MP25 LTDC kernel clock, whose rate can't
be set otherwise:

  stm32_display display-controller@48010000: fail to set pixel clock 27000000 hz, ret=-38

Fixes: 901e0d95df3b ("clk: stm32: fix clock counter")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

Changes in v2:
- Take the original patch from the ST downstream tree, keeping
  Gabriel's authorship

 drivers/clk/stm32/clk-stm32-core.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c
index cd6bdee5412f..29d2f64e0c76 100644
--- a/drivers/clk/stm32/clk-stm32-core.c
+++ b/drivers/clk/stm32/clk-stm32-core.c
@@ -168,17 +168,16 @@ static ulong stm32_clk_get_rate(struct clk *clk)
 
 static ulong stm32_clk_set_rate(struct clk *clk, unsigned long clk_rate)
 {
-	const struct clk_ops *ops;
 	struct clk *c = NULL;
 
 	if (!clk->id || clk_get_by_id(clk->id, &c))
 		return -ENOENT;
 
-	ops = clk_dev_ops(c->dev);
-	if (!ops->set_rate)
-		return -ENOSYS;
-
-	return ops->set_rate(c, clk_rate);
+	/*
+	 * Let the clk framework handle CLK_SET_RATE_PARENT propagation for
+	 * gate clocks that do not implement set_rate directly.
+	 */
+	return clk_set_rate(c, clk_rate);
 }
 
 const struct clk_ops stm32_clk_ops = {
-- 
2.43.0

[PATCH v2 21/35] spi: stm32: ignore the cs-gpios polarity flags

[Dario Binacchi]

As in Linux, clear the GPIOD_ACTIVE_LOW flag of the chip select GPIOs,
so that their polarity is given by the SPI_CS_HIGH mode only. Otherwise,
a chip select described as GPIO_ACTIVE_LOW, as on the Engicam
MicroGEA-STM32MP257D-RMM board, is never asserted:

  cs-gpios = <&gpioh 8 GPIO_ACTIVE_LOW>, <&gpioh 3 GPIO_ACTIVE_HIGH>;

Fixes: a2a89b2e21db ("spi: stm32: Add Serial Peripheral Interface driver for STM32MP")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 drivers/spi/stm32_spi.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c
index c93a749cd5bf..776d88736a42 100644
--- a/drivers/spi/stm32_spi.c
+++ b/drivers/spi/stm32_spi.c
@@ -624,8 +624,13 @@ static int stm32_spi_probe(struct udevice *dev)
 		if (!dm_gpio_is_valid(&plat->cs_gpios[i]))
 			continue;
 
-		dm_gpio_set_dir_flags(&plat->cs_gpios[i],
-				      GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+		/*
+		 * As in Linux, the chip select polarity is given by the
+		 * SPI_CS_HIGH mode only, the cs-gpios flags are ignored.
+		 */
+		dm_gpio_clrset_flags(&plat->cs_gpios[i],
+				     GPIOD_MASK_DIR | GPIOD_ACTIVE_LOW,
+				     GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
 	}
 
 	/* Ensure I2SMOD bit is kept cleared */
-- 
2.43.0

[PATCH v2 22/35] video: stm32: ltdc: fall back to a panel when no bridge is connected

[Dario Binacchi]

With CONFIG_VIDEO_BRIDGE enabled, only bridges are looked up on the LTDC
endpoints, so a panel directly connected to the LTDC, as the RGB one on
the Engicam MicroGEA-STM32MP257D-RMM board, is never found.

Look up a panel when no bridge is connected to the endpoint. Also, reset
the bridge and the panel when no panel is found behind the bridge, so
that the next endpoint is not affected by the failed lookup.

Fixes: 35be94614733 ("video: stm32: ltdc: properly search the first available panel")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 drivers/video/stm32/stm32_ltdc.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 267da5debe4e..7bd6724bc2a7 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -593,16 +593,21 @@ static int stm32_ltdc_display_init(struct udevice *dev, ofnode *ep_node,
 
 	if (IS_ENABLED(CONFIG_VIDEO_BRIDGE)) {
 		ret = stm32_ltdc_get_remote_device(dev, *ep_node, UCLASS_VIDEO_BRIDGE, bridge);
-		if (ret)
+		if (!ret) {
+			ret = stm32_ltdc_get_panel(*bridge, panel);
+			if (ret) {
+				*bridge = NULL;
+				*panel = NULL;
+			}
+
 			return ret;
+		}
 
-		ret = stm32_ltdc_get_panel(*bridge, panel);
-	} else {
-		/* no bridge, search a panel from display controller node */
-		ret = stm32_ltdc_get_remote_device(dev, *ep_node, UCLASS_PANEL, panel);
+		*bridge = NULL;
 	}
 
-	return ret;
+	/* no bridge, search a panel from display controller node */
+	return stm32_ltdc_get_remote_device(dev, *ep_node, UCLASS_PANEL, panel);
 }
 
 #if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
-- 
2.43.0

[PATCH v2 23/35] video: stm32: ltdc: stop looking for the panel once found

[Dario Binacchi]

stm32_ltdc_get_panel() looks for the panel on each port of the bridge,
without stopping once found, so the panel is only found if its port is
the last one in the devicetree. This is not always the case, e.g. when
the ports are added by a DT overlay.

Stop at the first port connected to a panel.

Fixes: 35be94614733 ("video: stm32: ltdc: properly search the first available panel")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

Changes in v2:
- New patch

 drivers/video/stm32/stm32_ltdc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 7bd6724bc2a7..da580a78a5db 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -571,6 +571,8 @@ static int stm32_ltdc_get_panel(struct udevice *dev, struct udevice **panel)
 			continue;
 
 		ret = stm32_ltdc_get_remote_device(dev, ep_node, UCLASS_PANEL, panel);
+		if (!ret && *panel)
+			break;
 	}
 
 	/* Sanity check, we can get out of the loop without having a clean ofnode */
-- 
2.43.0

[PATCH v2 24/35] arm: stm32mp: stm32mp2: move boot device environment helpers to SoC code

[Dario Binacchi]

The environment location and the MMC environment device only depend on
the boot device reported by the ROM code, so they are not specific to
the STMicroelectronics boards.

Move env_get_location(), mmc_get_env_dev() and the mmc_get_boot() helper
to the SoC code, so that other vendor boards can use them too.

No functional change intended.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 arch/arm/mach-stm32mp/stm32mp2/Makefile |  1 +
 arch/arm/mach-stm32mp/stm32mp2/env.c    | 82 +++++++++++++++++++++++++
 board/st/stm32mp2/stm32mp2.c            | 71 +--------------------
 3 files changed, 84 insertions(+), 70 deletions(-)
 create mode 100644 arch/arm/mach-stm32mp/stm32mp2/env.c

diff --git a/arch/arm/mach-stm32mp/stm32mp2/Makefile b/arch/arm/mach-stm32mp/stm32mp2/Makefile
index 8f2e641dcab6..f2def2d1283e 100644
--- a/arch/arm/mach-stm32mp/stm32mp2/Makefile
+++ b/arch/arm/mach-stm32mp/stm32mp2/Makefile
@@ -5,6 +5,7 @@
 
 obj-y += cpu.o
 obj-y += arm64-mmu.o
+obj-y += env.o
 obj-y += rifsc.o
 obj-y += stm32mp2x.o
 obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
diff --git a/arch/arm/mach-stm32mp/stm32mp2/env.c b/arch/arm/mach-stm32mp/stm32mp2/env.c
new file mode 100644
index 000000000000..9e7b5b882908
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp2/env.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_ARCH
+
+#include <config.h>
+#include <env_internal.h>
+#include <log.h>
+#include <mmc.h>
+#include <asm/arch/sys_proto.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+	u32 bootmode = get_bootmode();
+
+	if (prio)
+		return ENVL_UNKNOWN;
+
+	switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
+	case BOOT_FLASH_SD:
+	case BOOT_FLASH_EMMC:
+		if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
+			return ENVL_MMC;
+		else
+			return ENVL_NOWHERE;
+
+	case BOOT_FLASH_NAND:
+	case BOOT_FLASH_SPINAND:
+		if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
+			return ENVL_UBI;
+		else
+			return ENVL_NOWHERE;
+
+	case BOOT_FLASH_NOR:
+		if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+			return ENVL_SPI_FLASH;
+		else
+			return ENVL_NOWHERE;
+	default:
+		return ENVL_NOWHERE;
+	}
+}
+
+static int mmc_get_boot(void)
+{
+	struct udevice *dev;
+	u32 boot_mode = get_bootmode();
+	unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
+	char cmd[20];
+	const u32 sdmmc_addr[] = {
+		STM32_SDMMC1_BASE,
+		STM32_SDMMC2_BASE,
+		STM32_SDMMC3_BASE
+	};
+
+	if (instance >= ARRAY_SIZE(sdmmc_addr))
+		return 0;
+
+	/* search associated sdmmc node in devicetree */
+	snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
+	if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
+		log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
+		return 0;
+	}
+
+	return dev_seq(dev);
+}
+
+int mmc_get_env_dev(void)
+{
+	const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC, (CONFIG_ENV_MMC_DEVICE_INDEX), (-1));
+
+	if (mmc_env_dev >= 0)
+		return mmc_env_dev;
+
+	/* use boot instance to select the correct mmc device identifier */
+	return mmc_get_boot();
+}
diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c
index f2575339b990..96735fa9f8a1 100644
--- a/board/st/stm32mp2/stm32mp2.c
+++ b/board/st/stm32mp2/stm32mp2.c
@@ -7,12 +7,11 @@
 
 #include <button.h>
 #include <config.h>
-#include <env_internal.h>
+#include <env.h>
 #include <fdt_support.h>
 #include <led.h>
 #include <log.h>
 #include <misc.h>
-#include <mmc.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
@@ -88,74 +87,6 @@ int board_init(void)
 	return 0;
 }
 
-enum env_location env_get_location(enum env_operation op, int prio)
-{
-	u32 bootmode = get_bootmode();
-
-	if (prio)
-		return ENVL_UNKNOWN;
-
-	switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
-	case BOOT_FLASH_SD:
-	case BOOT_FLASH_EMMC:
-		if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
-			return ENVL_MMC;
-		else
-			return ENVL_NOWHERE;
-
-	case BOOT_FLASH_NAND:
-	case BOOT_FLASH_SPINAND:
-		if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
-			return ENVL_UBI;
-		else
-			return ENVL_NOWHERE;
-
-	case BOOT_FLASH_NOR:
-		if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
-			return ENVL_SPI_FLASH;
-		else
-			return ENVL_NOWHERE;
-	default:
-		return ENVL_NOWHERE;
-	}
-}
-
-int mmc_get_boot(void)
-{
-	struct udevice *dev;
-	u32 boot_mode = get_bootmode();
-	unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
-	char cmd[20];
-	const u32 sdmmc_addr[] = {
-		STM32_SDMMC1_BASE,
-		STM32_SDMMC2_BASE,
-		STM32_SDMMC3_BASE
-	};
-
-	if (instance >= ARRAY_SIZE(sdmmc_addr))
-		return 0;
-
-	/* search associated sdmmc node in devicetree */
-	snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
-	if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
-		log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
-		return 0;
-	}
-
-	return dev_seq(dev);
-};
-
-int mmc_get_env_dev(void)
-{
-	const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC, (CONFIG_ENV_MMC_DEVICE_INDEX), (-1));
-
-	if (mmc_env_dev >= 0)
-		return mmc_env_dev;
-
-	/* use boot instance to select the correct mmc device identifier */
-	return mmc_get_boot();
-}
-
 int board_late_init(void)
 {
 	const void *fdt_compat;
-- 
2.43.0

[PATCH v2 25/35] splash: make splash_video_logo_load() available to boards

[Dario Binacchi]

Boards providing their own splash_screen_prepare() to load the splash
image from a board specific location have no way to fall back to the
built-in logo when that image is missing.

Export splash_video_logo_load(), which copies the built-in logo to
the "splashimage" address, so that they can use it as fallback.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

---

Changes in v2:
- Add Reviewed-by tag

 common/splash.c  | 4 +---
 include/splash.h | 9 +++++++++
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/common/splash.c b/common/splash.c
index 8a65ae597771..5502b4f5452f 100644
--- a/common/splash.c
+++ b/common/splash.c
@@ -70,7 +70,7 @@ static struct splash_location default_splash_locations[] = {
 
 #include <bmp_logo_data.h>
 
-static int splash_video_logo_load(void)
+int splash_video_logo_load(void)
 {
 	char *splashimage;
 	ulong bmp_load_addr;
@@ -90,8 +90,6 @@ static int splash_video_logo_load(void)
 
 	return 0;
 }
-#else
-static inline int splash_video_logo_load(void) { return -ENOSYS; }
 #endif
 
 __weak int splash_screen_prepare(void)
diff --git a/include/splash.h b/include/splash.h
index 7671bd7e9c44..0a3ea0346030 100644
--- a/include/splash.h
+++ b/include/splash.h
@@ -61,6 +61,15 @@ static inline int splash_source_load(struct splash_location *locations,
 }
 #endif
 
+#if IS_ENABLED(CONFIG_VIDEO_LOGO)
+int splash_video_logo_load(void);
+#else
+static inline int splash_video_logo_load(void)
+{
+	return -ENOSYS;
+}
+#endif
+
 int splash_screen_prepare(void);
 void splash_get_pos(int *x, int *y);
 int splash_display(void);
-- 
2.43.0

[PATCH v2 26/35] arm: stm32mp: move FWU multi-bank support to SoC code

[Dario Binacchi]

The FWU multi-bank support, i.e. the boot index read from the TAMP
backup register and the selection of the partitions of the booted bank,
only depends on the SoC and the TF-A, so it is not specific to the
STMicroelectronics boards.

Move it from board/st/common to the SoC code, renaming it to fwu.c as
the stm32mp_ prefix is redundant there, so that other vendor boards can
use it too.

No functional change intended.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 arch/arm/mach-stm32mp/Makefile                               | 1 +
 board/st/common/stm32mp_fwu.c => arch/arm/mach-stm32mp/fwu.c | 0
 board/st/common/Makefile                                     | 1 -
 3 files changed, 1 insertion(+), 1 deletion(-)
 rename board/st/common/stm32mp_fwu.c => arch/arm/mach-stm32mp/fwu.c (100%)

diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index 853469f3c503..e22207465658 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -22,4 +22,5 @@ ifndef CONFIG_XPL_BUILD
 obj-y += cmd_stm32prog/
 obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o
 obj-$(CONFIG_TFABOOT) += boot_params.o
+obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += fwu.o
 endif
diff --git a/board/st/common/stm32mp_fwu.c b/arch/arm/mach-stm32mp/fwu.c
similarity index 100%
rename from board/st/common/stm32mp_fwu.c
rename to arch/arm/mach-stm32mp/fwu.c
diff --git a/board/st/common/Makefile b/board/st/common/Makefile
index 36dfaddfa0eb..122b13c3aa8d 100644
--- a/board/st/common/Makefile
+++ b/board/st/common/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_PMIC_STPMIC1) += stpmic1.o
 ifeq ($(CONFIG_ARCH_STM32MP),y)
 obj-$(CONFIG_SET_DFU_ALT_INFO) += stm32mp_dfu.o
 obj-$(CONFIG_$(PHASE_)DFU_VIRT) += stm32mp_dfu_virt.o
-obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += stm32mp_fwu.o
 endif
 
 obj-$(CONFIG_TYPEC_STUSB160X) += stusb160x.o
-- 
2.43.0

[PATCH v2 27/35] configs: stm32mp25: move FWU A/B boot environment to common settings

[Dario Binacchi]

The distro boot environment booting from the bootfs partition of the
bank selected by the TF-A only depends on the FWU multi-bank support, so
it is not specific to the STMicroelectronics boards.

Move it to the STM32MP25 common settings, so that other vendor boards
can use it too.

No functional change intended.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 include/configs/stm32mp25_common.h    | 20 ++++++++++++++++++++
 include/configs/stm32mp25_st_common.h | 15 ---------------
 2 files changed, 20 insertions(+), 15 deletions(-)

diff --git a/include/configs/stm32mp25_common.h b/include/configs/stm32mp25_common.h
index a334b47b555b..7eb5c4ffc00f 100644
--- a/include/configs/stm32mp25_common.h
+++ b/include/configs/stm32mp25_common.h
@@ -86,6 +86,25 @@
 #define STM32MP_BOARD_EXTRA_ENV
 #endif
 
+/*
+ * With FWU multi-bank update, boot from the bootfs partition of the bank
+ * selected by the TF-A ("boot_partuuid" set from the FWU metadata),
+ * falling back to the bootable partitions if it is not available.
+ */
+#ifdef CONFIG_FWU_MULTI_BANK_UPDATE
+#define SCAN_DEV_FOR_BOOT_PARTS \
+	"setenv devplist; " \
+	"env exists boot_partuuid && " \
+		"part number ${devtype} ${devnum} ${boot_partuuid} devplist; " \
+	"env exists devplist || " \
+		"part list ${devtype} ${devnum} -bootable devplist; "
+
+#define STM32MP_FWU_ENV \
+	"altbootcmd=${bootcmd}\0"
+#else
+#define STM32MP_FWU_ENV
+#endif
+
 #define STM32MP_EXTRA \
 	"env_check=if env info -p -d -q; then env save; fi\0" \
 	"boot_net_usb_start=true\0"
@@ -119,6 +138,7 @@
 	STM32MP_BOOTCMD \
 	BOOTENV \
 	STM32MP_EXTRA \
+	STM32MP_FWU_ENV \
 	STM32MP_BOARD_EXTRA_ENV
 
 #endif
diff --git a/include/configs/stm32mp25_st_common.h b/include/configs/stm32mp25_st_common.h
index 0b0267ae99b0..cb679eb1be22 100644
--- a/include/configs/stm32mp25_st_common.h
+++ b/include/configs/stm32mp25_st_common.h
@@ -8,22 +8,7 @@
 #ifndef __CONFIG_STM32MP25_ST_COMMON_H__
 #define __CONFIG_STM32MP25_ST_COMMON_H__
 
-#ifdef CONFIG_FWU_MULTI_BANK_UPDATE
-#define SCAN_DEV_FOR_BOOT_PARTS \
-	"setenv devplist; " \
-	"env exists boot_partuuid && " \
-		"part number ${devtype} ${devnum} ${boot_partuuid} devplist; " \
-	"env exists devplist || " \
-		"part list ${devtype} ${devnum} -bootable devplist; "
-
-#define ST_STM32MP25_FWU_ENV \
-	"altbootcmd=${bootcmd}\0"
-#else
-#define ST_STM32MP25_FWU_ENV
-#endif
-
 #define STM32MP_BOARD_EXTRA_ENV \
-	ST_STM32MP25_FWU_ENV \
 	"usb_pgood_delay=2000\0" \
 	"console=ttySTM0\0"
 
-- 
2.43.0

[PATCH v2 28/35] video: simple_panel: add Ampire AM-1280800W8TZQW-T00H panel

[Dario Binacchi]

Add timing data for the Ampire AM-1280800W8TZQW-T00H 10.1" LVDS panel
from Linux to the simple-panel driver.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 drivers/video/simple_panel.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c
index 1cf587f973be..e674419fd912 100644
--- a/drivers/video/simple_panel.c
+++ b/drivers/video/simple_panel.c
@@ -208,6 +208,23 @@ static const struct panel_ops simple_panel_ops = {
 	.get_modes		= simple_panel_get_modes,
 };
 
+static const struct drm_display_mode ampire_am_1280800w8tzqw_t00h_mode = {
+	.clock = 72400,
+	.hdisplay = 1280,
+	.hsync_start = 1280 + 40,
+	.hsync_end = 1280 + 40 + 80,
+	.htotal = 1280 + 40 + 80 + 40,
+	.vdisplay = 800,
+	.vsync_start = 800 + 10,
+	.vsync_end = 800 + 10 + 18,
+	.vtotal = 800 + 10 + 18 + 10,
+};
+
+static const struct simple_panel_drv_data ampire_am_1280800w8tzqw_t00h_data = {
+	.modes = &ampire_am_1280800w8tzqw_t00h_mode,
+	.num_modes = 1,
+};
+
 static const struct mipi_dsi_panel_plat panasonic_vvx10f004b00 = {
 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
 		      MIPI_DSI_CLOCK_NON_CONTINUOUS,
@@ -240,6 +257,8 @@ static const struct simple_panel_drv_data tfc_s9700rtwv43tr_01b_data = {
 static const struct udevice_id simple_panel_ids[] = {
 	{ .compatible = "simple-panel" },
 	{ .compatible = "panel-lvds" },
+	{ .compatible = "ampire,am-1280800w8tzqw-t00h",
+	  .data = (ulong)&ampire_am_1280800w8tzqw_t00h_data },
 	{ .compatible = "auo,b133xtn01" },
 	{ .compatible = "auo,b116xw03" },
 	{ .compatible = "auo,b133htn01" },
-- 
2.43.0

[PATCH v2 29/35] video: stm32: ltdc: select the pixel clock source on STM32MP25

[Dario Binacchi]

On STM32MP25 the LTDC pixel clock is selected by the SYSCFG DISPLAYCLKCR
mux, referenced by the "ref" clock of the LTDC, whose reset value is the
LVDS PHY clock. As nothing programs it, a panel connected directly to
the LTDC gets no pixel clock.

Select the LTDC kernel clock when a panel is connected directly to the
LTDC, and the LVDS PHY clock when the LTDC feeds the LVDS bridge.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 drivers/video/stm32/stm32_ltdc.c | 52 ++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index da580a78a5db..997042233171 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -12,7 +12,9 @@
 #include <dm.h>
 #include <log.h>
 #include <panel.h>
+#include <regmap.h>
 #include <reset.h>
+#include <syscon.h>
 #include <video.h>
 #include <video_bridge.h>
 #include <asm/io.h>
@@ -275,6 +277,12 @@ static const u32 layer_regs_a2[] = {
 #define HWVER_40100 0x040100
 #define HWVER_40101 0x040101
 
+/* STM32MP25 SYSCFG pixel clock mux, described by the "ref" clock */
+#define SYSCFG_DISPLAYCLKCR		0x5000
+#define DISPLAYCLKCR_DPIVSLVDS		GENMASK(1, 0)
+#define DISPLAYCLKCR_LVDS		1
+#define DISPLAYCLKCR_DPI		2
+
 enum stm32_ltdc_pix_fmt {
 	PF_ARGB8888 = 0,	/* ARGB [32 bits] */
 	PF_ABGR8888,		/* ABGR [32 bits] */
@@ -709,6 +717,44 @@ static int stm32_ltdc_of_to_plat(struct udevice *dev)
 	return ret;
 }
 
+/*
+ * On STM32MP25 the LTDC pixel clock is selected in SYSCFG_DISPLAYCLKCR
+ * among the DSI byte lane clock, the LVDS PHY pixel clock (reset value)
+ * and the LTDC kernel clock, which is used with the RGB output. Select
+ * it according to the device connected to the LTDC.
+ */
+static int stm32_ltdc_set_pixel_clock_source(struct udevice *dev)
+{
+	struct stm32_ltdc_plat *plat = dev_get_plat(dev);
+	struct ofnode_phandle_args args;
+	struct regmap *regmap;
+	int index, ret;
+	u32 src;
+
+	index = dev_read_stringlist_search(dev, "clock-names", "ref");
+	if (index < 0)
+		return 0;
+
+	if (!plat->bridge)
+		src = DISPLAYCLKCR_DPI;
+	else if (device_is_compatible(plat->bridge, "st,stm32mp25-lvds"))
+		src = DISPLAYCLKCR_LVDS;
+	else
+		return 0;
+
+	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
+					 index, &args);
+	if (ret)
+		return ret;
+
+	regmap = syscon_node_to_regmap(args.node);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	return regmap_update_bits(regmap, SYSCFG_DISPLAYCLKCR,
+				  DISPLAYCLKCR_DPIVSLVDS, src);
+}
+
 static int stm32_ltdc_probe(struct udevice *dev)
 {
 	struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -719,6 +765,12 @@ static int stm32_ltdc_probe(struct udevice *dev)
 	ulong rate;
 	int ret;
 
+	ret = stm32_ltdc_set_pixel_clock_source(dev);
+	if (ret) {
+		dev_err(dev, "pixel clock source selection error %d\n", ret);
+		return ret;
+	}
+
 	ret = clk_enable(&plat->bclk);
 	if (ret) {
 		dev_err(dev, "bus clock enable error %d\n", ret);
-- 
2.43.0

[PATCH v2 30/35] boot: extension: allow longer overlay file names

[Dario Binacchi]

The overlay file name is limited to 63 characters, which is too short
for the Linux overlays named after the base devicetree, such as:

  st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtbo

Increase the buffer size to 128 bytes. The structure is never passed to
the OS and all its users size the overlay field with sizeof() or
strlen(), so the change is safe.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>

---

Changes in v2:
- Add Reviewed-by tag

 include/extension_board.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/extension_board.h b/include/extension_board.h
index 0b9fb99ad7dc..f72db21441da 100644
--- a/include/extension_board.h
+++ b/include/extension_board.h
@@ -62,7 +62,7 @@ struct extension {
 	char name[32];
 	char owner[32];
 	char version[32];
-	char overlay[64];
+	char overlay[128];
 	char other[32];
 };
 
-- 
2.43.0

[PATCH v2 31/35] dts: support applying DT overlays to the control DT with OF_UPSTREAM

[Dario Binacchi]

Extend to OF_UPSTREAM the support for building the control DT by
applying DT overlays to a base DT, so far available for the DTs in
arch/$(ARCH)/dts only. The upstream DT overlays to apply are listed in
CONFIG_OF_UPSTREAM_CONTROL_DT_OVERLAYS.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

Changes in v2:
- New patch

 dts/Kconfig          | 10 ++++++++++
 dts/Makefile         |  2 ++
 scripts/Makefile.dts |  7 +++++++
 3 files changed, 19 insertions(+)

diff --git a/dts/Kconfig b/dts/Kconfig
index a2973ef40860..f8cc3b26b10f 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -137,6 +137,16 @@ config OF_UPSTREAM_VENDOR
 	help
 	  Select the vendor to build all devicetree files for.
 
+config OF_UPSTREAM_CONTROL_DT_OVERLAYS
+	string "List of upstream device tree overlays to apply for DT control"
+	depends on OF_UPSTREAM
+	help
+	  This option specifies a list of device tree overlays to apply at
+	  build time to the device tree used for DT control, so that the
+	  board can select at run-time the hardware they describe. This is
+	  a list of device tree overlays (without the .dtbo suffix)
+	  separated by <space>.
+
 config OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS
 	bool "Build local DTBOs as fallback for DTBOs missing upstream"
 	default n
diff --git a/dts/Makefile b/dts/Makefile
index befc6de18056..3fee5a0515c0 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -32,6 +32,8 @@ endif
 
 ifneq ($(EXT_DTB),)
 DTB := $(EXT_DTB)
+else ifneq ($(subst ",,$(CONFIG_OF_UPSTREAM_CONTROL_DT_OVERLAYS)),)
+DTB := $(dt_dir)/$(DEVICE_TREE)-overlays.dtb
 else
 DTB := $(dt_dir)/$(DEVICE_TREE).dtb
 endif
diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts
index 3871a4ad4123..5067f6ea2daf 100644
--- a/scripts/Makefile.dts
+++ b/scripts/Makefile.dts
@@ -16,6 +16,13 @@ dtb-y += $(subst $(dt_dir)/,,$(dtb-vendor_dts))
 
 endif
 
+ifneq ($(subst ",,$(CONFIG_OF_UPSTREAM_CONTROL_DT_OVERLAYS)),)
+control-dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE)))
+$(control-dt)-overlays-dtbs := $(control-dt).dtb \
+	$(patsubst %,%.dtbo,$(subst ",,$(CONFIG_OF_UPSTREAM_CONTROL_DT_OVERLAYS)))
+dtb-y += $(control-dt)-overlays.dtb
+endif
+
 ifneq ($(CONFIG_SYS_DTC_PAD_BYTES),0)
 DTC_FLAGS += -p $(CONFIG_SYS_DTC_PAD_BYTES)
 endif
-- 
2.43.0

[PATCH v2 32/35] board: engicam: stm32mp2: add MicroGEA-STM32MP257D-RMM board

[Dario Binacchi]

Add support for the Engicam MicroGEA-STM32MP257D-RMM board, based on
the Engicam MicroGEA-STM32MP257 SoM.

General features:
- STM32MP257D SoC
- 2GB of RAM
- eMMC
- microSD slot
- CAN
- Audio codec (SGTL5000)
- PWM backlight and buzzer
- 5" RGB or 10.1" LVDS display

As for the Engicam STM32MP1 SoMs, add a dedicated target for the SoM,
so that the carrier boards are handled by the devicetree.

The display can't be detected, so it is selected by the "display"
environment variable, which defaults to the RGB one. The board
registers an extension driver reporting the matching Linux devicetree
overlay, which the extlinux and EFI boot methods apply to the kernel
devicetree.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

Changes in v2:
- Simplify the comments

 ...m32mp257d-engicam-microgea-rmm-u-boot.dtsi |  27 +++++
 arch/arm/mach-stm32mp/Kconfig.25x             |  17 +++
 board/engicam/stm32mp2/Kconfig                |  12 ++
 board/engicam/stm32mp2/MAINTAINERS            |   7 ++
 board/engicam/stm32mp2/Makefile               |   7 ++
 board/engicam/stm32mp2/microgea-stm32mp2.env  |   9 ++
 board/engicam/stm32mp2/stm32mp2.c             | 104 +++++++++++++++++
 configs/stm32mp25-microgea-rmm_defconfig      | 105 ++++++++++++++++++
 8 files changed, 288 insertions(+)
 create mode 100644 arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
 create mode 100644 board/engicam/stm32mp2/Kconfig
 create mode 100644 board/engicam/stm32mp2/MAINTAINERS
 create mode 100644 board/engicam/stm32mp2/Makefile
 create mode 100644 board/engicam/stm32mp2/microgea-stm32mp2.env
 create mode 100644 board/engicam/stm32mp2/stm32mp2.c
 create mode 100644 configs/stm32mp25-microgea-rmm_defconfig

diff --git a/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi b/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
new file mode 100644
index 000000000000..4cc0d47e999d
--- /dev/null
+++ b/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ * Copyright (C) 2026 Engicam srl
+ */
+
+#include "stm32mp25-u-boot.dtsi"
+
+/ {
+	config {
+		u-boot,mmc-env-partition = "u-boot-env";
+	};
+};
+
+&usart2 {
+	bootph-all;
+};
+
+&usart2_pins_a {
+	bootph-all;
+	pins1 {
+		bootph-all;
+	};
+	pins2 {
+		bootph-all;
+	};
+};
diff --git a/arch/arm/mach-stm32mp/Kconfig.25x b/arch/arm/mach-stm32mp/Kconfig.25x
index 7d2d8171845b..cfd746b82c2c 100644
--- a/arch/arm/mach-stm32mp/Kconfig.25x
+++ b/arch/arm/mach-stm32mp/Kconfig.25x
@@ -13,6 +13,22 @@ config TARGET_ST_STM32MP25X
 		managed by board/st/stm32mp2
 		The difference between board are managed with devicetree
 
+config TARGET_MICROGEA_STM32MP257
+	bool "Engicam MicroGEA STM32MP257 SOM"
+	select SUPPORT_EXTENSION_SCAN
+	imply BOOTSTAGE
+	imply CMD_BOOTSTAGE
+	help
+		MicroGEA STM32MP257 is a System-on-Module (SoM) from Engicam
+		based on the STM32MP257 SoC, with 2GB of RAM and eMMC.
+
+		The carrier boards supported are managed with devicetree:
+		* MicroGEA STM32MP257D RMM
+
+		The display fitted on the carrier board is described by a
+		devicetree overlay, selected through the "display" environment
+		variable and applied to the kernel devicetree at boot.
+
 endchoice
 
 config TEXT_BASE
@@ -35,6 +51,7 @@ config DEBUG_UART_BASE
 
 endif
 
+source "board/engicam/stm32mp2/Kconfig"
 source "board/st/stm32mp2/Kconfig"
 
 endif
diff --git a/board/engicam/stm32mp2/Kconfig b/board/engicam/stm32mp2/Kconfig
new file mode 100644
index 000000000000..a4d590d161f4
--- /dev/null
+++ b/board/engicam/stm32mp2/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_MICROGEA_STM32MP257
+
+config SYS_BOARD
+	default "stm32mp2"
+
+config SYS_VENDOR
+	default "engicam"
+
+config SYS_CONFIG_NAME
+	default "stm32mp25_common"
+
+endif
diff --git a/board/engicam/stm32mp2/MAINTAINERS b/board/engicam/stm32mp2/MAINTAINERS
new file mode 100644
index 000000000000..680b083aca2b
--- /dev/null
+++ b/board/engicam/stm32mp2/MAINTAINERS
@@ -0,0 +1,7 @@
+MicroGEA-STM32MP257D-RMM
+M:	Dario Binacchi <dario.binacchi@amarulasolutions.com>
+M:	Michael Trimarchi <michael@amarulasolutions.com>
+S:	Maintained
+F:	arch/arm/dts/stm32mp257d-engicam-microgea-rmm*
+F:	board/engicam/stm32mp2/
+F:	configs/stm32mp25-microgea-rmm_defconfig
diff --git a/board/engicam/stm32mp2/Makefile b/board/engicam/stm32mp2/Makefile
new file mode 100644
index 000000000000..e86afc9c9e34
--- /dev/null
+++ b/board/engicam/stm32mp2/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+#
+# Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+# Copyright (C) 2026 Engicam srl
+#
+
+obj-y += stm32mp2.o
diff --git a/board/engicam/stm32mp2/microgea-stm32mp2.env b/board/engicam/stm32mp2/microgea-stm32mp2.env
new file mode 100644
index 000000000000..1f50f68d4972
--- /dev/null
+++ b/board/engicam/stm32mp2/microgea-stm32mp2.env
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */
+/*
+ * Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ * Copyright (C) 2026 Engicam srl
+ */
+
+/* Default display of the carrier board */
+display=rk050hr345-ct106a
+extension_overlay_addr=0x90300000
diff --git a/board/engicam/stm32mp2/stm32mp2.c b/board/engicam/stm32mp2/stm32mp2.c
new file mode 100644
index 000000000000..5f3afd877a11
--- /dev/null
+++ b/board/engicam/stm32mp2/stm32mp2.c
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ * Copyright (C) 2026 Engicam srl
+ */
+
+#define LOG_CATEGORY LOGC_BOARD
+
+#include <alist.h>
+#include <config.h>
+#include <env.h>
+#include <extension_board.h>
+#include <log.h>
+#include <dm/ofnode.h>
+#include <linux/string.h>
+
+int checkboard(void)
+{
+	const char *fdt_compat;
+	int fdt_compat_len;
+
+	fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
+					 &fdt_compat_len);
+
+	log_info("Board: stm32mp2 (%s)\n",
+		 fdt_compat && fdt_compat_len ? fdt_compat : "");
+
+	return 0;
+}
+
+static const char *microgea_get_display(void)
+{
+	const char *display = env_get("display");
+
+	if (!display || !*display)
+		display = env_get_default("display");
+
+	return display;
+}
+
+int board_late_init(void)
+{
+	const char *fdt_compat;
+	int fdt_compat_len;
+
+	if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
+		fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
+						 &fdt_compat_len);
+		if (fdt_compat && fdt_compat_len)
+			env_set("board_name", fdt_compat);
+	}
+
+	if (!env_get("fdtfile"))
+		env_set("fdtfile", CONFIG_DEFAULT_DEVICE_TREE ".dtb");
+
+	return 0;
+}
+
+/*
+ * The display is described by the Linux devicetree overlay
+ * <fdtfile without .dtb>-overlay-<display>.dtbo
+ */
+static int microgea_extension_board_scan(struct udevice *dev,
+					 struct alist *extension_list)
+{
+	struct extension display = {0};
+	const char *fdtfile, *name;
+	int len, ret;
+
+	name = microgea_get_display();
+	if (!name || !*name)
+		return 0;
+
+	fdtfile = env_get("fdtfile");
+	if (!fdtfile) {
+		log_err("fdtfile not set, cannot select the display overlay\n");
+		return -ENOENT;
+	}
+
+	len = strlen(fdtfile);
+	if (len > 4 && !strcmp(fdtfile + len - 4, ".dtb"))
+		len -= 4;
+
+	ret = snprintf(display.overlay, sizeof(display.overlay),
+		       "%.*s-overlay-%s.dtbo", len, fdtfile, name);
+	if (ret >= sizeof(display.overlay)) {
+		log_err("display overlay name too long\n");
+		return -ENAMETOOLONG;
+	}
+
+	strlcpy(display.name, name, sizeof(display.name));
+	strlcpy(display.owner, "Engicam", sizeof(display.owner));
+	strlcpy(display.other, "Display", sizeof(display.other));
+	if (!alist_add(extension_list, display))
+		return -ENOMEM;
+
+	return 1;
+}
+
+U_BOOT_EXTENSION(microgea_extension, microgea_extension_board_scan);
+
+U_BOOT_DRVINFO(microgea_extension) = {
+	.name = "microgea_extension",
+};
diff --git a/configs/stm32mp25-microgea-rmm_defconfig b/configs/stm32mp25-microgea-rmm_defconfig
new file mode 100644
index 000000000000..34933f1e7e41
--- /dev/null
+++ b/configs/stm32mp25-microgea-rmm_defconfig
@@ -0,0 +1,105 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STM32MP=y
+CONFIG_SYS_MALLOC_F_LEN=0x600000
+CONFIG_ENV_SOURCE_FILE="microgea-stm32mp2"
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x90000000
+CONFIG_ENV_OFFSET=0x900000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp257d-engicam-microgea-rmm"
+CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_LOAD_ADDR=0x84000000
+CONFIG_STM32MP25X=y
+CONFIG_DDR_CACHEABLE_SIZE=0x10000000
+CONFIG_CMD_STM32KEY=y
+CONFIG_MFD_STM32_TIMERS=y
+CONFIG_ENV_OFFSET_REDUND=0x940000
+CONFIG_TARGET_MICROGEA_STM32MP257=y
+CONFIG_SYS_MEMTEST_START=0x84000000
+CONFIG_SYS_MEMTEST_END=0x88000000
+CONFIG_API=y
+CONFIG_SYS_MMC_MAX_DEVICE=3
+CONFIG_FIT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=1
+CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+# CONFIG_BOARD_INIT is not set
+CONFIG_SYS_PROMPT="STM32MP> "
+# CONFIG_CMD_BDI is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_ADTIMG=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_EXTENSION=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PWM=y
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_LOG=y
+CONFIG_CMD_UBI=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM_BUILD_VENDOR=y
+CONFIG_OF_UPSTREAM_VENDOR="st"
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_REDUNDANT=y
+CONFIG_ENV_UBI_PART="UBI"
+CONFIG_ENV_UBI_VOLUME="uboot_config"
+CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
+CONFIG_ENV_MMC_DEVICE_INDEX=-1
+CONFIG_NO_NET=y
+CONFIG_SYS_64BIT_LBA=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_SCMI_FIRMWARE=y
+CONFIG_GPIO_HOG=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_STM32F7=y
+CONFIG_LED=y
+CONFIG_LED_BOOT=y
+CONFIG_LED_GPIO=y
+CONFIG_STM32_OMM=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_STM32_SDMMC2=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_USE_SYS_MAX_FLASH_BANKS=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PINCONF=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_STM32=y
+CONFIG_RAM=y
+# CONFIG_STM32MP1_DDR is not set
+CONFIG_DM_RNG=y
+CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_STM32_OSPI=y
+CONFIG_STM32_SPI=y
+# CONFIG_OPTEE_TA_AVB is not set
+CONFIG_WDT=y
+CONFIG_WDT_STM32MP=y
+CONFIG_WDT_ARM_SMC=y
+# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
+CONFIG_ERRNO_STR=y
-- 
2.43.0

[PATCH v2 33/35] board: engicam: stm32mp2: add splash screen

[Dario Binacchi]

The U-Boot devicetree includes the overlays of all the supported
displays. Enable only the one selected by the "display" environment
variable.

The customer splash image is loaded from its partition, falling back to
the built-in logo.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

Changes in v2:
- Apply the upstream display overlays to the U-Boot devicetree instead
  of describing the displays in the -u-boot.dtsi file
- Do not leave the LTDC RGB pins configured with the LVDS display

 ...m32mp257d-engicam-microgea-rmm-u-boot.dtsi |   5 +
 board/engicam/stm32mp2/microgea-stm32mp2.env  |   4 +
 board/engicam/stm32mp2/stm32mp2.c             | 179 ++++++++++++++++++
 configs/stm32mp25-microgea-rmm_defconfig      |  16 ++
 4 files changed, 204 insertions(+)

diff --git a/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi b/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
index 4cc0d47e999d..8a3723baa116 100644
--- a/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
@@ -12,6 +12,11 @@
 	};
 };
 
+&ltdc {
+	clocks = <&rcc CK_KER_LTDC>, <&rcc CK_BUS_LTDC>, <&syscfg>, <&lvds>;
+	bootph-all;
+};
+
 &usart2 {
 	bootph-all;
 };
diff --git a/board/engicam/stm32mp2/microgea-stm32mp2.env b/board/engicam/stm32mp2/microgea-stm32mp2.env
index 1f50f68d4972..cbc0a73f5081 100644
--- a/board/engicam/stm32mp2/microgea-stm32mp2.env
+++ b/board/engicam/stm32mp2/microgea-stm32mp2.env
@@ -7,3 +7,7 @@
 /* Default display of the carrier board */
 display=rk050hr345-ct106a
 extension_overlay_addr=0x90300000
+
+splashfile=splash.bmp
+splashimage=CONFIG_SYS_LOAD_ADDR
+splashpos=m,m
diff --git a/board/engicam/stm32mp2/stm32mp2.c b/board/engicam/stm32mp2/stm32mp2.c
index 5f3afd877a11..64317f271ed7 100644
--- a/board/engicam/stm32mp2/stm32mp2.c
+++ b/board/engicam/stm32mp2/stm32mp2.c
@@ -8,12 +8,23 @@
 
 #include <alist.h>
 #include <config.h>
+#include <dm.h>
 #include <env.h>
+#include <event.h>
 #include <extension_board.h>
 #include <log.h>
+#include <splash.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
+#include <dm/device-internal.h>
 #include <dm/ofnode.h>
+#include <dm/ofnode_graph.h>
+#include <dm/uclass-internal.h>
 #include <linux/string.h>
 
+#define MICROGEA_RK050HR345 "rk050hr345-ct106a"
+#define MICROGEA_AM1280800W8TZQW "am-1280800w8tzqw-t00h"
+
 int checkboard(void)
 {
 	const char *fdt_compat;
@@ -38,6 +49,174 @@ static const char *microgea_get_display(void)
 	return display;
 }
 
+/* Disable a node and unbind its device, if any */
+static int microgea_disable_node(ofnode node)
+{
+	struct udevice *dev;
+	int ret;
+
+	if (!ofnode_valid(node))
+		return 0;
+
+	if (!device_find_global_by_ofnode(node, &dev)) {
+		ret = device_unbind(dev);
+		if (ret)
+			return ret;
+	}
+
+	return ofnode_set_enabled(node, false);
+}
+
+static int microgea_ltdc_connect(ofnode ltdc, ofnode ep)
+{
+	u32 ltdc_phandle, phandle;
+	ofnode ltdc_ep;
+	int ret;
+
+	ltdc_ep = ofnode_graph_get_endpoint_by_regs(ltdc, -1, -1);
+	if (!ofnode_valid(ltdc_ep) || !ofnode_valid(ep) ||
+	    ofnode_read_u32(ltdc_ep, "phandle", &ltdc_phandle) ||
+	    ofnode_read_u32(ep, "phandle", &phandle))
+		return -EINVAL;
+
+	ret = ofnode_write_u32(ltdc_ep, "remote-endpoint", phandle);
+	if (ret)
+		return ret;
+
+	return ofnode_write_u32(ep, "remote-endpoint", ltdc_phandle);
+}
+
+static int microgea_disable_compatible(const char *compat)
+{
+	return microgea_disable_node(ofnode_by_compatible(ofnode_null(),
+							  compat));
+}
+
+static const struct microgea_display {
+	const char *name;	/* value of the "display" env variable */
+	const char *compatible;	/* compatible of its panel */
+	const char *bridge;	/* compatible of its bridge, if any */
+} microgea_displays[] = {
+	{
+		.name = MICROGEA_RK050HR345,
+		.compatible = "rocktech," MICROGEA_RK050HR345,
+	},
+	{
+		.name = MICROGEA_AM1280800W8TZQW,
+		.compatible = "ampire," MICROGEA_AM1280800W8TZQW,
+		.bridge = "st,stm32mp25-lvds",
+	},
+};
+
+static bool microgea_uses_bridge(const struct microgea_display *d,
+				 const char *bridge)
+{
+	return d && d->bridge && !strcmp(d->bridge, bridge);
+}
+
+/*
+ * The U-Boot devicetree includes the overlays of all the displays. Keep
+ * only the one in use, or disable the LTDC if it is not supported.
+ */
+static int microgea_settings_r(void)
+{
+	const char *display = microgea_get_display();
+	const struct microgea_display *sel = NULL, *d;
+	struct udevice *video;
+	ofnode ltdc, node, ep;
+	int i, ret;
+
+	if (uclass_find_first_device(UCLASS_VIDEO, &video) || !video)
+		return 0;
+
+	ltdc = dev_ofnode(video);
+
+	for (i = 0; i < ARRAY_SIZE(microgea_displays); i++) {
+		if (display && !strcmp(display, microgea_displays[i].name)) {
+			sel = &microgea_displays[i];
+			break;
+		}
+	}
+
+	for (i = 0; i < ARRAY_SIZE(microgea_displays); i++) {
+		d = &microgea_displays[i];
+		if (d == sel)
+			continue;
+
+		ret = microgea_disable_compatible(d->compatible);
+		if (ret)
+			return ret;
+
+		if (d->bridge && !microgea_uses_bridge(sel, d->bridge)) {
+			ret = microgea_disable_compatible(d->bridge);
+			if (ret)
+				return ret;
+		}
+	}
+
+	if (!sel)
+		return microgea_disable_node(ltdc);
+
+	node = ofnode_by_compatible(ofnode_null(), sel->compatible);
+	if (!ofnode_valid(node))
+		return microgea_disable_node(ltdc);
+
+	/* Connect the RGB panel to the LTDC */
+	if (!sel->bridge) {
+		ep = ofnode_graph_get_endpoint_by_regs(node, -1, -1);
+		return microgea_ltdc_connect(ltdc, ep);
+	}
+
+	/* The bridge does not use the LTDC pins */
+	ret = ofnode_delete_prop(ltdc, "pinctrl-names");
+	if (!ret)
+		ret = ofnode_delete_prop(ltdc, "pinctrl-0");
+	if (!ret)
+		ret = ofnode_delete_prop(ltdc, "pinctrl-1");
+	if (ret)
+		return ret;
+
+	node = ofnode_by_compatible(ofnode_null(), sel->bridge);
+	if (!ofnode_valid(node))
+		return -ENODEV;
+
+	/* Connect the bridge to the LTDC */
+	ep = ofnode_graph_get_endpoint_by_regs(node, 0, -1);
+	return microgea_ltdc_connect(ltdc, ep);
+}
+EVENT_SPY_SIMPLE(EVT_SETTINGS_R, microgea_settings_r);
+
+#if CONFIG_IS_ENABLED(SPLASH_SOURCE)
+static struct splash_location microgea_splash_locations[] = {
+	{
+		.name = "mmc",
+		.storage = SPLASH_STORAGE_MMC,
+		.flags = SPLASH_STORAGE_FS,
+	},
+};
+
+/* Load the customer splash image from its partition, else the built-in logo */
+int splash_screen_prepare(void)
+{
+	static char devpart[8];
+	u32 bootmode = get_bootmode();
+	unsigned int instance = (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1;
+
+	switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
+	case BOOT_FLASH_SD:
+	case BOOT_FLASH_EMMC:
+		snprintf(devpart, sizeof(devpart), "%u:a", instance);
+		microgea_splash_locations[0].devpart = devpart;
+		if (!splash_source_load(microgea_splash_locations,
+					ARRAY_SIZE(microgea_splash_locations)))
+			return 0;
+		break;
+	}
+
+	return splash_video_logo_load();
+}
+#endif
+
 int board_late_init(void)
 {
 	const char *fdt_compat;
diff --git a/configs/stm32mp25-microgea-rmm_defconfig b/configs/stm32mp25-microgea-rmm_defconfig
index 34933f1e7e41..0f1b7db7abc8 100644
--- a/configs/stm32mp25-microgea-rmm_defconfig
+++ b/configs/stm32mp25-microgea-rmm_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_PWM=y
 # CONFIG_CMD_LOADB is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_MTD=y
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_RNG=y
@@ -48,6 +49,7 @@ CONFIG_CMD_UBI=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_UPSTREAM_BUILD_VENDOR=y
 CONFIG_OF_UPSTREAM_VENDOR="st"
+CONFIG_OF_UPSTREAM_CONTROL_DT_OVERLAYS="st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h"
 CONFIG_ENV_IS_NOWHERE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -98,6 +100,20 @@ CONFIG_DM_SPI=y
 CONFIG_STM32_OSPI=y
 CONFIG_STM32_SPI=y
 # CONFIG_OPTEE_TA_AVB is not set
+CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9806E=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_LVDS=y
+CONFIG_VIDEO_STM32_MAX_XRES=1280
+CONFIG_VIDEO_STM32_MAX_YRES=854
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_SPLASH_SOURCE=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
 CONFIG_WDT=y
 CONFIG_WDT_STM32MP=y
 CONFIG_WDT_ARM_SMC=y
-- 
2.43.0

[PATCH v2 34/35] board: engicam: stm32mp2: support FWU A/B bank bootup

[Dario Binacchi]

Enable the FWU multi-bank update. The FWU metadata are stored in the
boot device, so point the "fwu-mdata-store" property to it at runtime.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 ...m32mp257d-engicam-microgea-rmm-u-boot.dtsi |  6 +++
 board/engicam/stm32mp2/stm32mp2.c             | 40 +++++++++++++++++++
 configs/stm32mp25-microgea-rmm_defconfig      |  6 +++
 3 files changed, 52 insertions(+)

diff --git a/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi b/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
index 8a3723baa116..3055d661d849 100644
--- a/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp257d-engicam-microgea-rmm-u-boot.dtsi
@@ -10,6 +10,12 @@
 	config {
 		u-boot,mmc-env-partition = "u-boot-env";
 	};
+
+	/* moved to the eMMC, when booting from it, by board_fix_fdt() */
+	fwu-mdata {
+		compatible = "u-boot,fwu-mdata-gpt";
+		fwu-mdata-store = <&sdmmc1>;
+	};
 };
 
 &ltdc {
diff --git a/board/engicam/stm32mp2/stm32mp2.c b/board/engicam/stm32mp2/stm32mp2.c
index 64317f271ed7..e15141677775 100644
--- a/board/engicam/stm32mp2/stm32mp2.c
+++ b/board/engicam/stm32mp2/stm32mp2.c
@@ -12,6 +12,7 @@
 #include <env.h>
 #include <event.h>
 #include <extension_board.h>
+#include <fdt_support.h>
 #include <log.h>
 #include <splash.h>
 #include <asm/arch/stm32.h>
@@ -217,6 +218,45 @@ int splash_screen_prepare(void)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(OF_BOARD_FIXUP)
+/*
+ * The FWU metadata are stored in the boot device, the SD card or the
+ * eMMC, so point the "fwu-mdata-store" property to it. The phandle is
+ * replaced in place, since the devicetree is already in use.
+ */
+int board_fix_fdt(void *blob)
+{
+	u32 bootmode = get_bootmode();
+	unsigned int instance = (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1;
+	int node, store;
+	char alias[8];
+	u32 phandle;
+
+	node = fdt_node_offset_by_compatible(blob, -1, "u-boot,fwu-mdata-gpt");
+	if (node < 0)
+		return 0;
+
+	switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
+	case BOOT_FLASH_SD:
+	case BOOT_FLASH_EMMC:
+		break;
+	default:
+		return 0;
+	}
+
+	snprintf(alias, sizeof(alias), "mmc%u", instance);
+	store = fdt_path_offset(blob, alias);
+	if (store < 0)
+		return store;
+
+	phandle = fdt_get_phandle(blob, store);
+	if (!phandle)
+		return -ENOENT;
+
+	return fdt_setprop_inplace_u32(blob, node, "fwu-mdata-store", phandle);
+}
+#endif
+
 int board_late_init(void)
 {
 	const char *fdt_compat;
diff --git a/configs/stm32mp25-microgea-rmm_defconfig b/configs/stm32mp25-microgea-rmm_defconfig
index 0f1b7db7abc8..73f8f7cf96b6 100644
--- a/configs/stm32mp25-microgea-rmm_defconfig
+++ b/configs/stm32mp25-microgea-rmm_defconfig
@@ -14,10 +14,13 @@ CONFIG_CMD_STM32KEY=y
 CONFIG_MFD_STM32_TIMERS=y
 CONFIG_ENV_OFFSET_REDUND=0x940000
 CONFIG_TARGET_MICROGEA_STM32MP257=y
+CONFIG_FWU_NUM_IMAGES_PER_BANK=3
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_SYS_MEMTEST_START=0x84000000
 CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_API=y
 CONFIG_SYS_MMC_MAX_DEVICE=3
+CONFIG_EFI_CAPSULE_ON_DISK=y
 CONFIG_FIT=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=1
@@ -25,6 +28,7 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
 # CONFIG_BOARD_INIT is not set
 CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_BDI is not set
+CONFIG_CMD_FWU_METADATA=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_ADTIMG=y
 # CONFIG_CMD_ELF is not set
@@ -119,3 +123,5 @@ CONFIG_WDT_STM32MP=y
 CONFIG_WDT_ARM_SMC=y
 # CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
 CONFIG_ERRNO_STR=y
+CONFIG_FWU_MULTI_BANK_UPDATE=y
+CONFIG_FWU_MDATA_V2=y
-- 
2.43.0

[PATCH v2 35/35] board: engicam: stm32mp2: enable simple framebuffer for the splash screen

[Dario Binacchi]

Enable the simple-framebuffer node of the Linux devicetree to preserve
the splash screen until the Linux display driver takes over.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

Changes in v2:
- Drop a redundant comment

 board/engicam/stm32mp2/stm32mp2.c        | 17 +++++++++++++++++
 configs/stm32mp25-microgea-rmm_defconfig |  2 ++
 2 files changed, 19 insertions(+)

diff --git a/board/engicam/stm32mp2/stm32mp2.c b/board/engicam/stm32mp2/stm32mp2.c
index e15141677775..64fb44fd7f02 100644
--- a/board/engicam/stm32mp2/stm32mp2.c
+++ b/board/engicam/stm32mp2/stm32mp2.c
@@ -12,6 +12,7 @@
 #include <env.h>
 #include <event.h>
 #include <extension_board.h>
+#include <fdt_simplefb.h>
 #include <fdt_support.h>
 #include <log.h>
 #include <splash.h>
@@ -218,6 +219,22 @@ int splash_screen_prepare(void)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(OF_BOARD_SETUP)
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+	int ret;
+
+	if (IS_ENABLED(CONFIG_FDT_SIMPLEFB)) {
+		ret = fdt_simplefb_enable_and_mem_rsv(blob);
+		if (ret)
+			log_warning("cannot hand over the framebuffer (%d)\n",
+				    ret);
+	}
+
+	return 0;
+}
+#endif
+
 #if CONFIG_IS_ENABLED(OF_BOARD_FIXUP)
 /*
  * The FWU metadata are stored in the boot device, the SD card or the
diff --git a/configs/stm32mp25-microgea-rmm_defconfig b/configs/stm32mp25-microgea-rmm_defconfig
index 73f8f7cf96b6..d5ae71354736 100644
--- a/configs/stm32mp25-microgea-rmm_defconfig
+++ b/configs/stm32mp25-microgea-rmm_defconfig
@@ -24,6 +24,8 @@ CONFIG_EFI_CAPSULE_ON_DISK=y
 CONFIG_FIT=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=1
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_FDT_SIMPLEFB=y
 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
 # CONFIG_BOARD_INIT is not set
 CONFIG_SYS_PROMPT="STM32MP> "
-- 
2.43.0

Re: [PATCH v2 31/35] dts: support applying DT overlays to the control DT with OF_UPSTREAM

[Tom Rini]

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On Sat, Nov 07, 2026 at 03:32:21PM +0100, Dario Binacchi wrote:

> Extend to OF_UPSTREAM the support for building the control DT by
> applying DT overlays to a base DT, so far available for the DTs in
> arch/$(ARCH)/dts only. The upstream DT overlays to apply are listed in
> CONFIG_OF_UPSTREAM_CONTROL_DT_OVERLAYS.
> 
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> 

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

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